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| Started by | Ray Jui <rjui@broadcom.com> |
|---|---|
| First post | 2015-09-18 23:30 +0200 |
| Last post | 2015-09-18 23:30 +0200 |
| Articles | 12 — 2 participants |
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[PATCH v2 0/9] Broadcom Cygnus device tree changes Ray Jui <rjui@broadcom.com> - 2015-09-18 23:30 +0200
[PATCH v2 2/9] ARM: dts: Use label for device nodes in Cygnus dts Ray Jui <rjui@broadcom.com> - 2015-09-18 23:30 +0200
[PATCH v2 4/9] ARM: dts: Put Cygnus core components under core bus Ray Jui <rjui@broadcom.com> - 2015-09-18 23:30 +0200
Re: [PATCH v2 4/9] ARM: dts: Put Cygnus core components under core bus Arnd Bergmann <arnd@arndb.de> - 2015-09-18 23:40 +0200
Re: [PATCH v2 4/9] ARM: dts: Put Cygnus core components under core bus Ray Jui <rjui@broadcom.com> - 2015-09-19 00:00 +0200
[PATCH v2 8/9] ARM: dts: Enable NAND support on bcm911360_entphn Ray Jui <rjui@broadcom.com> - 2015-09-18 23:30 +0200
[PATCH v2 7/9] ARM: dts: Enable various peripherals on bcm958305k Ray Jui <rjui@broadcom.com> - 2015-09-18 23:30 +0200
Re: [PATCH v2 1/9] ARM: dts: consolidate aliases for Cygnus dt files Arnd Bergmann <arnd@arndb.de> - 2015-09-18 23:30 +0200
Re: [PATCH v2 1/9] ARM: dts: consolidate aliases for Cygnus dt files Ray Jui <rjui@broadcom.com> - 2015-09-18 23:50 +0200
[PATCH v2 6/9] ARM: dts: Reorder Cygnus peripherals Ray Jui <rjui@broadcom.com> - 2015-09-18 23:30 +0200
[PATCH v2 9/9] ARM: dts: enable touchscreen support on Cygnus Ray Jui <rjui@broadcom.com> - 2015-09-18 23:30 +0200
[PATCH v2 1/9] ARM: dts: consolidate aliases for Cygnus dt files Ray Jui <rjui@broadcom.com> - 2015-09-18 23:30 +0200
| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-18 23:30 +0200 |
| Subject | [PATCH v2 0/9] Broadcom Cygnus device tree changes |
| Message-ID | <qabod-67e-3@gated-at.bofh.it> |
This patch series cleans up the Broadcom Cygnus device tree files and makes it more consistent with the rest of Broadcom iProc device tree files. This patch series also enables various peripherals on Cygnus boards. They include: bcm11360_entphn: NAND bcm958300k: touchscreen bcm958305k: I2C, PCIe, NAND, touchscreen Code is based on v4.3-rc1 and is available on GITHUB: https://github.com/Broadcom/cygnus-linux/tree/cygnus-dt-v2 Chages from V1: - Break the major clean up change into separate patches Ray Jui (9): ARM: dts: consolidate aliases for Cygnus dt files ARM: dts: Use label for device nodes in Cygnus dts ARM: dts: Remove unused PCI I/O resource in Cygnus ARM: dts: Put Cygnus core components under core bus ARM: dts: Move all Cygnus peripherals into soc bus ARM: dts: Reorder Cygnus peripherals ARM: dts: Enable various peripherals on bcm958305k ARM: dts: Enable NAND support on bcm911360_entphn ARM: dts: enable touchscreen support on Cygnus arch/arm/boot/dts/bcm-cygnus.dtsi | 337 +++++++++++++++++---------------- arch/arm/boot/dts/bcm911360_entphn.dts | 28 ++- arch/arm/boot/dts/bcm911360k.dts | 10 +- arch/arm/boot/dts/bcm958300k.dts | 45 ++--- arch/arm/boot/dts/bcm958305k.dts | 41 +++- arch/arm/boot/dts/bcm9hmidc.dtsi | 42 ++++ 6 files changed, 299 insertions(+), 204 deletions(-) create mode 100644 arch/arm/boot/dts/bcm9hmidc.dtsi -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-18 23:30 +0200 |
| Subject | [PATCH v2 2/9] ARM: dts: Use label for device nodes in Cygnus dts |
| Message-ID | <qaboe-67e-13@gated-at.bofh.it> |
| In reply to | #1228282 |
Use label instead of full path to reference device nodes in Cygnus dts
files
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
---
arch/arm/boot/dts/bcm911360_entphn.dts | 8 +++----
arch/arm/boot/dts/bcm911360k.dts | 6 ++---
arch/arm/boot/dts/bcm958300k.dts | 40 +++++++++++++++++-----------------
arch/arm/boot/dts/bcm958305k.dts | 6 ++---
4 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts
index 0e1320e..f791a3b 100644
--- a/arch/arm/boot/dts/bcm911360_entphn.dts
+++ b/arch/arm/boot/dts/bcm911360_entphn.dts
@@ -44,10 +44,6 @@
bootargs = "console=ttyS0,115200";
};
- uart3: serial@18023000 {
- status = "okay";
- };
-
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
@@ -60,3 +56,7 @@
};
};
};
+
+&uart3 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/bcm911360k.dts b/arch/arm/boot/dts/bcm911360k.dts
index 2af40c6..814011c 100644
--- a/arch/arm/boot/dts/bcm911360k.dts
+++ b/arch/arm/boot/dts/bcm911360k.dts
@@ -42,8 +42,8 @@
stdout-path = &uart3;
bootargs = "console=ttyS0,115200";
};
+};
- uart3: serial@18023000 {
- status = "okay";
- };
+&uart3 {
+ status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958300k.dts b/arch/arm/boot/dts/bcm958300k.dts
index 75e50f0..d8dc9f0 100644
--- a/arch/arm/boot/dts/bcm958300k.dts
+++ b/arch/arm/boot/dts/bcm958300k.dts
@@ -42,32 +42,32 @@
stdout-path = &uart3;
bootargs = "console=ttyS0,115200";
};
+};
- pcie0: pcie@18012000 {
- status = "okay";
- };
+&pcie0 {
+ status = "okay";
+};
- pcie1: pcie@18013000 {
- status = "okay";
- };
+&pcie1 {
+ status = "okay";
+};
- uart3: serial@18023000 {
- status = "okay";
- };
+&uart3 {
+ status = "okay";
+};
- nand: nand@18046000 {
- nandcs@1 {
- compatible = "brcm,nandcs";
- reg = <0>;
- nand-on-flash-bbt;
+&nand {
+ nandcs@1 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
- nand-ecc-strength = <24>;
- nand-ecc-step-size = <1024>;
+ nand-ecc-strength = <24>;
+ nand-ecc-step-size = <1024>;
- brcm,nand-oob-sector-size = <27>;
- };
+ brcm,nand-oob-sector-size = <27>;
};
};
diff --git a/arch/arm/boot/dts/bcm958305k.dts b/arch/arm/boot/dts/bcm958305k.dts
index bf62e1b..af11a8e 100644
--- a/arch/arm/boot/dts/bcm958305k.dts
+++ b/arch/arm/boot/dts/bcm958305k.dts
@@ -42,8 +42,8 @@
stdout-path = &uart3;
bootargs = "console=ttyS0,115200";
};
+};
- uart3: serial@18023000 {
- status = "okay";
- };
+&uart3 {
+ status = "okay";
};
--
1.9.1
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| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-18 23:30 +0200 |
| Subject | [PATCH v2 4/9] ARM: dts: Put Cygnus core components under core bus |
| Message-ID | <qaboe-67e-29@gated-at.bofh.it> |
| In reply to | #1228282 |
Put all Cygnus core components into "core" node of type "simple-bus" in
bcm-cygnus.dtsi
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 54 ++++++++++++++++++++++-----------------
1 file changed, 30 insertions(+), 24 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 0a5898b..d4e2d04 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -58,6 +58,36 @@
/include/ "bcm-cygnus-clock.dtsi"
+ core {
+ compatible = "simple-bus";
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ timer@19020200 {
+ compatible = "arm,cortex-a9-global-timer";
+ reg = <0x19020200 0x100>;
+ interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ };
+
+ gic: interrupt-controller@19021000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x19021000 0x1000>,
+ <0x19020100 0x100>;
+ };
+
+ L2: l2-cache {
+ compatible = "arm,pl310-cache";
+ reg = <0x19022000 0x1000>;
+ cache-unified;
+ cache-level = <2>;
+ };
+ };
+
pinctrl: pinctrl@0x0301d0c8 {
compatible = "brcm,cygnus-pinmux";
reg = <0x0301d0c8 0x30>,
@@ -225,28 +255,4 @@
brcm,nand-has-wp;
};
-
- gic: interrupt-controller@19021000 {
- compatible = "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x19021000 0x1000>,
- <0x19020100 0x100>;
- };
-
- L2: l2-cache {
- compatible = "arm,pl310-cache";
- reg = <0x19022000 0x1000>;
- cache-unified;
- cache-level = <2>;
- };
-
- timer@19020200 {
- compatible = "arm,cortex-a9-global-timer";
- reg = <0x19020200 0x100>;
- interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&periph_clk>;
- };
-
};
--
1.9.1
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| From | Arnd Bergmann <arnd@arndb.de> |
|---|---|
| Date | 2015-09-18 23:40 +0200 |
| Subject | Re: [PATCH v2 4/9] ARM: dts: Put Cygnus core components under core bus |
| Message-ID | <qabxT-6k6-3@gated-at.bofh.it> |
| In reply to | #1228286 |
On Friday 18 September 2015 14:24:09 Ray Jui wrote:
>
> + core {
> + compatible = "simple-bus";
> + ranges;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + timer@19020200 {
> + compatible = "arm,cortex-a9-global-timer";
> + reg = <0x19020200 0x100>;
> + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&periph_clk>;
> + };
> +
> + gic: interrupt-controller@19021000 {
>
Could it be that all 'core' components are in the 0x19xxxxxx address range?
If so, please set up an appropriate ranges property for the bus. Also
add the address field for the bus according to which addresses are routed
to it.
Arnd
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| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-19 00:00 +0200 |
| Subject | Re: [PATCH v2 4/9] ARM: dts: Put Cygnus core components under core bus |
| Message-ID | <qabRg-6KO-5@gated-at.bofh.it> |
| In reply to | #1228293 |
On 9/18/2015 2:30 PM, Arnd Bergmann wrote:
> On Friday 18 September 2015 14:24:09 Ray Jui wrote:
>>
>> + core {
>> + compatible = "simple-bus";
>> + ranges;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + timer@19020200 {
>> + compatible = "arm,cortex-a9-global-timer";
>> + reg = <0x19020200 0x100>;
>> + interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&periph_clk>;
>> + };
>> +
>> + gic: interrupt-controller@19021000 {
>>
>
> Could it be that all 'core' components are in the 0x19xxxxxx address range?
> If so, please set up an appropriate ranges property for the bus. Also
> add the address field for the bus according to which addresses are routed
> to it.
>
> Arnd
>
Yes all 'core' components are in the 0x19xxxxx address range for Cygnus.
It's fine and makes sense to set up proper ranges for this bus. But I
might have some issues with the 'soc' components and the 'soc' bus,
which I'll explain and discuss on the next email.
Ray
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| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-18 23:30 +0200 |
| Subject | [PATCH v2 8/9] ARM: dts: Enable NAND support on bcm911360_entphn |
| Message-ID | <qabog-67e-37@gated-at.bofh.it> |
| In reply to | #1228282 |
This patch enables NAND support on Broadcom Cygnus form factor board
(bcm911360_entphn)
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
---
arch/arm/boot/dts/bcm911360_entphn.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts
index f791a3b..8b3800f 100644
--- a/arch/arm/boot/dts/bcm911360_entphn.dts
+++ b/arch/arm/boot/dts/bcm911360_entphn.dts
@@ -60,3 +60,19 @@
&uart3 {
status = "okay";
};
+
+&nand {
+ nandcs@1 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ nand-ecc-strength = <24>;
+ nand-ecc-step-size = <1024>;
+
+ brcm,nand-oob-sector-size = <27>;
+ };
+};
--
1.9.1
--
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| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-18 23:30 +0200 |
| Subject | [PATCH v2 7/9] ARM: dts: Enable various peripherals on bcm958305k |
| Message-ID | <qabog-67e-33@gated-at.bofh.it> |
| In reply to | #1228282 |
This patch enables various peripherals on Broadcom Cygnus wireless audio
board (bcm958305k). These peripherals include I2C, PCIe, and NAND
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
---
arch/arm/boot/dts/bcm958305k.dts | 32 ++++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/bcm958305k.dts b/arch/arm/boot/dts/bcm958305k.dts
index af11a8e..9863a19 100644
--- a/arch/arm/boot/dts/bcm958305k.dts
+++ b/arch/arm/boot/dts/bcm958305k.dts
@@ -44,6 +44,38 @@
};
};
+&i2c0 {
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
+
&uart3 {
status = "okay";
};
+
+&nand {
+ nandcs@1 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-on-flash-bbt;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ nand-ecc-strength = <24>;
+ nand-ecc-step-size = <1024>;
+
+ brcm,nand-oob-sector-size = <27>;
+ };
+};
--
1.9.1
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| From | Arnd Bergmann <arnd@arndb.de> |
|---|---|
| Date | 2015-09-18 23:30 +0200 |
| Subject | Re: [PATCH v2 1/9] ARM: dts: consolidate aliases for Cygnus dt files |
| Message-ID | <qabog-67e-39@gated-at.bofh.it> |
| In reply to | #1228282 |
On Friday 18 September 2015 14:24:06 Ray Jui wrote:
> Move aliases into bcm-cygnus.dtsi to avoid duplications in Cygnus dts
> files
>
We generally recommend keeping them separate:
> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
> index e1ac07a..30903ba 100644
> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
> @@ -40,6 +40,10 @@
> model = "Broadcom Cygnus SoC";
> interrupt-parent = <&gic>;
>
> + aliases {
> + serial0 = &uart3;
> + };
> +
The SoC has at least four uarts according to this, so it seems unlikely that
each board really only uses only the fourth one of them and labels it '0'
on the board. As soon as you get one board that has more than one uart wired
up, you would need to undo this.
Arnd
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| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-18 23:50 +0200 |
| Subject | Re: [PATCH v2 1/9] ARM: dts: consolidate aliases for Cygnus dt files |
| Message-ID | <qabHA-6x4-21@gated-at.bofh.it> |
| In reply to | #1228289 |
On 9/18/2015 2:27 PM, Arnd Bergmann wrote:
> On Friday 18 September 2015 14:24:06 Ray Jui wrote:
>> Move aliases into bcm-cygnus.dtsi to avoid duplications in Cygnus dts
>> files
>>
>
> We generally recommend keeping them separate:
>
>> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
>> index e1ac07a..30903ba 100644
>> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
>> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
>> @@ -40,6 +40,10 @@
>> model = "Broadcom Cygnus SoC";
>> interrupt-parent = <&gic>;
>>
>> + aliases {
>> + serial0 = &uart3;
>> + };
>> +
>
> The SoC has at least four uarts according to this, so it seems unlikely that
> each board really only uses only the fourth one of them and labels it '0'
> on the board. As soon as you get one board that has more than one uart wired
> up, you would need to undo this.
>
> Arnd
>
I think Scott might have explained this in the past. uart3 is going to
be used on all Cygnus boards (including all future boards) because the
bootrom was designed to use uart3 as console and that won't change.
Let me know if you still think I need to move this back to the dts.
Thanks,
Ray
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| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-18 23:30 +0200 |
| Subject | [PATCH v2 6/9] ARM: dts: Reorder Cygnus peripherals |
| Message-ID | <qabog-67e-45@gated-at.bofh.it> |
| In reply to | #1228282 |
Reorder all Cygnus peripherals based on base register addresses in
bcm-cygnus.dtsi
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 56 +++++++++++++++++++--------------------
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 3d29b77..dfa9a3c 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -108,26 +108,14 @@
gpio-controller;
};
- gpio_ccm: gpio@1800a000 {
- compatible = "brcm,cygnus-ccm-gpio";
- reg = <0x1800a000 0x50>,
- <0x0301d164 0x20>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- };
-
- gpio_asiu: gpio@180a5000 {
- compatible = "brcm,cygnus-asiu-gpio";
- reg = <0x180a5000 0x668>;
- #gpio-cells = <2>;
- gpio-controller;
-
- pinmux = <&pinctrl>;
-
- interrupt-controller;
- interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ i2c0: i2c@18008000 {
+ compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
+ reg = <0x18008000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
+ clock-frequency = <100000>;
+ status = "disabled";
};
wdt0: wdt@18009000 {
@@ -138,14 +126,14 @@
clock-names = "apb_pclk";
};
- i2c0: i2c@18008000 {
- compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
- reg = <0x18008000 0x100>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
- clock-frequency = <100000>;
- status = "disabled";
+ gpio_ccm: gpio@1800a000 {
+ compatible = "brcm,cygnus-ccm-gpio";
+ reg = <0x1800a000 0x50>,
+ <0x0301d164 0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
};
i2c1: i2c@1800b000 {
@@ -255,5 +243,17 @@
brcm,nand-has-wp;
};
+
+ gpio_asiu: gpio@180a5000 {
+ compatible = "brcm,cygnus-asiu-gpio";
+ reg = <0x180a5000 0x668>;
+ #gpio-cells = <2>;
+ gpio-controller;
+
+ pinmux = <&pinctrl>;
+
+ interrupt-controller;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
};
--
1.9.1
--
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| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-18 23:30 +0200 |
| Subject | [PATCH v2 9/9] ARM: dts: enable touchscreen support on Cygnus |
| Message-ID | <qabog-67e-49@gated-at.bofh.it> |
| In reply to | #1228282 |
This patch enables touchscreen support on bcm958300k and bcm958305k.
Touchscreen is connected to these boards through the bcm9hmidc daughter
card, and therefore also adding bcm9hmidc.dtsi that describes the
daughter card
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 10 ++++++++++
arch/arm/boot/dts/bcm958300k.dts | 1 +
arch/arm/boot/dts/bcm958305k.dts | 1 +
arch/arm/boot/dts/bcm9hmidc.dtsi | 42 +++++++++++++++++++++++++++++++++++++++
4 files changed, 54 insertions(+)
create mode 100644 arch/arm/boot/dts/bcm9hmidc.dtsi
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index dfa9a3c..d898838 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -32,6 +32,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clock/bcm-cygnus.h>
#include "skeleton.dtsi"
@@ -255,5 +256,14 @@
interrupt-controller;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ touchscreen: tsc@180a6000 {
+ compatible = "brcm,iproc-touchscreen";
+ reg = <0x180a6000 0x40>;
+ clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
+ clock-names = "tsc_clk";
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm/boot/dts/bcm958300k.dts b/arch/arm/boot/dts/bcm958300k.dts
index d8dc9f0..2e31581 100644
--- a/arch/arm/boot/dts/bcm958300k.dts
+++ b/arch/arm/boot/dts/bcm958300k.dts
@@ -33,6 +33,7 @@
/dts-v1/;
#include "bcm-cygnus.dtsi"
+#include "bcm9hmidc.dtsi"
/ {
model = "Cygnus SVK (BCM958300K)";
diff --git a/arch/arm/boot/dts/bcm958305k.dts b/arch/arm/boot/dts/bcm958305k.dts
index 9863a19..288a637 100644
--- a/arch/arm/boot/dts/bcm958305k.dts
+++ b/arch/arm/boot/dts/bcm958305k.dts
@@ -33,6 +33,7 @@
/dts-v1/;
#include "bcm-cygnus.dtsi"
+#include "bcm9hmidc.dtsi"
/ {
model = "Cygnus Wireless Audio (BCM958305K)";
diff --git a/arch/arm/boot/dts/bcm9hmidc.dtsi b/arch/arm/boot/dts/bcm9hmidc.dtsi
new file mode 100644
index 0000000..65397c0
--- /dev/null
+++ b/arch/arm/boot/dts/bcm9hmidc.dtsi
@@ -0,0 +1,42 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 Broadcom Corporation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Broadcom Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Broadcom human machine interface daughter card (bcm9hmidc) installed on
+ * bcm958300k/bcm958305k boards
+ */
+
+&touchscreen {
+ touchscreen-inverted-x;
+ touchscreen-inverted-y;
+ status = "okay";
+};
--
1.9.1
--
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| From | Ray Jui <rjui@broadcom.com> |
|---|---|
| Date | 2015-09-18 23:30 +0200 |
| Subject | [PATCH v2 1/9] ARM: dts: consolidate aliases for Cygnus dt files |
| Message-ID | <qabog-67e-41@gated-at.bofh.it> |
| In reply to | #1228282 |
Move aliases into bcm-cygnus.dtsi to avoid duplications in Cygnus dts
files
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 4 ++++
arch/arm/boot/dts/bcm911360_entphn.dts | 4 ----
arch/arm/boot/dts/bcm911360k.dts | 4 ----
arch/arm/boot/dts/bcm958300k.dts | 4 ----
arch/arm/boot/dts/bcm958305k.dts | 4 ----
5 files changed, 4 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index e1ac07a..30903ba 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -40,6 +40,10 @@
model = "Broadcom Cygnus SoC";
interrupt-parent = <&gic>;
+ aliases {
+ serial0 = &uart3;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/bcm911360_entphn.dts b/arch/arm/boot/dts/bcm911360_entphn.dts
index 7db4843..0e1320e 100644
--- a/arch/arm/boot/dts/bcm911360_entphn.dts
+++ b/arch/arm/boot/dts/bcm911360_entphn.dts
@@ -39,10 +39,6 @@
model = "Cygnus Enterprise Phone (BCM911360_ENTPHN)";
compatible = "brcm,bcm11360", "brcm,cygnus";
- aliases {
- serial0 = &uart3;
- };
-
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS0,115200";
diff --git a/arch/arm/boot/dts/bcm911360k.dts b/arch/arm/boot/dts/bcm911360k.dts
index 9658d4f..2af40c6 100644
--- a/arch/arm/boot/dts/bcm911360k.dts
+++ b/arch/arm/boot/dts/bcm911360k.dts
@@ -38,10 +38,6 @@
model = "Cygnus SVK (BCM911360K)";
compatible = "brcm,bcm11360", "brcm,cygnus";
- aliases {
- serial0 = &uart3;
- };
-
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS0,115200";
diff --git a/arch/arm/boot/dts/bcm958300k.dts b/arch/arm/boot/dts/bcm958300k.dts
index 2f63052..75e50f0 100644
--- a/arch/arm/boot/dts/bcm958300k.dts
+++ b/arch/arm/boot/dts/bcm958300k.dts
@@ -38,10 +38,6 @@
model = "Cygnus SVK (BCM958300K)";
compatible = "brcm,bcm58300", "brcm,cygnus";
- aliases {
- serial0 = &uart3;
- };
-
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS0,115200";
diff --git a/arch/arm/boot/dts/bcm958305k.dts b/arch/arm/boot/dts/bcm958305k.dts
index 56b429a..bf62e1b 100644
--- a/arch/arm/boot/dts/bcm958305k.dts
+++ b/arch/arm/boot/dts/bcm958305k.dts
@@ -38,10 +38,6 @@
model = "Cygnus Wireless Audio (BCM958305K)";
compatible = "brcm,bcm58305", "brcm,cygnus";
- aliases {
- serial0 = &uart3;
- };
-
chosen {
stdout-path = &uart3;
bootargs = "console=ttyS0,115200";
--
1.9.1
--
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