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| Started by | Krzysztof Adamski <k@japko.eu> |
|---|---|
| First post | 2016-02-04 00:40 +0100 |
| Last post | 2016-02-08 09:40 +0100 |
| Articles | 3 — 2 participants |
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[PATCH v3 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi Krzysztof Adamski <k@japko.eu> - 2016-02-04 00:40 +0100
Re: [PATCH v3 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi Chen-Yu Tsai <wens@csie.org> - 2016-02-05 10:50 +0100
Re: [PATCH v3 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi Krzysztof Adamski <k@japko.eu> - 2016-02-08 09:40 +0100
| From | Krzysztof Adamski <k@japko.eu> |
|---|---|
| Date | 2016-02-04 00:40 +0100 |
| Subject | [PATCH v3 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi |
| Message-ID | <qYfbH-uu-3@gated-at.bofh.it> |
Add the corresponding device node for R_PIO on H3 to the dtsi. Support
for the controller was added in earlier commit.
Signed-off-by: Krzysztof Adamski <k@japko.eu>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index bb37f52..f618a95 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -517,5 +517,17 @@
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
};
+
+ r_pio: pinctrl@01f02c00 {
+ compatible = "allwinner,sun8i-h3-r-pinctrl";
+ reg = <0x01f02c00 0x400>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&apb0_gates 0>;
+ resets = <&apb0_reset 0>;
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
};
};
--
2.1.4
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| From | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| Date | 2016-02-05 10:50 +0100 |
| Subject | Re: [PATCH v3 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi |
| Message-ID | <qYLbA-6TD-15@gated-at.bofh.it> |
| In reply to | #1326205 |
On Thu, Feb 4, 2016 at 7:33 AM, Krzysztof Adamski <k@japko.eu> wrote:
> Add the corresponding device node for R_PIO on H3 to the dtsi. Support
> for the controller was added in earlier commit.
>
> Signed-off-by: Krzysztof Adamski <k@japko.eu>
> ---
> arch/arm/boot/dts/sun8i-h3.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
> index bb37f52..f618a95 100644
> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
> @@ -517,5 +517,17 @@
> compatible = "allwinner,sun6i-a31-clock-reset";
> #reset-cells = <1>;
> };
> +
> + r_pio: pinctrl@01f02c00 {
> + compatible = "allwinner,sun8i-h3-r-pinctrl";
> + reg = <0x01f02c00 0x400>;
> + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&apb0_gates 0>;
> + resets = <&apb0_reset 0>;
> + gpio-controller;
> + #gpio-cells = <3>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
This should be 3: bank number + pin number + flags.
The rest looks good.
(resent as my mail setup failed to deliver)
> + };
> };
> };
> --
> 2.1.4
>
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| From | Krzysztof Adamski <k@japko.eu> |
|---|---|
| Date | 2016-02-08 09:40 +0100 |
| Subject | Re: [PATCH v3 4/5] ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi |
| Message-ID | <qZPwu-2Hf-5@gated-at.bofh.it> |
| In reply to | #1327576 |
On Fri, Feb 05, 2016 at 05:46:32PM +0800, Chen-Yu Tsai wrote:
>On Thu, Feb 4, 2016 at 7:33 AM, Krzysztof Adamski <k@japko.eu> wrote:
>> Add the corresponding device node for R_PIO on H3 to the dtsi. Support
>> for the controller was added in earlier commit.
>>
>> Signed-off-by: Krzysztof Adamski <k@japko.eu>
>> ---
>> arch/arm/boot/dts/sun8i-h3.dtsi | 12 ++++++++++++
>> 1 file changed, 12 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
>> index bb37f52..f618a95 100644
>> --- a/arch/arm/boot/dts/sun8i-h3.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
>> @@ -517,5 +517,17 @@
>> compatible = "allwinner,sun6i-a31-clock-reset";
>> #reset-cells = <1>;
>> };
>> +
>> + r_pio: pinctrl@01f02c00 {
>> + compatible = "allwinner,sun8i-h3-r-pinctrl";
>> + reg = <0x01f02c00 0x400>;
>> + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&apb0_gates 0>;
>> + resets = <&apb0_reset 0>;
>> + gpio-controller;
>> + #gpio-cells = <3>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>
>This should be 3: bank number + pin number + flags.
>The rest looks good.
Nicly spotted. I took it from pio description in the same file. So
there's a bug there too.
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