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[PATCH 0/6] arm64: dts: apq8016 dt patches.

Started bySrinivas Kandagatla <srinivas.kandagatla@linaro.org>
First post2016-02-05 20:10 +0100
Last post2016-02-05 21:00 +0100
Articles 7 — 2 participants

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  [PATCH 0/6] arm64: dts: apq8016 dt patches. Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2016-02-05 20:10 +0100
    [PATCH 4/6] arm64: dts: qcom: add lpass node Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2016-02-05 20:10 +0100
      Re: [PATCH 4/6] arm64: dts: qcom: add lpass node Stephen Boyd <sboyd@codeaurora.org> - 2016-02-05 21:00 +0100
    [PATCH 6/6] arm64: dts: qcom: fix usb digital voltage levels Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2016-02-05 20:10 +0100
    [PATCH 3/6] arm64: dts: qcom: add audio pinctrls Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2016-02-05 20:10 +0100
    [PATCH 2/6] arm64: dts: qcom: apq8016-sbc: add usb support Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2016-02-05 20:10 +0100
      Re: [PATCH 2/6] arm64: dts: qcom: apq8016-sbc: add usb support Stephen Boyd <sboyd@codeaurora.org> - 2016-02-05 21:00 +0100

#1328011 — [PATCH 0/6] arm64: dts: apq8016 dt patches.

FromSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date2016-02-05 20:10 +0100
Subject[PATCH 0/6] arm64: dts: apq8016 dt patches.
Message-ID<qYTVw-4gQ-7@gated-at.bofh.it>
Hi Andy, 

Here are few more dt patches which enables usb and lpass.
I have tested these patches with few changes to defconfig on DB410C.

Thanks,
srini


Srinivas Kandagatla (6):
  arm64: dts: qcom: add manual pullup setting to otg.
  arm64: dts: qcom: apq8016-sbc: add usb support
  arm64: dts: qcom: add audio pinctrls
  arm64: dts: qcom: add lpass node
  arm64: dts: qcom: apq8016-sbc: enable lpass on DB410c
  arm64: dts: qcom: fix usb digital voltage levels

 arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi |  15 ++
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi          |  39 ++++
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi         | 216 +++++++++++++++++++++
 arch/arm64/boot/dts/qcom/msm8916.dtsi              |  29 ++-
 4 files changed, 298 insertions(+), 1 deletion(-)

-- 
1.9.1

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#1328012 — [PATCH 4/6] arm64: dts: qcom: add lpass node

FromSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date2016-02-05 20:10 +0100
Subject[PATCH 4/6] arm64: dts: qcom: add lpass node
Message-ID<qYTVw-4gQ-15@gated-at.bofh.it>
In reply to#1328011
This patch adds lpass node to the SOC.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index c1592d4..cdda026 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -343,6 +343,32 @@
 			status = "disabled";
 		};
 
+		lpass: lpass@07700000 {
+			status = "disabled";
+			compatible = "qcom,lpass-cpu-apq8016";
+			clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
+				 <&gcc GCC_ULTAUDIO_PCNOC_MPORT_CLK>,
+				 <&gcc GCC_ULTAUDIO_PCNOC_SWAY_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_PRI_I2S_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_SEC_I2S_CLK>,
+				 <&gcc GCC_ULTAUDIO_LPAIF_AUX_I2S_CLK>;
+
+			clock-names = "ahbix-clk",
+					"pcnoc-mport-clk",
+					"pcnoc-sway-clk",
+					"mi2s-bit-clk0",
+					"mi2s-bit-clk1",
+					"mi2s-bit-clk2",
+					"mi2s-bit-clk3";
+			#sound-dai-cells = <1>;
+
+			interrupts = <0 160 0>;
+			interrupt-names = "lpass-irq-lpaif";
+			reg = <0x07708000 0x10000>;
+			reg-names = "lpass-lpaif";
+		};
+
 		sdhc_1: sdhci@07824000 {
 			compatible = "qcom,sdhci-msm-v4";
 			reg = <0x07824900 0x11c>, <0x07824000 0x800>;
-- 
1.9.1

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#1328042 — Re: [PATCH 4/6] arm64: dts: qcom: add lpass node

FromStephen Boyd <sboyd@codeaurora.org>
Date2016-02-05 21:00 +0100
SubjectRe: [PATCH 4/6] arm64: dts: qcom: add lpass node
Message-ID<qYUHU-4BV-3@gated-at.bofh.it>
In reply to#1328012
On 02/05/2016 11:01 AM, Srinivas Kandagatla wrote:
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index c1592d4..cdda026 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -343,6 +343,32 @@
>  			status = "disabled";
>  		};
>  
> +		lpass: lpass@07700000 {
[..]
> +			reg = <0x07708000 0x10000>;

Unit address and reg don't match. Please make them the same.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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#1328014 — [PATCH 6/6] arm64: dts: qcom: fix usb digital voltage levels

FromSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date2016-02-05 20:10 +0100
Subject[PATCH 6/6] arm64: dts: qcom: fix usb digital voltage levels
Message-ID<qYTVw-4gQ-19@gated-at.bofh.it>
In reply to#1328011
This patch updates the digital voltage levels from corner values to
microvolts as we are going to use s1 regulator directly for vddcx
instead of s1_corner.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index cdda026..cb82f4f 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -421,7 +421,7 @@
 			interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
 				     <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
 
-			qcom,vdd-levels = <1 5 7>;
+			qcom,vdd-levels = <500000 1000000 1320000>;
 			qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
 			dr_mode = "peripheral";
 			qcom,otg-control = <2>; // PMIC
-- 
1.9.1

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#1328015 — [PATCH 3/6] arm64: dts: qcom: add audio pinctrls

FromSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date2016-02-05 20:10 +0100
Subject[PATCH 3/6] arm64: dts: qcom: add audio pinctrls
Message-ID<qYTVx-4gQ-27@gated-at.bofh.it>
In reply to#1328011
This patch adds pinctrls required for digital and analog audio via lpass.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 216 +++++++++++++++++++++++++++++
 1 file changed, 216 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 8d05005..e9ea5ca 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -504,4 +504,220 @@
 			};
 		};
 	};
+
+	ext-codec-lines {
+		ext_codec_lines_act: lines_on {
+			pinmux {
+				function = "gpio";
+				pins = "gpio67";
+			};
+			pinconf {
+				pins = "gpio67";
+				drive-strength = <8>;
+				bias-disable;
+				output-high;
+			};
+		};
+		ext_codec_lines_sus: lines_off {
+			pinmux {
+				function = "gpio";
+				pins = "gpio67";
+			};
+			pinconf {
+				pins = "gpio67";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	cdc-pdm-lines {
+		cdc_pdm_lines_act: pdm_lines_on {
+			pinmux {
+				function = "cdc_pdm0";
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+			};
+			pinconf {
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+		cdc_pdm_lines_sus: pdm_lines_off {
+			pinmux {
+				function = "cdc_pdm0";
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+			};
+			pinconf {
+				pins = "gpio63", "gpio64", "gpio65", "gpio66",
+				       "gpio67", "gpio68";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	ext-pri-tlmm-lines {
+		ext_pri_tlmm_lines_act: ext_pa_on {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+			};
+			pinconf {
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+
+		ext_pri_tlmm_lines_sus: ext_pa_off {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+			};
+			pinconf {
+				pins = "gpio113", "gpio114", "gpio115",
+				       "gpio116";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	ext-pri-ws-line {
+		ext_pri_ws_act: ext_pa_on {
+			pinmux {
+				function = "pri_mi2s_ws";
+				pins = "gpio110";
+			};
+			pinconf {
+				pins = "gpio110";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+
+		ext_pri_ws_sus: ext_pa_off {
+			pinmux {
+				function = "pri_mi2s_ws";
+				pins = "gpio110";
+			};
+			pinconf {
+				pins = "gpio110";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	ext-mclk-tlmm-lines {
+		ext_mclk_tlmm_lines_act: mclk_lines_on {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio116";
+			};
+			pinconf {
+				pins = "gpio116";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+		ext_mclk_tlmm_lines_sus: mclk_lines_off {
+			pinmux {
+				function = "pri_mi2s";
+				pins = "gpio116";
+			};
+			pinconf {
+				pins = "gpio116";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	/* secondary Mi2S */
+	ext-sec-tlmm-lines {
+		ext_sec_tlmm_lines_act: tlmm_lines_on {
+			pinmux {
+				function = "sec_mi2s";
+				pins = "gpio112", "gpio117", "gpio118",
+				       "gpio119";
+			};
+			pinconf {
+				pins = "gpio112", "gpio117", "gpio118",
+					"gpio119";
+				drive-strength = <8>;
+				bias-pull-none;
+			};
+		};
+		ext_sec_tlmm_lines_sus: tlmm_lines_off {
+			pinmux {
+				function = "sec_mi2s";
+				pins = "gpio112", "gpio117", "gpio118",
+				       "gpio119";
+			};
+			pinconf {
+				pins = "gpio112", "gpio117", "gpio118",
+					"gpio119";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	cdc-dmic-lines {
+		cdc_dmic_lines_act: dmic_lines_on {
+			pinmux_dmic0_clk {
+				function = "dmic0_clk";
+				pins = "gpio0";
+			};
+			pinmux_dmic0_data {
+				function = "dmic0_data";
+				pins = "gpio1";
+			};
+			pinconf {
+				pins = "gpio0", "gpio1";
+				drive-strength = <8>;
+			};
+		};
+		cdc_dmic_lines_sus: dmic_lines_off {
+			pinconf {
+				pins = "gpio0", "gpio1";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
+
+	cross-conn-det {
+		cross_conn_det_act: lines_on {
+			pinmux {
+				function = "gpio";
+				pins = "gpio120";
+			};
+			pinconf {
+				pins = "gpio120";
+				drive-strength = <8>;
+				output-low;
+				bias-pull-down;
+			};
+		};
+		cross_conn_det_sus: lines_off {
+			pinmux {
+				function = "gpio";
+				pins = "gpio120";
+			};
+			pinconf {
+				pins = "gpio120";
+				drive-strength = <2>;
+				bias-disable;
+			};
+		};
+	};
 };
-- 
1.9.1

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#1328016 — [PATCH 2/6] arm64: dts: qcom: apq8016-sbc: add usb support

FromSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Date2016-02-05 20:10 +0100
Subject[PATCH 2/6] arm64: dts: qcom: apq8016-sbc: add usb support
Message-ID<qYTVx-4gQ-21@gated-at.bofh.it>
In reply to#1328011
This patch adds usb otg support on DB410C.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi | 15 ++++++++++
 arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi          | 35 ++++++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
index cbeee0b..4a79dd9 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
@@ -10,4 +10,19 @@
 			output-low;
 		};
 	};
+
+	usb_id_default: usb_id_default {
+		pinmux {
+			function = "gpio";
+			pins = "gpio121";
+		};
+
+		pinconf {
+			pins = "gpio121";
+			function = "gpio";
+			drive-strength = <8>;
+			input-enable;
+			bias-pull-up;
+		};
+	};
 };
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 9a6c595..e80bdc2 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -151,6 +151,41 @@
 			cd-gpios = <&msmgpio 38 0x1>;
 			status = "okay";
 		};
+
+		usb@78d9000 {
+			extcon = <&usb_id>, <&usb_id>;
+			status = "okay";
+		};
+
+		usb2513 {
+			compatible = "smsc,usb3503";
+			reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>;
+			initial-mode = <1>;
+		};
+
+		usb_id: usb-id {
+			interrupt-parent = <&msmgpio>;
+			compatible = "linux,extcon-usb-gpio";
+			id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&usb_id_default>;
+		};
+
+		ehci@78d9000 {
+			status = "okay";
+		};
+
+		phy@78d9000 {
+			v1p8-supply = <&pm8916_l7>;
+			v3p3-supply = <&pm8916_l13>;
+			vddcx-supply = <&pm8916_s1>;
+			extcon = <&usb_id>, <&usb_id>;
+			dr_mode = "otg";
+			status = "okay";
+			switch-gpio = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&usb_sw_sel_pm>;
+		};
 	};
 };
 
-- 
1.9.1

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#1328049 — Re: [PATCH 2/6] arm64: dts: qcom: apq8016-sbc: add usb support

FromStephen Boyd <sboyd@codeaurora.org>
Date2016-02-05 21:00 +0100
SubjectRe: [PATCH 2/6] arm64: dts: qcom: apq8016-sbc: add usb support
Message-ID<qYUHV-4BV-27@gated-at.bofh.it>
In reply to#1328016
On 02/05/2016 11:01 AM, Srinivas Kandagatla wrote:
> +
> +		usb2513 {
> +			compatible = "smsc,usb3503";
> +			reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>;
> +			initial-mode = <1>;
> +		};
> +
> +		usb_id: usb-id {
> +			interrupt-parent = <&msmgpio>;
> +			compatible = "linux,extcon-usb-gpio";
> +			id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&usb_id_default>;
> +		};

These are not on the SoC bus. Please move them to root.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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