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[PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux

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  [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux Krzysztof Adamski <k@japko.eu> - 2016-02-03 09:00 +0100
    Re: [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux Linus Walleij <linus.walleij@linaro.org> - 2016-02-05 14:50 +0100
      Re: [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux Krzysztof Adamski <k@japko.eu> - 2016-02-05 14:50 +0100
      Re: [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux Chen-Yu Tsai <wens@csie.org> - 2016-02-05 15:00 +0100

#1325012 — [PATCH v2] pinctrl: sunxi: H3 requires irq_read_needs_mux

It seems that on H3, just like on A10, when GPIOs are configured as
external interrupt data registers does not contain their value.  When
value is read, GPIO function must be temporary switched to input for
reads.

Signed-off-by: Krzysztof Adamski <k@japko.eu>
---

Changes compared to v1:
- None, but the patch was sent with wrong "From:", if you want to apply 
  it, please apply this one. Sorry for confusion.


 drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
index 77d4cf0..11760bb 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3.c
@@ -492,6 +492,7 @@ static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = {
 	.pins = sun8i_h3_pins,
 	.npins = ARRAY_SIZE(sun8i_h3_pins),
 	.irq_banks = 2,
+	.irq_read_needs_mux = true
 };
 
 static int sun8i_h3_pinctrl_probe(struct platform_device *pdev)
-- 
2.4.2

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#1327706

On Wed, Feb 3, 2016 at 8:57 AM, Krzysztof Adamski <k@japko.eu> wrote:

> It seems that on H3, just like on A10, when GPIOs are configured as
> external interrupt data registers does not contain their value.  When
> value is read, GPIO function must be temporary switched to input for
> reads.
>
> Signed-off-by: Krzysztof Adamski <k@japko.eu>

1. Waiting for Maxime's ACK on this patch.

2. Is this a regression that need to go in to fixes?

Yours,
Linus Walleij

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#1327711

On Fri, Feb 05, 2016 at 02:39:23PM +0100, Linus Walleij wrote:
>On Wed, Feb 3, 2016 at 8:57 AM, Krzysztof Adamski <k@japko.eu> wrote:
>
>> It seems that on H3, just like on A10, when GPIOs are configured as
>> external interrupt data registers does not contain their value.  When
>> value is read, GPIO function must be temporary switched to input for
>> reads.
>>
>> Signed-off-by: Krzysztof Adamski <k@japko.eu>
>
>2. Is this a regression that need to go in to fixes?

Not sure what you mean by that. H3 support was added recently without 
this flag so it never worked properly on this SoC.  With this patch it 
does. So it's just a normal bug fix, not a regression.

Best regards,
Krzysztof Adamski

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#1327723

On Fri, Feb 5, 2016 at 9:39 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Wed, Feb 3, 2016 at 8:57 AM, Krzysztof Adamski <k@japko.eu> wrote:
>
>> It seems that on H3, just like on A10, when GPIOs are configured as
>> external interrupt data registers does not contain their value.  When
>> value is read, GPIO function must be temporary switched to input for
>> reads.
>>
>> Signed-off-by: Krzysztof Adamski <k@japko.eu>
>
> 1. Waiting for Maxime's ACK on this patch.

Maxime already acked v1.

Acked-by: Chen-Yu Tsai <wens@csie.org>

> 2. Is this a regression that need to go in to fixes?

This driver was introduced in 4.5-rc1. It'd be nice if this fix could make
it in 4.5. :)


Thanks
ChenYu

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