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[PATCH 00/15] Support for MIPSr6 Virtual Processors (multi-threading)

Started byPaul Burton <paul.burton@imgtec.com>
First post2016-02-03 04:20 +0100
Last post2016-02-03 04:30 +0100
Articles 7 — 2 participants

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Contents

  [PATCH 00/15] Support for MIPSr6 Virtual Processors (multi-threading) Paul Burton <paul.burton@imgtec.com> - 2016-02-03 04:20 +0100
    [PATCH 08/15] irqchip: mips-gic: Provide VP ID accessor Paul Burton <paul.burton@imgtec.com> - 2016-02-03 04:20 +0100
    [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels Paul Burton <paul.burton@imgtec.com> - 2016-02-03 04:20 +0100
      Re: [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels James Hogan <james.hogan@imgtec.com> - 2016-02-03 16:00 +0100
        Re: [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels Paul Burton <paul.burton@imgtec.com> - 2016-02-03 16:50 +0100
          Re: [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels James Hogan <james.hogan@imgtec.com> - 2016-02-03 17:20 +0100
    [PATCH 15/15] MIPS: smp-cps: Stop printing EJTAG exceptions to UART Paul Burton <paul.burton@imgtec.com> - 2016-02-03 04:30 +0100

#1324869 — [PATCH 00/15] Support for MIPSr6 Virtual Processors (multi-threading)

FromPaul Burton <paul.burton@imgtec.com>
Date2016-02-03 04:20 +0100
Subject[PATCH 00/15] Support for MIPSr6 Virtual Processors (multi-threading)
Message-ID<qXW93-4Ls-3@gated-at.bofh.it>
This series introduces support for the multi-core & multi-threading
capabilities of the I6400. That is, it introduces support for MIPSr6
Virtual Processors & enables CPS SMP for MIPSr6.

Based atop v4.5-rc2.

Markos Chandras (3):
  MIPS: traps: Make sure secondary cores have a sane ebase register
  MIPS: pm-cps: Avoid offset overflow on MIPSr6
  MIPS: CPC: Add start, stop and running CM3 CPC registers

Paul Burton (12):
  MIPS: Detect MIPSr6 Virtual Processor support
  MIPS: CM: Add CM GCR_BEV_BASE accessors
  MIPS: CM: Fix mips_cm_max_vp_width for UP kernels
  irqchip: mips-gic: Use HW IDs for VPE_OTHER_ADDR
  irqchip: mips-gic: Provide VP ID accessor
  MIPS: smp-cps: Ensure our VP ident calculation is correct
  MIPS: smp-cps: Pull cache init into a function
  MIPS: smp-cps: Pull boot config retrieval out of mips_cps_boot_vpes
  MIPS: smp-cps: Skip core setup if coherent
  MIPS: smp-cps: Support MIPSr6 Virtual Processors
  MIPS: smp-cps: Add nothreads kernel parameter
  MIPS: smp-cps: Stop printing EJTAG exceptions to UART

 arch/mips/Kconfig                    |   2 +-
 arch/mips/include/asm/cpu-features.h |   4 +
 arch/mips/include/asm/cpu-info.h     |   4 +-
 arch/mips/include/asm/cpu.h          |   1 +
 arch/mips/include/asm/mips-cm.h      |   6 +-
 arch/mips/include/asm/mips-cpc.h     |   3 +
 arch/mips/include/asm/mipsregs.h     |   1 +
 arch/mips/include/asm/smp-cps.h      |   2 +-
 arch/mips/kernel/cps-vec.S           | 296 ++++++++++++++++++++++-------------
 arch/mips/kernel/cpu-probe.c         |   2 +
 arch/mips/kernel/pm-cps.c            |  15 +-
 arch/mips/kernel/smp-cps.c           |  64 +++++++-
 arch/mips/kernel/traps.c             |   7 +
 drivers/irqchip/irq-mips-gic.c       |  22 ++-
 include/linux/irqchip/mips-gic.h     |  17 ++
 15 files changed, 320 insertions(+), 126 deletions(-)

-- 
2.7.0

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#1324870 — [PATCH 08/15] irqchip: mips-gic: Provide VP ID accessor

FromPaul Burton <paul.burton@imgtec.com>
Date2016-02-03 04:20 +0100
Subject[PATCH 08/15] irqchip: mips-gic: Provide VP ID accessor
Message-ID<qXW95-4Ls-33@gated-at.bofh.it>
In reply to#1324869
Provide a gic_read_local_vp_id() function to read the VCNUM field of the
GICs local VP_IDENT register. This will be used by a further patch to
check that the value reported by the GIC matches up with the kernels
calculation.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 drivers/irqchip/irq-mips-gic.c   |  8 ++++++++
 include/linux/irqchip/mips-gic.h | 17 +++++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 787bafc..e569c52 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -230,6 +230,14 @@ void gic_stop_count(void)
 
 #endif
 
+unsigned gic_read_local_vp_id(void)
+{
+	unsigned long ident;
+
+	ident = gic_read(GIC_REG(VPE_LOCAL, GIC_VP_IDENT));
+	return ident & GIC_VP_IDENT_VCNUM_MSK;
+}
+
 static bool gic_local_irq_is_routable(int intr)
 {
 	u32 vpe_ctl;
diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h
index ce824db..d5d82c7 100644
--- a/include/linux/irqchip/mips-gic.h
+++ b/include/linux/irqchip/mips-gic.h
@@ -103,6 +103,7 @@
 #define GIC_VPE_SWINT0_MAP_OFS		0x0054
 #define GIC_VPE_SWINT1_MAP_OFS		0x0058
 #define GIC_VPE_OTHER_ADDR_OFS		0x0080
+#define GIC_VP_IDENT_OFS		0x0088
 #define GIC_VPE_WD_CONFIG0_OFS		0x0090
 #define GIC_VPE_WD_COUNT0_OFS		0x0094
 #define GIC_VPE_WD_INITIAL0_OFS		0x0098
@@ -211,6 +212,10 @@
 #define GIC_VPE_SMASK_FDC_SHF		6
 #define GIC_VPE_SMASK_FDC_MSK		(MSK(1) << GIC_VPE_SMASK_FDC_SHF)
 
+/* GIC_VP_IDENT fields */
+#define GIC_VP_IDENT_VCNUM_SHF		0
+#define GIC_VP_IDENT_VCNUM_MSK		(MSK(6) << GIC_VP_IDENT_VCNUM_SHF)
+
 /* GIC nomenclature for Core Interrupt Pins. */
 #define GIC_CPU_INT0		0 /* Core Interrupt 2 */
 #define GIC_CPU_INT1		1 /* .		      */
@@ -281,4 +286,16 @@ static inline int gic_get_usm_range(struct resource *gic_usm_res)
 
 #endif /* CONFIG_MIPS_GIC */
 
+/**
+ * gic_read_local_vp_id() - read the local VPs VCNUM
+ *
+ * Read the VCNUM of the local VP from the GIC_VP_IDENT register and
+ * return it to the caller. This ID should be used to refer to the VP
+ * via the GICs VP-other region, or when calculating an offset to a
+ * bit representing the VP in interrupt masks.
+ *
+ * Return: The VCNUM value for the local VP.
+ */
+extern unsigned gic_read_local_vp_id(void);
+
 #endif /* __LINUX_IRQCHIP_MIPS_GIC_H */
-- 
2.7.0

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#1324871 — [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels

FromPaul Burton <paul.burton@imgtec.com>
Date2016-02-03 04:20 +0100
Subject[PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels
Message-ID<qXW95-4Ls-31@gated-at.bofh.it>
In reply to#1324869
Fix mips_cm_max_vp_width for UP kernels where it previously referenced
smp_num_siblings, which is not declared for UP kernels. This led to
build errors such as the following:

  drivers/built-in.o: In function `$L446':
  irq-mips-gic.c:(.text+0x1994): undefined reference to `smp_num_siblings'
  drivers/built-in.o:irq-mips-gic.c:(.text+0x199c): more undefined references to `smp_num_siblings' follow

On UP kernels simply return 1, leaving the reference to smp_num_siblings
in place only for SMP kernels.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/include/asm/mips-cm.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
index 1395bbc..3fdb6c9 100644
--- a/arch/mips/include/asm/mips-cm.h
+++ b/arch/mips/include/asm/mips-cm.h
@@ -462,7 +462,10 @@ static inline unsigned int mips_cm_max_vp_width(void)
 	if (mips_cm_revision() >= CM_REV_CM3)
 		return read_gcr_sys_config2() & CM_GCR_SYS_CONFIG2_MAXVPW_MSK;
 
-	return smp_num_siblings;
+	if (config_enabled(CONFIG_SMP))
+		return smp_num_siblings;
+
+	return 1;
 }
 
 /**
-- 
2.7.0

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#1325514 — Re: [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels

FromJames Hogan <james.hogan@imgtec.com>
Date2016-02-03 16:00 +0100
SubjectRe: [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels
Message-ID<qY74u-3fA-15@gated-at.bofh.it>
In reply to#1324871

[Multipart message — attachments visible in raw view] — view raw

On Wed, Feb 03, 2016 at 03:15:26AM +0000, Paul Burton wrote:
> Fix mips_cm_max_vp_width for UP kernels where it previously referenced
> smp_num_siblings, which is not declared for UP kernels. This led to
> build errors such as the following:
> 
>   drivers/built-in.o: In function `$L446':
>   irq-mips-gic.c:(.text+0x1994): undefined reference to `smp_num_siblings'
>   drivers/built-in.o:irq-mips-gic.c:(.text+0x199c): more undefined references to `smp_num_siblings' follow
> 
> On UP kernels simply return 1, leaving the reference to smp_num_siblings
> in place only for SMP kernels.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>

Need tagging for stable v4.3+?

I do wonder if this should be handled in the header files though...

Cheers
James

> ---
> 
>  arch/mips/include/asm/mips-cm.h | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
> index 1395bbc..3fdb6c9 100644
> --- a/arch/mips/include/asm/mips-cm.h
> +++ b/arch/mips/include/asm/mips-cm.h
> @@ -462,7 +462,10 @@ static inline unsigned int mips_cm_max_vp_width(void)
>  	if (mips_cm_revision() >= CM_REV_CM3)
>  		return read_gcr_sys_config2() & CM_GCR_SYS_CONFIG2_MAXVPW_MSK;
>  
> -	return smp_num_siblings;
> +	if (config_enabled(CONFIG_SMP))
> +		return smp_num_siblings;
> +
> +	return 1;
>  }
>  
>  /**
> -- 
> 2.7.0
> 
>

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#1325558 — Re: [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels

FromPaul Burton <paul.burton@imgtec.com>
Date2016-02-03 16:50 +0100
SubjectRe: [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels
Message-ID<qY7QS-3Om-13@gated-at.bofh.it>
In reply to#1325514
On Wed, Feb 03, 2016 at 02:58:59PM +0000, James Hogan wrote:
> On Wed, Feb 03, 2016 at 03:15:26AM +0000, Paul Burton wrote:
> > Fix mips_cm_max_vp_width for UP kernels where it previously referenced
> > smp_num_siblings, which is not declared for UP kernels. This led to
> > build errors such as the following:
> > 
> >   drivers/built-in.o: In function `$L446':
> >   irq-mips-gic.c:(.text+0x1994): undefined reference to `smp_num_siblings'
> >   drivers/built-in.o:irq-mips-gic.c:(.text+0x199c): more undefined references to `smp_num_siblings' follow
> > 
> > On UP kernels simply return 1, leaving the reference to smp_num_siblings
> > in place only for SMP kernels.
> > 
> > Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> 
> Need tagging for stable v4.3+?

It happens that there were no uses of mips_cm_max_vp_width in UP
kernels, but some are added later in this series (the next patch for
instance). So I don't see a need to backport to stable branches. Sorry
that could have been clearer.

> I do wonder if this should be handled in the header files though...

As in you don't think it should be handled in headers? It seems like the
logical place to do it to me...

Or do you mean smp_num_siblings should be defined as 1 for UP kernels? I
did consider that approach, but thought this possibly more semantically
correct since smp isn't in use at all so neither is smp_num_siblings.

Thanks,
    Paul

> Cheers
> James
> 
> > ---
> > 
> >  arch/mips/include/asm/mips-cm.h | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
> > index 1395bbc..3fdb6c9 100644
> > --- a/arch/mips/include/asm/mips-cm.h
> > +++ b/arch/mips/include/asm/mips-cm.h
> > @@ -462,7 +462,10 @@ static inline unsigned int mips_cm_max_vp_width(void)
> >  	if (mips_cm_revision() >= CM_REV_CM3)
> >  		return read_gcr_sys_config2() & CM_GCR_SYS_CONFIG2_MAXVPW_MSK;
> >  
> > -	return smp_num_siblings;
> > +	if (config_enabled(CONFIG_SMP))
> > +		return smp_num_siblings;
> > +
> > +	return 1;
> >  }
> >  
> >  /**
> > -- 
> > 2.7.0
> > 
> >

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#1325609 — Re: [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels

FromJames Hogan <james.hogan@imgtec.com>
Date2016-02-03 17:20 +0100
SubjectRe: [PATCH 06/15] MIPS: CM: Fix mips_cm_max_vp_width for UP kernels
Message-ID<qY8jV-4ft-43@gated-at.bofh.it>
In reply to#1325558

[Multipart message — attachments visible in raw view] — view raw

On Wed, Feb 03, 2016 at 03:46:34PM +0000, Paul Burton wrote:
> On Wed, Feb 03, 2016 at 02:58:59PM +0000, James Hogan wrote:
> > On Wed, Feb 03, 2016 at 03:15:26AM +0000, Paul Burton wrote:
> > > Fix mips_cm_max_vp_width for UP kernels where it previously referenced
> > > smp_num_siblings, which is not declared for UP kernels. This led to
> > > build errors such as the following:
> > > 
> > >   drivers/built-in.o: In function `$L446':
> > >   irq-mips-gic.c:(.text+0x1994): undefined reference to `smp_num_siblings'
> > >   drivers/built-in.o:irq-mips-gic.c:(.text+0x199c): more undefined references to `smp_num_siblings' follow
> > > 
> > > On UP kernels simply return 1, leaving the reference to smp_num_siblings
> > > in place only for SMP kernels.
> > > 
> > > Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> > 
> > Need tagging for stable v4.3+?
> 
> It happens that there were no uses of mips_cm_max_vp_width in UP
> kernels, but some are added later in this series (the next patch for
> instance). So I don't see a need to backport to stable branches. Sorry
> that could have been clearer.
> 
> > I do wonder if this should be handled in the header files though...
> 
> As in you don't think it should be handled in headers? It seems like the
> logical place to do it to me...
> 
> Or do you mean smp_num_siblings should be defined as 1 for UP kernels? I
> did consider that approach, but thought this possibly more semantically
> correct since smp isn't in use at all so neither is smp_num_siblings.

Yeh, I meant this (didn't really register that the code in this patch
was a header too tbh).

Cheers
James

> 
> Thanks,
>     Paul
> 
> > Cheers
> > James
> > 
> > > ---
> > > 
> > >  arch/mips/include/asm/mips-cm.h | 5 ++++-
> > >  1 file changed, 4 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
> > > index 1395bbc..3fdb6c9 100644
> > > --- a/arch/mips/include/asm/mips-cm.h
> > > +++ b/arch/mips/include/asm/mips-cm.h
> > > @@ -462,7 +462,10 @@ static inline unsigned int mips_cm_max_vp_width(void)
> > >  	if (mips_cm_revision() >= CM_REV_CM3)
> > >  		return read_gcr_sys_config2() & CM_GCR_SYS_CONFIG2_MAXVPW_MSK;
> > >  
> > > -	return smp_num_siblings;
> > > +	if (config_enabled(CONFIG_SMP))
> > > +		return smp_num_siblings;
> > > +
> > > +	return 1;
> > >  }
> > >  
> > >  /**
> > > -- 
> > > 2.7.0
> > > 
> > > 
> 
>

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#1324874 — [PATCH 15/15] MIPS: smp-cps: Stop printing EJTAG exceptions to UART

FromPaul Burton <paul.burton@imgtec.com>
Date2016-02-03 04:30 +0100
Subject[PATCH 15/15] MIPS: smp-cps: Stop printing EJTAG exceptions to UART
Message-ID<qXWiK-4Pu-7@gated-at.bofh.it>
In reply to#1324869
When CONFIG_MIPS_CPS_NS16550 is enabled, some register state is dumped
to the UART when an exception is taken via the BEV on secondary cores.
EJTAG exceptions are architecturally expected to be handled by the BEV
even when Status.BEV is 0. This effectively means that if userland
executes an sdbbp instruction on a secondary core then the kernel dumps
register state to the UART even though the exception is perfectly normal
& expected. Prevent this by simply not dumping information to the UART
for EJTAG exceptions.

Fixes: 609cf6f2291a ("MIPS: CPS: Early debug using an ns16550-compatible UART")
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---

 arch/mips/kernel/cps-vec.S | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
index c28138d..51b98dc 100644
--- a/arch/mips/kernel/cps-vec.S
+++ b/arch/mips/kernel/cps-vec.S
@@ -223,7 +223,6 @@ LEAF(excep_intex)
 
 .org 0x480
 LEAF(excep_ejtag)
-	DUMP_EXCEP("EJTAG")
 	PTR_LA	k0, ejtag_debug_handler
 	jr	k0
 	 nop
-- 
2.7.0

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