Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1323346 > unrolled thread
| Started by | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> |
|---|---|
| First post | 2016-02-01 18:30 +0100 |
| Last post | 2016-02-03 09:50 +0100 |
| Articles | 3 — 2 participants |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
[PATCH RFC 07/15] ASoC: qcom: add mic related i2s control register defines Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2016-02-01 18:30 +0100
Re: [alsa-devel] [PATCH RFC 07/15] ASoC: qcom: add mic related i2s control register defines Kenneth Westfield <kwestfie@codeaurora.org> - 2016-02-03 01:40 +0100
Re: [alsa-devel] [PATCH RFC 07/15] ASoC: qcom: add mic related i2s control register defines Srinivas Kandagatla <srinivas.kandagatla@linaro.org> - 2016-02-03 09:50 +0100
| From | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> |
|---|---|
| Date | 2016-02-01 18:30 +0100 |
| Subject | [PATCH RFC 07/15] ASoC: qcom: add mic related i2s control register defines |
| Message-ID | <qXqsz-6bL-29@gated-at.bofh.it> |
This patch adds mic related bitmasks and offsets in the i2c control register. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> --- sound/soc/qcom/lpass-lpaif-reg.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/sound/soc/qcom/lpass-lpaif-reg.h b/sound/soc/qcom/lpass-lpaif-reg.h index 95e22f1..8a64d1a 100644 --- a/sound/soc/qcom/lpass-lpaif-reg.h +++ b/sound/soc/qcom/lpass-lpaif-reg.h @@ -47,6 +47,28 @@ #define LPAIF_I2SCTL_SPKMONO_STEREO (0 << LPAIF_I2SCTL_SPKMONO_SHIFT) #define LPAIF_I2SCTL_SPKMONO_MONO (1 << LPAIF_I2SCTL_SPKMONO_SHIFT) +#define LPAIF_I2SCTL_MICEN_MASK GENMASK(8, 8) +#define LPAIF_I2SCTL_MICEN_SHIFT 8 +#define LPAIF_I2SCTL_MICEN_DISABLE (0 << LPAIF_I2SCTL_MICEN_SHIFT) +#define LPAIF_I2SCTL_MICEN_ENABLE (1 << LPAIF_I2SCTL_MICEN_SHIFT) + +#define LPAIF_I2SCTL_MICMODE_MASK GENMASK(7, 4) +#define LPAIF_I2SCTL_MICMODE_SHIFT 4 +#define LPAIF_I2SCTL_MICMODE_NONE (0 << LPAIF_I2SCTL_MICMODE_SHIFT) +#define LPAIF_I2SCTL_MICMODE_SD0 (1 << LPAIF_I2SCTL_MICMODE_SHIFT) +#define LPAIF_I2SCTL_MICMODE_SD1 (2 << LPAIF_I2SCTL_MICMODE_SHIFT) +#define LPAIF_I2SCTL_MICMODE_SD2 (3 << LPAIF_I2SCTL_MICMODE_SHIFT) +#define LPAIF_I2SCTL_MICMODE_SD3 (4 << LPAIF_I2SCTL_MICMODE_SHIFT) +#define LPAIF_I2SCTL_MICMODE_QUAD01 (5 << LPAIF_I2SCTL_MICMODE_SHIFT) +#define LPAIF_I2SCTL_MICMODE_QUAD02 (6 << LPAIF_I2SCTL_MICMODE_SHIFT) +#define LPAIF_I2SCTL_MICMODE_6CH (7 << LPAIF_I2SCTL_MICMODE_SHIFT) +#define LPAIF_I2SCTL_MICMODE_8CH (8 << LPAIF_I2SCTL_MICMODE_SHIFT) + +#define LPAIF_I2SCTL_MIMONO_MASK GENMASK(3, 3) +#define LPAIF_I2SCTL_MICMONO_SHIFT 3 +#define LPAIF_I2SCTL_MICMONO_STEREO (0 << LPAIF_I2SCTL_MICMONO_SHIFT) +#define LPAIF_I2SCTL_MICMONO_MONO (1 << LPAIF_I2SCTL_MICMONO_SHIFT) + #define LPAIF_I2SCTL_WSSRC_MASK 0x0004 #define LPAIF_I2SCTL_WSSRC_SHIFT 2 #define LPAIF_I2SCTL_WSSRC_INTERNAL (0 << LPAIF_I2SCTL_WSSRC_SHIFT) -- 1.9.1
[toc] | [next] | [standalone]
| From | Kenneth Westfield <kwestfie@codeaurora.org> |
|---|---|
| Date | 2016-02-03 01:40 +0100 |
| Subject | Re: [alsa-devel] [PATCH RFC 07/15] ASoC: qcom: add mic related i2s control register defines |
| Message-ID | <qXTEe-2Um-5@gated-at.bofh.it> |
| In reply to | #1323346 |
On Mon, Feb 01, 2016 at 09:28:55AM -0800, Srinivas Kandagatla wrote: > diff --git a/sound/soc/qcom/lpass-lpaif-reg.h > b/sound/soc/qcom/lpass-lpaif-reg.h > index 95e22f1..8a64d1a 100644 > --- a/sound/soc/qcom/lpass-lpaif-reg.h > +++ b/sound/soc/qcom/lpass-lpaif-reg.h > @@ -47,6 +47,28 @@ ... > +#define LPAIF_I2SCTL_MICMODE_MASK GENMASK(7, 4) > +#define LPAIF_I2SCTL_MICMODE_SHIFT 4 > +#define LPAIF_I2SCTL_MICMODE_NONE (0 << LPAIF_I2SCTL_MICMODE_SHIFT) > +#define LPAIF_I2SCTL_MICMODE_SD0 (1 << LPAIF_I2SCTL_MICMODE_SHIFT) > +#define LPAIF_I2SCTL_MICMODE_SD1 (2 << LPAIF_I2SCTL_MICMODE_SHIFT) > +#define LPAIF_I2SCTL_MICMODE_SD2 (3 << LPAIF_I2SCTL_MICMODE_SHIFT) > +#define LPAIF_I2SCTL_MICMODE_SD3 (4 << LPAIF_I2SCTL_MICMODE_SHIFT) > +#define LPAIF_I2SCTL_MICMODE_QUAD01 (5 << LPAIF_I2SCTL_MICMODE_SHIFT) > +#define LPAIF_I2SCTL_MICMODE_QUAD02 (6 << LPAIF_I2SCTL_MICMODE_SHIFT) > +#define LPAIF_I2SCTL_MICMODE_6CH (7 << LPAIF_I2SCTL_MICMODE_SHIFT) > +#define LPAIF_I2SCTL_MICMODE_8CH (8 << LPAIF_I2SCTL_MICMODE_SHIFT) LPAIF_I2SCTL_MICMODE_QUAD02 should be LPAIF_I2SCTL_MICMODE_QUAD23, as the suffix numbers refer to SD[0-3]. -- Kenneth Westfield Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
[toc] | [prev] | [next] | [standalone]
| From | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> |
|---|---|
| Date | 2016-02-03 09:50 +0100 |
| Subject | Re: [alsa-devel] [PATCH RFC 07/15] ASoC: qcom: add mic related i2s control register defines |
| Message-ID | <qY1ir-80l-41@gated-at.bofh.it> |
| In reply to | #1324766 |
On 03/02/16 00:36, Kenneth Westfield wrote: > On Mon, Feb 01, 2016 at 09:28:55AM -0800, Srinivas Kandagatla wrote: >> diff --git a/sound/soc/qcom/lpass-lpaif-reg.h >> b/sound/soc/qcom/lpass-lpaif-reg.h >> index 95e22f1..8a64d1a 100644 >> --- a/sound/soc/qcom/lpass-lpaif-reg.h >> +++ b/sound/soc/qcom/lpass-lpaif-reg.h >> @@ -47,6 +47,28 @@ > > ... > >> +#define LPAIF_I2SCTL_MICMODE_MASK GENMASK(7, 4) >> +#define LPAIF_I2SCTL_MICMODE_SHIFT 4 >> +#define LPAIF_I2SCTL_MICMODE_NONE (0 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_SD0 (1 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_SD1 (2 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_SD2 (3 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_SD3 (4 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_QUAD01 (5 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_QUAD02 (6 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_6CH (7 << LPAIF_I2SCTL_MICMODE_SHIFT) >> +#define LPAIF_I2SCTL_MICMODE_8CH (8 << LPAIF_I2SCTL_MICMODE_SHIFT) > > LPAIF_I2SCTL_MICMODE_QUAD02 should be LPAIF_I2SCTL_MICMODE_QUAD23, as > the suffix numbers refer to SD[0-3]. Ok, will fix this in next version. >
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web