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[RFC] hwmon: (fam15h_power) Add bit masking for tdp_limit

Started byGioh Kim <gi-oh.kim@profitbricks.com>
First post2016-01-25 12:50 +0100
Last post2016-01-27 11:40 +0100
Articles 4 — 3 participants

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  [RFC] hwmon: (fam15h_power) Add bit masking for tdp_limit Gioh Kim <gi-oh.kim@profitbricks.com> - 2016-01-25 12:50 +0100
    Re: [RFC] hwmon: (fam15h_power) Add bit masking for tdp_limit Guenter Roeck <linux@roeck-us.net> - 2016-01-26 03:50 +0100
    Re: [RFC] hwmon: (fam15h_power) Add bit masking for tdp_limit Gi-Oh Kim <gi-oh.kim@profitbricks.com> - 2016-01-26 12:00 +0100
      Re: [RFC] hwmon: (fam15h_power) Add bit masking for tdp_limit Gi-Oh Kim <gi-oh.kim@profitbricks.com> - 2016-01-27 11:40 +0100

#1316542 — [RFC] hwmon: (fam15h_power) Add bit masking for tdp_limit

FromGioh Kim <gi-oh.kim@profitbricks.com>
Date2016-01-25 12:50 +0100
Subject[RFC] hwmon: (fam15h_power) Add bit masking for tdp_limit
Message-ID<qUNOH-3ga-31@gated-at.bofh.it>
The bits [31:29] of D18F5xE8 TDP Limit3 are reserved.
I think it'd better to add masking to read ApmTdpLimit[28:16] precisely.

Signed-off-by: Gioh Kim <gi-oh.kim@profitbricks.com>
---
 drivers/hwmon/fam15h_power.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c
index f77eb97..f9647c8 100644
--- a/drivers/hwmon/fam15h_power.c
+++ b/drivers/hwmon/fam15h_power.c
@@ -90,7 +90,7 @@ static ssize_t show_power(struct device *dev,
 	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
 				  REG_TDP_LIMIT3, &val);
 
-	tdp_limit = val >> 16;
+	tdp_limit = (val >> 16) & 0x1fff;
 	curr_pwr_watts = ((u64)(tdp_limit +
 				data->base_tdp)) << running_avg_range;
 	curr_pwr_watts -= running_avg_capture;
-- 
2.5.0

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#1317482

FromGuenter Roeck <linux@roeck-us.net>
Date2016-01-26 03:50 +0100
Message-ID<qV1RE-4VC-5@gated-at.bofh.it>
In reply to#1316542
On 01/25/2016 06:25 PM, Huang Rui wrote:
> On Mon, Jan 25, 2016 at 07:41:07PM +0800, Gioh Kim wrote:
>> The bits [31:29] of D18F5xE8 TDP Limit3 are reserved.
>> I think it'd better to add masking to read ApmTdpLimit[28:16] precisely.
>>
>> Signed-off-by: Gioh Kim <gi-oh.kim@profitbricks.com>
>> ---
>>   drivers/hwmon/fam15h_power.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c
>> index f77eb97..f9647c8 100644
>> --- a/drivers/hwmon/fam15h_power.c
>> +++ b/drivers/hwmon/fam15h_power.c
>> @@ -90,7 +90,7 @@ static ssize_t show_power(struct device *dev,
>>   	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
>>   				  REG_TDP_LIMIT3, &val);
>>
>> -	tdp_limit = val >> 16;
>> +	tdp_limit = (val >> 16) & 0x1fff;
>
>
> Thanks to send the patch on fam15h_power driver. :-)
> In latest AMD (family 15h, Model 60h) processor, ApmTdpLimit field is
> expanded to [32:16]. The orignal reserved bits actually are reserved
> for ApmTdpLimit expansion.
>
> http://support.amd.com/TechDocs/50742_15h_Models_60h-6Fh_BKDG.pdf
>
> Guenter, Will I collect all patches of fam15h_power and send them to
> you, or ack it that you can apply directly?
>

Ack is fine. No need to make things more complicated than necessary.

Thanks,
Guenter

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#1317733

FromGi-Oh Kim <gi-oh.kim@profitbricks.com>
Date2016-01-26 12:00 +0100
Message-ID<qV9vP-2Vi-5@gated-at.bofh.it>
In reply to#1316542

On 26.01.2016 03:25, Huang Rui wrote:
> On Mon, Jan 25, 2016 at 07:41:07PM +0800, Gioh Kim wrote:
>> The bits [31:29] of D18F5xE8 TDP Limit3 are reserved.
>> I think it'd better to add masking to read ApmTdpLimit[28:16] precisely.
>>
>> Signed-off-by: Gioh Kim <gi-oh.kim@profitbricks.com>
>> ---
>>   drivers/hwmon/fam15h_power.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c
>> index f77eb97..f9647c8 100644
>> --- a/drivers/hwmon/fam15h_power.c
>> +++ b/drivers/hwmon/fam15h_power.c
>> @@ -90,7 +90,7 @@ static ssize_t show_power(struct device *dev,
>>   	pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
>>   				  REG_TDP_LIMIT3, &val);
>>   
>> -	tdp_limit = val >> 16;
>> +	tdp_limit = (val >> 16) & 0x1fff;
>
> Thanks to send the patch on fam15h_power driver. :-)
> In latest AMD (family 15h, Model 60h) processor, ApmTdpLimit field is
> expanded to [32:16]. The orignal reserved bits actually are reserved
> for ApmTdpLimit expansion.
>
> http://support.amd.com/TechDocs/50742_15h_Models_60h-6Fh_BKDG.pdf
>
> Guenter, Will I collect all patches of fam15h_power and send them to
> you, or ack it that you can apply directly?
>
> Thanks,
> Rui

Thanks for your reply.
I'm not completely sure that the reserved bits are always zero.
Are they always zero?
Or do we need bit-masking like following?

-------------- 8< -----------------
Subject: [PATCH] hwmon: (fam15h_power) Add bit masking for tdp_limit

Add bit masking to read ApmTdpLimit precisely

Signed-off-by: Gioh Kim <gi-oh.kim@profitbricks.com>
---
  drivers/hwmon/fam15h_power.c | 6 +++++-
  1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c
index f77eb97..edbcf6c 100644
--- a/drivers/hwmon/fam15h_power.c
+++ b/drivers/hwmon/fam15h_power.c
@@ -90,7 +90,11 @@ static ssize_t show_power(struct device *dev,
      pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
                    REG_TDP_LIMIT3, &val);

-    tdp_limit = val >> 16;
+    if (boot_cpu_data.x86_model >= 0x60)
+        tdp_limit = val >> 16;
+    else
+        tdp_limit = (val >> 16) & 0x1fff;
+
      curr_pwr_watts = ((u64)(tdp_limit +
                  data->base_tdp)) << running_avg_range;
      curr_pwr_watts -= running_avg_capture;
-- 
2.5.0

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#1318839

FromGi-Oh Kim <gi-oh.kim@profitbricks.com>
Date2016-01-27 11:40 +0100
Message-ID<qVvG2-2ab-7@gated-at.bofh.it>
In reply to#1317733

On 27.01.2016 07:45, Huang Rui wrote:
> On Tue, Jan 26, 2016 at 11:57:35AM +0100, Gi-Oh Kim wrote:
>>
>> On 26.01.2016 03:25, Huang Rui wrote:
>>> On Mon, Jan 25, 2016 at 07:41:07PM +0800, Gioh Kim wrote:
>> Thanks for your reply.
>> I'm not completely sure that the reserved bits are always zero.
>> Are they always zero?
>> Or do we need bit-masking like following?
>>
> Reserved bits aren't always zero. But here they are reserved for
> ApmTdpLimit expansion.
>
> Yes, we would better add bit-masking here. :-)
>
>> -------------- 8< -----------------
>> Subject: [PATCH] hwmon: (fam15h_power) Add bit masking for tdp_limit
>>
>> Add bit masking to read ApmTdpLimit precisely
>>
>> Signed-off-by: Gioh Kim <gi-oh.kim@profitbricks.com>
>> ---
>>   drivers/hwmon/fam15h_power.c | 6 +++++-
>>   1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/hwmon/fam15h_power.c b/drivers/hwmon/fam15h_power.c
>> index f77eb97..edbcf6c 100644
>> --- a/drivers/hwmon/fam15h_power.c
>> +++ b/drivers/hwmon/fam15h_power.c
>> @@ -90,7 +90,11 @@ static ssize_t show_power(struct device *dev,
>>       pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
>>                     REG_TDP_LIMIT3, &val);
>>
>> -    tdp_limit = val >> 16;
>> +    if (boot_cpu_data.x86_model >= 0x60)
>> +        tdp_limit = val >> 16;
> You need add CPU family check and a comment to mention bit field
> change. This updates since family 15h and model 60h.
>
> if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60)

I'm going to send a formal patch.
Thank you.

>
> Thanks,
> Rui

-- 
Best regards,
Gi-Oh Kim

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