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Groups > linux.kernel > #1316987 > unrolled thread

[PATCH] ix86: fix types used in pgprot cachability flags translations

Started by"Jan Beulich" <JBeulich@suse.com>
First post2016-01-25 17:50 +0100
Last post2016-01-26 21:20 +0100
Articles 5 — 4 participants

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  [PATCH] ix86: fix types used in pgprot cachability flags  translations "Jan Beulich" <JBeulich@suse.com> - 2016-01-25 17:50 +0100
    Re: [PATCH] ix86: fix types used in pgprot cachability flags  translations Thomas Gleixner <tglx@linutronix.de> - 2016-01-25 18:10 +0100
      [PATCH v2] ix86: fix types used in pgprot cachability flags  translations "Jan Beulich" <JBeulich@suse.com> - 2016-01-26 12:20 +0100
        Re: [PATCH v2] ix86: fix types used in pgprot cachability flags  translations Juergen Gross <jgross@suse.com> - 2016-01-26 12:30 +0100
        [tip:x86/urgent] x86/mm:   Fix types used in pgprot cacheability flags translations tip-bot for Jan Beulich <tipbot@zytor.com> - 2016-01-26 21:20 +0100

#1316987 — [PATCH] ix86: fix types used in pgprot cachability flags translations

From"Jan Beulich" <JBeulich@suse.com>
Date2016-01-25 17:50 +0100
Subject[PATCH] ix86: fix types used in pgprot cachability flags translations
Message-ID<qUSv0-6M7-17@gated-at.bofh.it>
For PAE kernels "unsigned long" is not suitable to hold page protection
flags, since _PAGE_NX doesn't fit there. This is the reason for quite a
few W+X pages getting reported as insecure during boot (observed namely
for the entire initrd range).

Quite the other way around, "unsigned long" is inefficient for 64-bit
kernels when dealing with cachability flags alone - "unsigned int" is
sufficient here and allows for slightly smaller code to be generated.

Fixes: 281d4078be ("x86: Make page cache mode a real type")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Cc: Juergen Gross <jgross@suse.com> 
---
 arch/x86/include/asm/pgtable_types.h |    9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

--- 4.5-rc1/arch/x86/include/asm/pgtable_types.h
+++ 4.5-rc1-ix86-PAE-pgprot-xlat/arch/x86/include/asm/pgtable_types.h
@@ -357,9 +357,8 @@ static inline pgprot_t cachemode2pgprot(
 }
 static inline enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)
 {
-	unsigned long masked;
+	unsigned int masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK;
 
-	masked = pgprot_val(pgprot) & _PAGE_CACHE_MASK;
 	if (likely(masked == 0))
 		return 0;
 	return __pte2cachemode_tbl[__pte2cm_idx(masked)];
@@ -367,9 +366,8 @@ static inline enum page_cache_mode pgpro
 static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
 {
 	pgprot_t new;
-	unsigned long val;
+	pgprotval_t val = pgprot_val(pgprot);
 
-	val = pgprot_val(pgprot);
 	pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
 		((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
 	return new;
@@ -377,9 +375,8 @@ static inline pgprot_t pgprot_4k_2_large
 static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
 {
 	pgprot_t new;
-	unsigned long val;
+	pgprotval_t val = pgprot_val(pgprot);
 
-	val = pgprot_val(pgprot);
 	pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
 			  ((val & _PAGE_PAT_LARGE) >>
 			   (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));

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#1317054

FromThomas Gleixner <tglx@linutronix.de>
Date2016-01-25 18:10 +0100
Message-ID<qUSOp-7cE-59@gated-at.bofh.it>
In reply to#1316987
On Mon, 25 Jan 2016, Jan Beulich wrote:

> For PAE kernels "unsigned long" is not suitable to hold page protection
> flags, since _PAGE_NX doesn't fit there. This is the reason for quite a
> few W+X pages getting reported as insecure during boot (observed namely
> for the entire initrd range).
> 
> Quite the other way around, "unsigned long" is inefficient for 64-bit
> kernels when dealing with cachability flags alone - "unsigned int" is
> sufficient here and allows for slightly smaller code to be generated.

This part has nothing to do with the fix. Can you please avoid to mix fixes,
which require backporting and code enhancements?

Thanks,

	tglx

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#1317759 — [PATCH v2] ix86: fix types used in pgprot cachability flags translations

From"Jan Beulich" <JBeulich@suse.com>
Date2016-01-26 12:20 +0100
Subject[PATCH v2] ix86: fix types used in pgprot cachability flags translations
Message-ID<qV9Pd-3ib-37@gated-at.bofh.it>
In reply to#1317054
For PAE kernels "unsigned long" is not suitable to hold page protection
flags, since _PAGE_NX doesn't fit there. This is the reason for quite a
few W+X pages getting reported as insecure during boot (observed namely
for the entire initrd range).

Fixes: 281d4078be ("x86: Make page cache mode a real type")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Cc: Juergen Gross <jgross@suse.com> 
---
v2: Remove code enhancement part, as requested by tglx.
---
 arch/x86/include/asm/pgtable_types.h |    9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

--- 4.5-rc1/arch/x86/include/asm/pgtable_types.h
+++ 4.5-rc1-ix86-PAE-pgprot-xlat/arch/x86/include/asm/pgtable_types.h
@@ -367,9 +367,8 @@ static inline enum page_cache_mode pgpro
 static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
 {
 	pgprot_t new;
-	unsigned long val;
+	pgprotval_t val = pgprot_val(pgprot);
 
-	val = pgprot_val(pgprot);
 	pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
 		((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
 	return new;
@@ -377,9 +376,8 @@ static inline pgprot_t pgprot_4k_2_large
 static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
 {
 	pgprot_t new;
-	unsigned long val;
+	pgprotval_t val = pgprot_val(pgprot);
 
-	val = pgprot_val(pgprot);
 	pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
 			  ((val & _PAGE_PAT_LARGE) >>
 			   (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));

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#1317764 — Re: [PATCH v2] ix86: fix types used in pgprot cachability flags translations

FromJuergen Gross <jgross@suse.com>
Date2016-01-26 12:30 +0100
SubjectRe: [PATCH v2] ix86: fix types used in pgprot cachability flags translations
Message-ID<qV9YS-3ml-7@gated-at.bofh.it>
In reply to#1317759
On 26/01/16 12:15, Jan Beulich wrote:
> For PAE kernels "unsigned long" is not suitable to hold page protection
> flags, since _PAGE_NX doesn't fit there. This is the reason for quite a
> few W+X pages getting reported as insecure during boot (observed namely
> for the entire initrd range).
> 
> Fixes: 281d4078be ("x86: Make page cache mode a real type")
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> Cc: Juergen Gross <jgross@suse.com> 

Reviewed-by: Juergen Gross <jgross@suse.com>

> ---
> v2: Remove code enhancement part, as requested by tglx.
> ---
>  arch/x86/include/asm/pgtable_types.h |    9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> --- 4.5-rc1/arch/x86/include/asm/pgtable_types.h
> +++ 4.5-rc1-ix86-PAE-pgprot-xlat/arch/x86/include/asm/pgtable_types.h
> @@ -367,9 +367,8 @@ static inline enum page_cache_mode pgpro
>  static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
>  {
>  	pgprot_t new;
> -	unsigned long val;
> +	pgprotval_t val = pgprot_val(pgprot);
>  
> -	val = pgprot_val(pgprot);
>  	pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
>  		((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
>  	return new;
> @@ -377,9 +376,8 @@ static inline pgprot_t pgprot_4k_2_large
>  static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
>  {
>  	pgprot_t new;
> -	unsigned long val;
> +	pgprotval_t val = pgprot_val(pgprot);
>  
> -	val = pgprot_val(pgprot);
>  	pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
>  			  ((val & _PAGE_PAT_LARGE) >>
>  			   (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
> 
> 
> 
>

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#1318331 — [tip:x86/urgent] x86/mm: Fix types used in pgprot cacheability flags translations

Fromtip-bot for Jan Beulich <tipbot@zytor.com>
Date2016-01-26 21:20 +0100
Subject[tip:x86/urgent] x86/mm: Fix types used in pgprot cacheability flags translations
Message-ID<qVifL-QQ-1@gated-at.bofh.it>
In reply to#1317759
Commit-ID:  3625c2c234ef66acf21a72d47a5ffa94f6c5ebf2
Gitweb:     http://git.kernel.org/tip/3625c2c234ef66acf21a72d47a5ffa94f6c5ebf2
Author:     Jan Beulich <JBeulich@suse.com>
AuthorDate: Tue, 26 Jan 2016 04:15:18 -0700
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Tue, 26 Jan 2016 21:05:36 +0100

x86/mm: Fix types used in pgprot cacheability flags translations

For PAE kernels "unsigned long" is not suitable to hold page protection
flags, since _PAGE_NX doesn't fit there. This is the reason for quite a
few W+X pages getting reported as insecure during boot (observed namely
for the entire initrd range).

Fixes: 281d4078be ("x86: Make page cache mode a real type")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Juergen Gross <JGross@suse.com>
Cc: stable@vger.kernel.org
Link: http://lkml.kernel.org/r/56A7635602000078000CAFF1@prv-mh.provo.novell.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/include/asm/pgtable_types.h | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index a471cad..79c9185 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -363,20 +363,18 @@ static inline enum page_cache_mode pgprot2cachemode(pgprot_t pgprot)
 }
 static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot)
 {
+	pgprotval_t val = pgprot_val(pgprot);
 	pgprot_t new;
-	unsigned long val;
 
-	val = pgprot_val(pgprot);
 	pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
 		((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));
 	return new;
 }
 static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot)
 {
+	pgprotval_t val = pgprot_val(pgprot);
 	pgprot_t new;
-	unsigned long val;
 
-	val = pgprot_val(pgprot);
 	pgprot_val(new) = (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) |
 			  ((val & _PAGE_PAT_LARGE) >>
 			   (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT));

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