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[PATCH v4 0/4] VT-d posted-interrupts follow ups

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  [PATCH v4 0/4] VT-d posted-interrupts follow ups Feng Wu <feng.wu@intel.com> - 2016-01-25 10:20 +0100
    [PATCH v4 1/4] KVM: Recover IRTE to remapped mode if the interrupt is not single-destination Feng Wu <feng.wu@intel.com> - 2016-01-25 10:20 +0100
      Re: [PATCH v4 1/4] KVM: Recover IRTE to remapped mode if the  interrupt is not single-destination Radim Krčmář <rkrcmar@redhat.com> - 2016-01-26 20:00 +0100
    [PATCH v4 3/4] KVM: x86: Add lowest-priority support for vt-d posted-interrupts Feng Wu <feng.wu@intel.com> - 2016-01-25 10:20 +0100
      Re: [PATCH v4 3/4] KVM: x86: Add lowest-priority support for vt-d  posted-interrupts Radim Krčmář <rkrcmar@redhat.com> - 2016-01-26 20:10 +0100

#1316313 — [PATCH v4 0/4] VT-d posted-interrupts follow ups

This series contains 4 patches:
[1/4]: Change back to remapped mode when posted mode is not used.
[2/4]: Add vector-hashing support to deliver lowest-priority
       interrupts for non VT-d PI case.
[3/4]: Add vector-hashing support to deliver lowest-priority
       interrupts for VT-d PI case.
[4/4]: Add some enhancement to the trace message for vt-d PI.

Detailed changelog is in each patch.

Feng Wu (4):
  KVM: Recover IRTE to remapped mode if the interrupt is not
    single-destination
  KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
  KVM: x86: Add lowest-priority support for vt-d posted-interrupts
  KVM/VMX: Add host irq information in trace event when updating IRTE
    for posted interrupts

 arch/x86/include/asm/kvm_host.h |   2 +
 arch/x86/kvm/irq_comm.c         |  25 ++++++++--
 arch/x86/kvm/lapic.c            | 106 ++++++++++++++++++++++++++++++++++++----
 arch/x86/kvm/lapic.h            |   2 +
 arch/x86/kvm/trace.h            |  12 +++--
 arch/x86/kvm/vmx.c              |  17 ++++++-
 arch/x86/kvm/x86.c              |   9 ++++
 arch/x86/kvm/x86.h              |   1 +
 8 files changed, 154 insertions(+), 20 deletions(-)

-- 
2.1.0

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#1316315 — [PATCH v4 1/4] KVM: Recover IRTE to remapped mode if the interrupt is not single-destination

When the interrupt is not single destination any more, we need
to change back IRTE to remapped mode explicitly.

Signed-off-by: Feng Wu <feng.wu@intel.com>
---
v4:
- Don't need to Set SN before changing back to remapped mode

 arch/x86/kvm/vmx.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index e2951b6..a4b4aa4 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -10764,8 +10764,21 @@ static int vmx_update_pi_irte(struct kvm *kvm, unsigned int host_irq,
 		 */
 
 		kvm_set_msi_irq(e, &irq);
-		if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu))
+		if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu)) {
+			/*
+			 * Make sure the IRTE is in remapped mode if
+			 * we don't handle it in posted mode.
+			 */
+			ret = irq_set_vcpu_affinity(host_irq, NULL);
+			if (ret < 0) {
+				printk(KERN_INFO
+				   "failed to back to remapped mode, irq: %u\n",
+				   host_irq);
+				goto out;
+			}
+
 			continue;
+		}
 
 		vcpu_info.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu));
 		vcpu_info.vector = irq.vector;
-- 
2.1.0

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#1318260 — Re: [PATCH v4 1/4] KVM: Recover IRTE to remapped mode if the interrupt is not single-destination

2016-01-25 16:53+0800, Feng Wu:
> When the interrupt is not single destination any more, we need
> to change back IRTE to remapped mode explicitly.
> 
> Signed-off-by: Feng Wu <feng.wu@intel.com>
> ---

Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>

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#1316316 — [PATCH v4 3/4] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

Use vector-hashing to deliver lowest-priority interrupts for
VT-d posted-interrupts. This patch extends kvm_intr_is_single_vcpu()
to support lowest-priority handling.

Signed-off-by: Feng Wu <feng.wu@intel.com>
---
v4:
- Recover the function name to 'kvm_intr_is_single_vcpu'
- Stylistic changes

v3:
- Remove unnecessary check in fast irq delivery patch
- print a error message only once for each guest when we find hardware
  disabled LAPIC during interrupt injection.

 arch/x86/kvm/lapic.c | 56 +++++++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 49 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 1a4ca1d..1520d1a 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -798,6 +798,20 @@ out:
 	return ret;
 }
 
+/*
+ * This routine tries to handler interrupts in posted mode, here is how
+ * it deals with different cases:
+ * - For single-destination interrupts, handle it in posted mode
+ * - Else if vector hashing is enabled and it is a lowest-priority
+ *   interrupt, handle it in posted mode and use the following mechanism
+ *   to find the destinaiton vCPU.
+ *	1. For lowest-priority interrupts, store all the possible
+ *	   destination vCPUs in an array.
+ *	2. Use "guest vector % max number of destination vCPUs" to find
+ *	   the right destination vCPU in the array for the lowest-priority
+ *	   interrupt.
+ * - Otherwise, use remapped mode to inject the interrupt.
+ */
 bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
 			struct kvm_vcpu **dest_vcpu)
 {
@@ -839,16 +853,44 @@ bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
 		if (cid >= ARRAY_SIZE(map->logical_map))
 			goto out;
 
-		for_each_set_bit(i, &bitmap, 16) {
-			dst = map->logical_map[cid][i];
-			if (++r == 2)
+		if (kvm_vector_hashing_enabled() &&
+				kvm_lowest_prio_delivery(irq)) {
+			int idx;
+			unsigned int dest_vcpus;
+
+			dest_vcpus = hweight16(bitmap);
+			if (dest_vcpus == 0)
 				goto out;
-		}
 
-		if (dst && kvm_apic_present(dst->vcpu))
+			idx = kvm_vector_to_index(irq->vector, dest_vcpus,
+						  &bitmap, 16);
+
+			/*
+			 * We may find a hardware disabled LAPIC here, if that
+			 * is the case, print out a error message once for each
+			 * guest and return
+			 */
+			dst = map->logical_map[cid][idx];
+			if (!dst && !kvm->arch.disabled_lapic_found) {
+				kvm->arch.disabled_lapic_found = true;
+				printk(KERN_INFO
+					"Disabled LAPIC found during irq injection\n");
+				goto out;
+			}
+
 			*dest_vcpu = dst->vcpu;
-		else
-			goto out;
+		} else {
+			for_each_set_bit(i, &bitmap, 16) {
+				dst = map->logical_map[cid][i];
+				if (++r == 2)
+					goto out;
+			}
+
+			if (dst && kvm_apic_present(dst->vcpu))
+				*dest_vcpu = dst->vcpu;
+			else
+				goto out;
+		}
 	}
 
 	ret = true;
-- 
2.1.0

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#1318263 — Re: [PATCH v4 3/4] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2016-01-25 16:53+0800, Feng Wu:
> Use vector-hashing to deliver lowest-priority interrupts for
> VT-d posted-interrupts. This patch extends kvm_intr_is_single_vcpu()
> to support lowest-priority handling.
> 
> Signed-off-by: Feng Wu <feng.wu@intel.com>
> ---

Reviewed-by: Radim Krčmář <rkrcmar@redhat.com>

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