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[PATCH 0/4] ARM: dts: imx53: update Ka-Ro electronics TX53 module support

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  [PATCH 0/4] ARM: dts: imx53: update Ka-Ro electronics TX53 module support Lothar Waßmann <LW@KARO-electronics.de> - 2016-01-20 14:20 +0100
    [PATCH 4/4] ARM: dts: imx53-tx53: set correct mclk frequency Lothar Waßmann <LW@KARO-electronics.de> - 2016-01-20 14:20 +0100
    [PATCH 1/4] ARM: dts: imx53: add ethernet PHY supply regulator Lothar Waßmann <LW@KARO-electronics.de> - 2016-01-20 14:20 +0100

#1313218 — [PATCH 0/4] ARM: dts: imx53: update Ka-Ro electronics TX53 module support

This patchset provides some bugfixes and support for a new display for
the Ka-Ro electronics TX53 modules.

ARM: dts: imx53: add ethernet PHY supply regulator
ARM: dts: imx53: fix LVDS data-mapping and data-width
ARM: dts: imx53: add display timing for NL12880BC20
ARM: dts: imx53-tx53: set correct mclk frequency

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#1313220 — [PATCH 4/4] ARM: dts: imx53-tx53: set correct mclk frequency

The reference clock for the SGTL5000 is generated by a 26MHz crystal
oscillator on the Ka-Ro electronics STK5 eval kits. Use the correct
frequency setting in DTB.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
---
 arch/arm/boot/dts/imx53-tx53.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx53-tx53.dtsi b/arch/arm/boot/dts/imx53-tx53.dtsi
index 8f08389..d15cc89 100644
--- a/arch/arm/boot/dts/imx53-tx53.dtsi
+++ b/arch/arm/boot/dts/imx53-tx53.dtsi
@@ -37,7 +37,7 @@
 			compatible = "fixed-clock";
 			reg = <0>;
 			#clock-cells = <0>;
-			clock-frequency = <27000000>;
+			clock-frequency = <26000000>;
 		};
 	};
 
-- 
2.1.4

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#1313221 — [PATCH 1/4] ARM: dts: imx53: add ethernet PHY supply regulator

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
---
 arch/arm/boot/dts/imx53-tx53.dtsi | 40 ++++++++++++++++++++++++++++++---------
 1 file changed, 31 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/imx53-tx53.dtsi b/arch/arm/boot/dts/imx53-tx53.dtsi
index d3e50b2..8f08389 100644
--- a/arch/arm/boot/dts/imx53-tx53.dtsi
+++ b/arch/arm/boot/dts/imx53-tx53.dtsi
@@ -87,9 +87,20 @@
 			regulator-max-microvolt = <3300000>;
 		};
 
-		reg_can_xcvr: regulator@2 {
+		reg_3v3_etn: regulator@2 {
 			compatible = "regulator-fixed";
 			reg = <2>;
+			regulator-name = "ETN 3V3";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_etn_phy>;
+			gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
+		};
+
+		reg_can_xcvr: regulator@3 {
+			compatible = "regulator-fixed";
+			reg = <3>;
 			regulator-name = "CAN XCVR";
 			regulator-min-microvolt = <3300000>;
 			regulator-max-microvolt = <3300000>;
@@ -98,9 +109,9 @@
 			gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
 		};
 
-		reg_usbh1_vbus: regulator@3 {
+		reg_usbh1_vbus: regulator@4 {
 			compatible = "regulator-fixed";
-			reg = <3>;
+			reg = <4>;
 			regulator-name = "usbh1_vbus";
 			regulator-min-microvolt = <5000000>;
 			regulator-max-microvolt = <5000000>;
@@ -110,9 +121,9 @@
 			enable-active-high;
 		};
 
-		reg_usbotg_vbus: regulator@4 {
+		reg_usbotg_vbus: regulator@5 {
 			compatible = "regulator-fixed";
-			reg = <4>;
+			reg = <5>;
 			regulator-name = "usbotg_vbus";
 			regulator-min-microvolt = <5000000>;
 			regulator-max-microvolt = <5000000>;
@@ -204,13 +215,20 @@
 	phy-mode = "rmii";
 	phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
 	phy-handle = <&phy0>;
+	phy-supply = <&reg_3v3_etn>;
 	mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
 	status = "okay";
 
-	phy0: ethernet-phy@0 {
-		interrupt-parent = <&gpio2>;
-		interrupts = <4>;
-		device_type = "ethernet-phy";
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		phy0: ethernet-phy@0 {
+			compatible = "ethernet-phy-id0007.c0f1", "ethernet-phy-ieee802.3-c22";
+			reg = <0>;
+			interrupt-parent = <&gpio2>;
+			interrupts = <4>;
+		};
 	};
 };
 
@@ -309,6 +327,10 @@
 			fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
 		};
 
+		pinctrl_etn_phy: etn-phygrp {
+			fsl,pins = <MX53_PAD_EIM_D20__GPIO3_20 0xe0>; /* ETN PHY Power enable */
+		};
+
 		pinctrl_ds1339: ds1339grp {
 			fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
 		};
-- 
2.1.4

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