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Re: [PATCH v5 1/5] PCI: designware: ensure ATU is enabled before IO/conf space accesses

Started byStanimir Varbanov <svarbanov@mm-sol.com>
First post2016-01-04 15:40 +0100
Last post2016-01-04 15:40 +0100
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  Re: [PATCH v5 1/5] PCI: designware: ensure ATU is enabled before  IO/conf space accesses Stanimir Varbanov <svarbanov@mm-sol.com> - 2016-01-04 15:40 +0100

#1300778 — Re: [PATCH v5 1/5] PCI: designware: ensure ATU is enabled before IO/conf space accesses

FromStanimir Varbanov <svarbanov@mm-sol.com>
Date2016-01-04 15:40 +0100
SubjectRe: [PATCH v5 1/5] PCI: designware: ensure ATU is enabled before IO/conf space accesses
Message-ID<qNesG-4F6-7@gated-at.bofh.it>
On 12/18/2015 04:41 PM, Pratyush Anand wrote:
> On Fri, Dec 18, 2015 at 6:08 PM, Stanimir Varbanov
> <stanimir.varbanov@linaro.org> wrote:
>> There is no guarantees that enabling ATU will hit the hardware
>> immediately, and subsequent accesses to configuration / IO spaces
>> are reliable. So fixing this by read back PCIE_ATU_CR2 register
>> just after writing.
>>
>> Without such a fix the PCI device enumeration during kernel boot
>> is not reliable, and reading configuration space for particular
>> PCI device on the bus returns zero aka no device.
>>
>> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
> 
> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>

Bjorn, Do you want to resend the whole patchset with collected acks and
tested tags?


-- 
regards,
Stan
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