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[PATCH v3 net-next] net: ethernet: cadence-macb: Add disabled usrio caps

Started byNeil Armstrong <narmstrong@baylibre.com>
First post2016-01-04 10:10 +0100
Last post2016-01-07 22:30 +0100
Articles 18 — 4 participants

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  [PATCH v3 net-next] net: ethernet: cadence-macb: Add disabled usrio caps Neil Armstrong <narmstrong@baylibre.com> - 2016-01-04 10:10 +0100
    Re: [PATCH v3 net-next] net: ethernet: cadence-macb: Add disabled  usrio caps Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-01-04 10:30 +0100
    [PATCH v4 net-next 1/3] net: ethernet: cadence-macb: Add disabled usrio caps Neil Armstrong <narmstrong@baylibre.com> - 2016-01-04 10:50 +0100
    [PATCH v4 net-next 3/3] dt-bindings: net: macb: Add NPx macb variant Neil Armstrong <narmstrong@baylibre.com> - 2016-01-04 10:50 +0100
    [PATCH v4 net-next 0/3] Add new capability and macb DT variant Neil Armstrong <narmstrong@baylibre.com> - 2016-01-04 10:50 +0100
      [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap Neil Armstrong <narmstrong@baylibre.com> - 2016-01-04 10:50 +0100
        Re: [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using  USRIO_DISABLED cap Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-01-04 11:40 +0100
          Re: [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using  USRIO_DISABLED cap Neil Armstrong <narmstrong@baylibre.com> - 2016-01-05 13:30 +0100
            Re: [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using  USRIO_DISABLED cap Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-01-05 14:30 +0100
      [PATCH v5 net-next 0/3] Add new capability and macb DT variant Neil Armstrong <narmstrong@baylibre.com> - 2016-01-05 14:40 +0100
        [PATCH v5 net-next 1/3] net: ethernet: cadence-macb: Add disabled usrio caps Neil Armstrong <narmstrong@baylibre.com> - 2016-01-05 14:40 +0100
          Re: [PATCH v5 net-next 1/3] net: ethernet: cadence-macb: Add disabled  usrio caps Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-01-05 14:50 +0100
        [PATCH v5 net-next 3/3] dt-bindings: net: macb: Add NP4 macb variant Neil Armstrong <narmstrong@baylibre.com> - 2016-01-05 14:50 +0100
          Re: [PATCH v5 net-next 3/3] dt-bindings: net: macb: Add NP4 macb  variant Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-01-05 14:50 +0100
          Re: [PATCH v5 net-next 3/3] dt-bindings: net: macb: Add NP4 macb  variant Rob Herring <robh@kernel.org> - 2016-01-06 16:00 +0100
        [PATCH v5 net-next 2/3] net: macb: Add NP4 macb config using USRIO_DISABLED Neil Armstrong <narmstrong@baylibre.com> - 2016-01-05 14:50 +0100
          Re: [PATCH v5 net-next 2/3] net: macb: Add NP4 macb config using  USRIO_DISABLED Nicolas Ferre <nicolas.ferre@atmel.com> - 2016-01-05 14:50 +0100
        Re: [PATCH v5 net-next 0/3] Add new capability and macb DT variant David Miller <davem@davemloft.net> - 2016-01-07 22:30 +0100

#1300560 — [PATCH v3 net-next] net: ethernet: cadence-macb: Add disabled usrio caps

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-01-04 10:10 +0100
Subject[PATCH v3 net-next] net: ethernet: cadence-macb: Add disabled usrio caps
Message-ID<qN9jk-1sI-11@gated-at.bofh.it>
On some platforms, the macb integration does not use the USRIO
register to configure the (R)MII port and clocks.
When the register is not implemented and the MACB error signal
is connected to the bus error, reading or writing to the USRIO
register can trigger some Imprecise External Aborts on ARM platforms.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/net/ethernet/cadence/macb.c | 27 +++++++++++++++------------
 drivers/net/ethernet/cadence/macb.h |  1 +
 2 files changed, 16 insertions(+), 12 deletions(-)

Nicolas,
I post only the first patch of the previous set posted here :
http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstrong@baylibre.com
to hopefully make it into the 4.5 merge time,
I'll post the vendor prefix once this patch will hit mainline.

Regards,
Neil

diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index 8b45bc9..fa53bc3 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -2124,7 +2124,8 @@ static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs,
 	regs_buff[10] = macb_tx_dma(&bp->queues[0], tail);
 	regs_buff[11] = macb_tx_dma(&bp->queues[0], head);
 
-	regs_buff[12] = macb_or_gem_readl(bp, USRIO);
+	if (!(bp->caps & MACB_CAPS_USRIO_DISABLED))
+		regs_buff[12] = macb_or_gem_readl(bp, USRIO);
 	if (macb_is_gem(bp)) {
 		regs_buff[13] = gem_readl(bp, DMACFG);
 	}
@@ -2403,19 +2404,21 @@ static int macb_init(struct platform_device *pdev)
 		dev->hw_features &= ~NETIF_F_SG;
 	dev->features = dev->hw_features;
 
-	val = 0;
-	if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
-		val = GEM_BIT(RGMII);
-	else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
-		 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
-		val = MACB_BIT(RMII);
-	else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
-		val = MACB_BIT(MII);
+	if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {
+		val = 0;
+		if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
+			val = GEM_BIT(RGMII);
+		else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
+			 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
+			val = MACB_BIT(RMII);
+		else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
+			val = MACB_BIT(MII);
 
-	if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
-		val |= MACB_BIT(CLKEN);
+		if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
+			val |= MACB_BIT(CLKEN);
 
-	macb_or_gem_writel(bp, USRIO, val);
+		macb_or_gem_writel(bp, USRIO, val);
+	}
 
 	/* Set MII management clock divider */
 	val = macb_mdc_clk_div(bp);
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 5c03e81..0d4ecfc 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -400,6 +400,7 @@
 #define MACB_CAPS_USRIO_HAS_CLKEN		0x00000002
 #define MACB_CAPS_USRIO_DEFAULT_IS_MII		0x00000004
 #define MACB_CAPS_NO_GIGABIT_HALF		0x00000008
+#define MACB_CAPS_USRIO_DISABLED		0x00000010
 #define MACB_CAPS_FIFO_MODE			0x10000000
 #define MACB_CAPS_GIGABIT_MODE_AVAILABLE	0x20000000
 #define MACB_CAPS_SG_DISABLED			0x40000000
-- 
1.9.1

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#1300571 — Re: [PATCH v3 net-next] net: ethernet: cadence-macb: Add disabled usrio caps

FromNicolas Ferre <nicolas.ferre@atmel.com>
Date2016-01-04 10:30 +0100
SubjectRe: [PATCH v3 net-next] net: ethernet: cadence-macb: Add disabled usrio caps
Message-ID<qN9CG-1zZ-23@gated-at.bofh.it>
In reply to#1300560
Le 04/01/2016 10:01, Neil Armstrong a écrit :
> On some platforms, the macb integration does not use the USRIO
> register to configure the (R)MII port and clocks.
> When the register is not implemented and the MACB error signal
> is connected to the bus error, reading or writing to the USRIO
> register can trigger some Imprecise External Aborts on ARM platforms.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
>  drivers/net/ethernet/cadence/macb.c | 27 +++++++++++++++------------
>  drivers/net/ethernet/cadence/macb.h |  1 +
>  2 files changed, 16 insertions(+), 12 deletions(-)
> 
> Nicolas,
> I post only the first patch of the previous set posted here :
> http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstrong@baylibre.com
> to hopefully make it into the 4.5 merge time,
> I'll post the vendor prefix once this patch will hit mainline.

Okay, but I don't see how you will activate this capability (or I lost
track of it). So, before I can accept one solution, can you please
repost the whole solution as a v4.

Thanks. Bye,


> 
> Regards,
> Neil
> 
> diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
> index 8b45bc9..fa53bc3 100644
> --- a/drivers/net/ethernet/cadence/macb.c
> +++ b/drivers/net/ethernet/cadence/macb.c
> @@ -2124,7 +2124,8 @@ static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs,
>  	regs_buff[10] = macb_tx_dma(&bp->queues[0], tail);
>  	regs_buff[11] = macb_tx_dma(&bp->queues[0], head);
>  
> -	regs_buff[12] = macb_or_gem_readl(bp, USRIO);
> +	if (!(bp->caps & MACB_CAPS_USRIO_DISABLED))
> +		regs_buff[12] = macb_or_gem_readl(bp, USRIO);
>  	if (macb_is_gem(bp)) {
>  		regs_buff[13] = gem_readl(bp, DMACFG);
>  	}
> @@ -2403,19 +2404,21 @@ static int macb_init(struct platform_device *pdev)
>  		dev->hw_features &= ~NETIF_F_SG;
>  	dev->features = dev->hw_features;
>  
> -	val = 0;
> -	if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
> -		val = GEM_BIT(RGMII);
> -	else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
> -		 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
> -		val = MACB_BIT(RMII);
> -	else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
> -		val = MACB_BIT(MII);
> +	if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {
> +		val = 0;
> +		if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
> +			val = GEM_BIT(RGMII);
> +		else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
> +			 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
> +			val = MACB_BIT(RMII);
> +		else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
> +			val = MACB_BIT(MII);
>  
> -	if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
> -		val |= MACB_BIT(CLKEN);
> +		if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
> +			val |= MACB_BIT(CLKEN);
>  
> -	macb_or_gem_writel(bp, USRIO, val);
> +		macb_or_gem_writel(bp, USRIO, val);
> +	}
>  
>  	/* Set MII management clock divider */
>  	val = macb_mdc_clk_div(bp);
> diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
> index 5c03e81..0d4ecfc 100644
> --- a/drivers/net/ethernet/cadence/macb.h
> +++ b/drivers/net/ethernet/cadence/macb.h
> @@ -400,6 +400,7 @@
>  #define MACB_CAPS_USRIO_HAS_CLKEN		0x00000002
>  #define MACB_CAPS_USRIO_DEFAULT_IS_MII		0x00000004
>  #define MACB_CAPS_NO_GIGABIT_HALF		0x00000008
> +#define MACB_CAPS_USRIO_DISABLED		0x00000010
>  #define MACB_CAPS_FIFO_MODE			0x10000000
>  #define MACB_CAPS_GIGABIT_MODE_AVAILABLE	0x20000000
>  #define MACB_CAPS_SG_DISABLED			0x40000000
> 


-- 
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#1300580 — [PATCH v4 net-next 1/3] net: ethernet: cadence-macb: Add disabled usrio caps

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-01-04 10:50 +0100
Subject[PATCH v4 net-next 1/3] net: ethernet: cadence-macb: Add disabled usrio caps
Message-ID<qN9W2-1HD-5@gated-at.bofh.it>
In reply to#1300560
On some platforms, the macb integration does not use the USRIO
register to configure the (R)MII port and clocks.
When the register is not implemented and the MACB error signal
is connected to the bus error, reading or writing to the USRIO
register can trigger some Imprecise External Aborts on ARM platforms.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/net/ethernet/cadence/macb.c | 27 +++++++++++++++------------
 drivers/net/ethernet/cadence/macb.h |  1 +
 2 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index 8b45bc9..fa53bc3 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -2124,7 +2124,8 @@ static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs,
 	regs_buff[10] = macb_tx_dma(&bp->queues[0], tail);
 	regs_buff[11] = macb_tx_dma(&bp->queues[0], head);
 
-	regs_buff[12] = macb_or_gem_readl(bp, USRIO);
+	if (!(bp->caps & MACB_CAPS_USRIO_DISABLED))
+		regs_buff[12] = macb_or_gem_readl(bp, USRIO);
 	if (macb_is_gem(bp)) {
 		regs_buff[13] = gem_readl(bp, DMACFG);
 	}
@@ -2403,19 +2404,21 @@ static int macb_init(struct platform_device *pdev)
 		dev->hw_features &= ~NETIF_F_SG;
 	dev->features = dev->hw_features;
 
-	val = 0;
-	if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
-		val = GEM_BIT(RGMII);
-	else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
-		 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
-		val = MACB_BIT(RMII);
-	else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
-		val = MACB_BIT(MII);
+	if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {
+		val = 0;
+		if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
+			val = GEM_BIT(RGMII);
+		else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
+			 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
+			val = MACB_BIT(RMII);
+		else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
+			val = MACB_BIT(MII);
 
-	if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
-		val |= MACB_BIT(CLKEN);
+		if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
+			val |= MACB_BIT(CLKEN);
 
-	macb_or_gem_writel(bp, USRIO, val);
+		macb_or_gem_writel(bp, USRIO, val);
+	}
 
 	/* Set MII management clock divider */
 	val = macb_mdc_clk_div(bp);
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 5c03e81..0d4ecfc 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -400,6 +400,7 @@
 #define MACB_CAPS_USRIO_HAS_CLKEN		0x00000002
 #define MACB_CAPS_USRIO_DEFAULT_IS_MII		0x00000004
 #define MACB_CAPS_NO_GIGABIT_HALF		0x00000008
+#define MACB_CAPS_USRIO_DISABLED		0x00000010
 #define MACB_CAPS_FIFO_MODE			0x10000000
 #define MACB_CAPS_GIGABIT_MODE_AVAILABLE	0x20000000
 #define MACB_CAPS_SG_DISABLED			0x40000000
-- 
1.9.1

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#1300581 — [PATCH v4 net-next 3/3] dt-bindings: net: macb: Add NPx macb variant

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-01-04 10:50 +0100
Subject[PATCH v4 net-next 3/3] dt-bindings: net: macb: Add NPx macb variant
Message-ID<qN9W2-1HD-11@gated-at.bofh.it>
In reply to#1300560
Add NPx macb variant for NPx SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 Documentation/devicetree/bindings/net/macb.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt
index 38c8e84..638cdde 100644
--- a/Documentation/devicetree/bindings/net/macb.txt
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible: Should be "cdns,[<chip>-]{macb|gem}"
   Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs or the 10/100Mbit IP
   available on sama5d3 SoCs.
+  Use "cdns,npx-macb" for NPX SoCs devices.
   Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
   Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
   the Cadence GEM, or the generic form: "cdns,gem".
-- 
1.9.1

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#1300584 — [PATCH v4 net-next 0/3] Add new capability and macb DT variant

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-01-04 10:50 +0100
Subject[PATCH v4 net-next 0/3] Add new capability and macb DT variant
Message-ID<qN9W2-1HD-7@gated-at.bofh.it>
In reply to#1300560
The first patch introduces a new capability bit to disable usage of the
USRIO register on platform not implementing it thus avoiding some external
imprecise aborts on ARM based platforms.
The two last patchs adds a new macb variant compatible name using the
capability, the NPx name is temporary and must be fixed when the first patch
hits mainline.

Only the first patch should be merged right now until the compatible name
is fixed.

v1: http://lkml.kernel.org/r/1449485914-12883-1-git-send-email-narmstrong@baylibre.com
v2: http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstrong@baylibre.com
v3: http://lkml.kernel.org/r/1451898103-21868-1-git-send-email-narmstrong@baylibre.com
v4: as nicolas suggested, use a new macb config and a new product/vendor prefix

Neil Armstrong (3):
  net: ethernet: cadence-macb: Add disabled usrio caps
  net: macb: Add NPx macb config using USRIO_DISABLED cap
  dt-bindings: net: macb: Add NPx macb variant

 Documentation/devicetree/bindings/net/macb.txt |  1 +
 drivers/net/ethernet/cadence/macb.c            | 33 ++++++++++++++++----------
 drivers/net/ethernet/cadence/macb.h            |  1 +
 3 files changed, 23 insertions(+), 12 deletions(-)

-- 
1.9.1

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#1300586 — [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-01-04 10:50 +0100
Subject[PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap
Message-ID<qN9W2-1HD-15@gated-at.bofh.it>
In reply to#1300584
Declare a new SoC variant for NPx SoCs having USRIO_DISABLED as
capability bit.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/net/ethernet/cadence/macb.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index fa53bc3..a9e27a7 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -2781,6 +2781,11 @@ static const struct macb_config emac_config = {
 	.init = at91ether_init,
 };
 
+static const struct macb_config npx_config = {
+	.caps = MACB_CAPS_USRIO_DISABLED,
+	.clk_init = macb_clk_init,
+	.init = macb_init,
+};
 
 static const struct macb_config zynqmp_config = {
 	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO,
@@ -2801,6 +2806,7 @@ static const struct of_device_id macb_dt_ids[] = {
 	{ .compatible = "cdns,at32ap7000-macb" },
 	{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
 	{ .compatible = "cdns,macb" },
+	{ .compatible = "cdns,npx-macb", .data = &npx_config },
 	{ .compatible = "cdns,pc302-gem", .data = &pc302gem_config },
 	{ .compatible = "cdns,gem", .data = &pc302gem_config },
 	{ .compatible = "atmel,sama5d2-gem", .data = &sama5d2_config },
-- 
1.9.1

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#1300620 — Re: [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap

FromNicolas Ferre <nicolas.ferre@atmel.com>
Date2016-01-04 11:40 +0100
SubjectRe: [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap
Message-ID<qNaIq-2dC-21@gated-at.bofh.it>
In reply to#1300586
Le 04/01/2016 10:42, Neil Armstrong a écrit :
> Declare a new SoC variant for NPx SoCs having USRIO_DISABLED as
> capability bit.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
>  drivers/net/ethernet/cadence/macb.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
> index fa53bc3..a9e27a7 100644
> --- a/drivers/net/ethernet/cadence/macb.c
> +++ b/drivers/net/ethernet/cadence/macb.c
> @@ -2781,6 +2781,11 @@ static const struct macb_config emac_config = {
>  	.init = at91ether_init,
>  };
>  
> +static const struct macb_config npx_config = {
> +	.caps = MACB_CAPS_USRIO_DISABLED,
> +	.clk_init = macb_clk_init,
> +	.init = macb_init,
> +};
>  
>  static const struct macb_config zynqmp_config = {
>  	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO,
> @@ -2801,6 +2806,7 @@ static const struct of_device_id macb_dt_ids[] = {
>  	{ .compatible = "cdns,at32ap7000-macb" },
>  	{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
>  	{ .compatible = "cdns,macb" },
> +	{ .compatible = "cdns,npx-macb", .data = &npx_config },

I can accept that, but I think that you'd better make your device tree
compatibility string *not* generic. Name it by the first NPx SoC or
perfectly compatible SoC family that has this configuration and you'll
be able to make the NP(x+1) compatible with it.

It has proven to be much more future proof and even if in the early days
of DT on ARM we accepted some binding with generic strings like this one
below, It has proven to be a mistake.

>  	{ .compatible = "cdns,gem", .data = &pc302gem_config },
>  	{ .compatible = "atmel,sama5d2-gem", .data = &sama5d2_config },
> 


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#1301488 — Re: [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-01-05 13:30 +0100
SubjectRe: [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap
Message-ID<qNyUq-2G0-19@gated-at.bofh.it>
In reply to#1300620
On 01/04/2016 11:38 AM, Nicolas Ferre wrote:
> Le 04/01/2016 10:42, Neil Armstrong a écrit :
>>  static const struct macb_config zynqmp_config = {
>>  	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO,
>> @@ -2801,6 +2806,7 @@ static const struct of_device_id macb_dt_ids[] = {
>>  	{ .compatible = "cdns,at32ap7000-macb" },
>>  	{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
>>  	{ .compatible = "cdns,macb" },
>> +	{ .compatible = "cdns,npx-macb", .data = &npx_config },
> 
> I can accept that, but I think that you'd better make your device tree
> compatibility string *not* generic. Name it by the first NPx SoC or
> perfectly compatible SoC family that has this configuration and you'll
> be able to make the NP(x+1) compatible with it.
Well, the first Soc having this configuration is Np4, would cdns,np4-macb be ok ?
> 
> It has proven to be much more future proof and even if in the early days
> of DT on ARM we accepted some binding with generic strings like this one
> below, It has proven to be a mistake.
> 
>>  	{ .compatible = "cdns,gem", .data = &pc302gem_config },
>>  	{ .compatible = "atmel,sama5d2-gem", .data = &sama5d2_config },
>>
> 
> 

Neil
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#1301529 — Re: [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap

FromNicolas Ferre <nicolas.ferre@atmel.com>
Date2016-01-05 14:30 +0100
SubjectRe: [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap
Message-ID<qNzQv-3l3-25@gated-at.bofh.it>
In reply to#1301488
Le 05/01/2016 13:20, Neil Armstrong a écrit :
> On 01/04/2016 11:38 AM, Nicolas Ferre wrote:
>> Le 04/01/2016 10:42, Neil Armstrong a écrit :
>>>  static const struct macb_config zynqmp_config = {
>>>  	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO,
>>> @@ -2801,6 +2806,7 @@ static const struct of_device_id macb_dt_ids[] = {
>>>  	{ .compatible = "cdns,at32ap7000-macb" },
>>>  	{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
>>>  	{ .compatible = "cdns,macb" },
>>> +	{ .compatible = "cdns,npx-macb", .data = &npx_config },
>>
>> I can accept that, but I think that you'd better make your device tree
>> compatibility string *not* generic. Name it by the first NPx SoC or
>> perfectly compatible SoC family that has this configuration and you'll
>> be able to make the NP(x+1) compatible with it.
> Well, the first Soc having this configuration is Np4, would cdns,np4-macb be ok ?

Yes, absolutely.

Thanks

>> It has proven to be much more future proof and even if in the early days
>> of DT on ARM we accepted some binding with generic strings like this one
>> below, It has proven to be a mistake.
>>
>>>  	{ .compatible = "cdns,gem", .data = &pc302gem_config },
>>>  	{ .compatible = "atmel,sama5d2-gem", .data = &sama5d2_config },
>>>
>>
>>
> 
> Neil
> 


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#1301531 — [PATCH v5 net-next 0/3] Add new capability and macb DT variant

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-01-05 14:40 +0100
Subject[PATCH v5 net-next 0/3] Add new capability and macb DT variant
Message-ID<qNA0a-3p1-7@gated-at.bofh.it>
In reply to#1300584
The first patch introduces a new capability bit to disable usage of the
USRIO register on platform not implementing it thus avoiding some external
imprecise aborts on ARM based platforms.
The two last patchs adds a new macb variant compatible name using the
capability, the NP4 SoC uses this particular hardware configuration.

v1: http://lkml.kernel.org/r/1449485914-12883-1-git-send-email-narmstrong@baylibre.com
v2: http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstrong@baylibre.com
v3: http://lkml.kernel.org/r/1451898103-21868-1-git-send-email-narmstrong@baylibre.com
v4: http://lkml.kernel.org/r/1451900573-22657-1-git-send-email-narmstrong@baylibre.com
v5: switch SoC name to non-generic NP4 name

Neil Armstrong (3):
  net: ethernet: cadence-macb: Add disabled usrio caps
  net: macb: Add NP4 macb config using USRIO_DISABLED
  dt-bindings: net: macb: Add NP4 macb variant

 Documentation/devicetree/bindings/net/macb.txt |  1 +
 drivers/net/ethernet/cadence/macb.c            | 33 ++++++++++++++++----------
 drivers/net/ethernet/cadence/macb.h            |  1 +
 3 files changed, 23 insertions(+), 12 deletions(-)

-- 
1.9.1

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#1301532 — [PATCH v5 net-next 1/3] net: ethernet: cadence-macb: Add disabled usrio caps

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-01-05 14:40 +0100
Subject[PATCH v5 net-next 1/3] net: ethernet: cadence-macb: Add disabled usrio caps
Message-ID<qNA0b-3p1-9@gated-at.bofh.it>
In reply to#1301531
On some platforms, the macb integration does not use the USRIO
register to configure the (R)MII port and clocks.
When the register is not implemented and the MACB error signal
is connected to the bus error, reading or writing to the USRIO
register can trigger some Imprecise External Aborts on ARM platforms.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/net/ethernet/cadence/macb.c | 27 +++++++++++++++------------
 drivers/net/ethernet/cadence/macb.h |  1 +
 2 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index 8b45bc9..fa53bc3 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -2124,7 +2124,8 @@ static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs,
 	regs_buff[10] = macb_tx_dma(&bp->queues[0], tail);
 	regs_buff[11] = macb_tx_dma(&bp->queues[0], head);
 
-	regs_buff[12] = macb_or_gem_readl(bp, USRIO);
+	if (!(bp->caps & MACB_CAPS_USRIO_DISABLED))
+		regs_buff[12] = macb_or_gem_readl(bp, USRIO);
 	if (macb_is_gem(bp)) {
 		regs_buff[13] = gem_readl(bp, DMACFG);
 	}
@@ -2403,19 +2404,21 @@ static int macb_init(struct platform_device *pdev)
 		dev->hw_features &= ~NETIF_F_SG;
 	dev->features = dev->hw_features;
 
-	val = 0;
-	if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
-		val = GEM_BIT(RGMII);
-	else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
-		 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
-		val = MACB_BIT(RMII);
-	else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
-		val = MACB_BIT(MII);
+	if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {
+		val = 0;
+		if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
+			val = GEM_BIT(RGMII);
+		else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
+			 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
+			val = MACB_BIT(RMII);
+		else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
+			val = MACB_BIT(MII);
 
-	if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
-		val |= MACB_BIT(CLKEN);
+		if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
+			val |= MACB_BIT(CLKEN);
 
-	macb_or_gem_writel(bp, USRIO, val);
+		macb_or_gem_writel(bp, USRIO, val);
+	}
 
 	/* Set MII management clock divider */
 	val = macb_mdc_clk_div(bp);
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 5c03e81..0d4ecfc 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -400,6 +400,7 @@
 #define MACB_CAPS_USRIO_HAS_CLKEN		0x00000002
 #define MACB_CAPS_USRIO_DEFAULT_IS_MII		0x00000004
 #define MACB_CAPS_NO_GIGABIT_HALF		0x00000008
+#define MACB_CAPS_USRIO_DISABLED		0x00000010
 #define MACB_CAPS_FIFO_MODE			0x10000000
 #define MACB_CAPS_GIGABIT_MODE_AVAILABLE	0x20000000
 #define MACB_CAPS_SG_DISABLED			0x40000000
-- 
1.9.1

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#1301537 — Re: [PATCH v5 net-next 1/3] net: ethernet: cadence-macb: Add disabled usrio caps

FromNicolas Ferre <nicolas.ferre@atmel.com>
Date2016-01-05 14:50 +0100
SubjectRe: [PATCH v5 net-next 1/3] net: ethernet: cadence-macb: Add disabled usrio caps
Message-ID<qNA9Q-3si-5@gated-at.bofh.it>
In reply to#1301532
Le 05/01/2016 14:39, Neil Armstrong a écrit :
> On some platforms, the macb integration does not use the USRIO
> register to configure the (R)MII port and clocks.
> When the register is not implemented and the MACB error signal
> is connected to the bus error, reading or writing to the USRIO
> register can trigger some Imprecise External Aborts on ARM platforms.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Thanks!

> ---
>  drivers/net/ethernet/cadence/macb.c | 27 +++++++++++++++------------
>  drivers/net/ethernet/cadence/macb.h |  1 +
>  2 files changed, 16 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
> index 8b45bc9..fa53bc3 100644
> --- a/drivers/net/ethernet/cadence/macb.c
> +++ b/drivers/net/ethernet/cadence/macb.c
> @@ -2124,7 +2124,8 @@ static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs,
>  	regs_buff[10] = macb_tx_dma(&bp->queues[0], tail);
>  	regs_buff[11] = macb_tx_dma(&bp->queues[0], head);
>  
> -	regs_buff[12] = macb_or_gem_readl(bp, USRIO);
> +	if (!(bp->caps & MACB_CAPS_USRIO_DISABLED))
> +		regs_buff[12] = macb_or_gem_readl(bp, USRIO);
>  	if (macb_is_gem(bp)) {
>  		regs_buff[13] = gem_readl(bp, DMACFG);
>  	}
> @@ -2403,19 +2404,21 @@ static int macb_init(struct platform_device *pdev)
>  		dev->hw_features &= ~NETIF_F_SG;
>  	dev->features = dev->hw_features;
>  
> -	val = 0;
> -	if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
> -		val = GEM_BIT(RGMII);
> -	else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
> -		 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
> -		val = MACB_BIT(RMII);
> -	else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
> -		val = MACB_BIT(MII);
> +	if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {
> +		val = 0;
> +		if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
> +			val = GEM_BIT(RGMII);
> +		else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
> +			 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
> +			val = MACB_BIT(RMII);
> +		else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
> +			val = MACB_BIT(MII);
>  
> -	if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
> -		val |= MACB_BIT(CLKEN);
> +		if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
> +			val |= MACB_BIT(CLKEN);
>  
> -	macb_or_gem_writel(bp, USRIO, val);
> +		macb_or_gem_writel(bp, USRIO, val);
> +	}
>  
>  	/* Set MII management clock divider */
>  	val = macb_mdc_clk_div(bp);
> diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
> index 5c03e81..0d4ecfc 100644
> --- a/drivers/net/ethernet/cadence/macb.h
> +++ b/drivers/net/ethernet/cadence/macb.h
> @@ -400,6 +400,7 @@
>  #define MACB_CAPS_USRIO_HAS_CLKEN		0x00000002
>  #define MACB_CAPS_USRIO_DEFAULT_IS_MII		0x00000004
>  #define MACB_CAPS_NO_GIGABIT_HALF		0x00000008
> +#define MACB_CAPS_USRIO_DISABLED		0x00000010
>  #define MACB_CAPS_FIFO_MODE			0x10000000
>  #define MACB_CAPS_GIGABIT_MODE_AVAILABLE	0x20000000
>  #define MACB_CAPS_SG_DISABLED			0x40000000
> 


-- 
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#1301539 — [PATCH v5 net-next 3/3] dt-bindings: net: macb: Add NP4 macb variant

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-01-05 14:50 +0100
Subject[PATCH v5 net-next 3/3] dt-bindings: net: macb: Add NP4 macb variant
Message-ID<qNA9Q-3si-11@gated-at.bofh.it>
In reply to#1301531
Add NP4 macb SoC variant.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 Documentation/devicetree/bindings/net/macb.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt
index 38c8e84..5c397ca 100644
--- a/Documentation/devicetree/bindings/net/macb.txt
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible: Should be "cdns,[<chip>-]{macb|gem}"
   Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs or the 10/100Mbit IP
   available on sama5d3 SoCs.
+  Use "cdns,np4-macb" for NP4 SoC devices.
   Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
   Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
   the Cadence GEM, or the generic form: "cdns,gem".
-- 
1.9.1

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#1301543 — Re: [PATCH v5 net-next 3/3] dt-bindings: net: macb: Add NP4 macb variant

FromNicolas Ferre <nicolas.ferre@atmel.com>
Date2016-01-05 14:50 +0100
SubjectRe: [PATCH v5 net-next 3/3] dt-bindings: net: macb: Add NP4 macb variant
Message-ID<qNA9R-3si-21@gated-at.bofh.it>
In reply to#1301539
Le 05/01/2016 14:39, Neil Armstrong a écrit :
> Add NP4 macb SoC variant.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Neil, thanks for your understanding and reactivity concerning this patch
series.

Bye,

> ---
>  Documentation/devicetree/bindings/net/macb.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt
> index 38c8e84..5c397ca 100644
> --- a/Documentation/devicetree/bindings/net/macb.txt
> +++ b/Documentation/devicetree/bindings/net/macb.txt
> @@ -4,6 +4,7 @@ Required properties:
>  - compatible: Should be "cdns,[<chip>-]{macb|gem}"
>    Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs or the 10/100Mbit IP
>    available on sama5d3 SoCs.
> +  Use "cdns,np4-macb" for NP4 SoC devices.
>    Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
>    Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
>    the Cadence GEM, or the generic form: "cdns,gem".
> 


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#1302828 — Re: [PATCH v5 net-next 3/3] dt-bindings: net: macb: Add NP4 macb variant

FromRob Herring <robh@kernel.org>
Date2016-01-06 16:00 +0100
SubjectRe: [PATCH v5 net-next 3/3] dt-bindings: net: macb: Add NP4 macb variant
Message-ID<qNXJ8-2ut-9@gated-at.bofh.it>
In reply to#1301539
On Tue, Jan 05, 2016 at 02:39:18PM +0100, Neil Armstrong wrote:
> Add NP4 macb SoC variant.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
>  Documentation/devicetree/bindings/net/macb.txt | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring <robh@kernel.org>

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#1301540 — [PATCH v5 net-next 2/3] net: macb: Add NP4 macb config using USRIO_DISABLED

FromNeil Armstrong <narmstrong@baylibre.com>
Date2016-01-05 14:50 +0100
Subject[PATCH v5 net-next 2/3] net: macb: Add NP4 macb config using USRIO_DISABLED
Message-ID<qNA9Q-3si-15@gated-at.bofh.it>
In reply to#1301531
Declare a new NP4 SoC variant having USRIO_DISABLED as capability bit.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/net/ethernet/cadence/macb.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index fa53bc3..d12ee07 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -2781,6 +2781,11 @@ static const struct macb_config emac_config = {
 	.init = at91ether_init,
 };
 
+static const struct macb_config np4_config = {
+	.caps = MACB_CAPS_USRIO_DISABLED,
+	.clk_init = macb_clk_init,
+	.init = macb_init,
+};
 
 static const struct macb_config zynqmp_config = {
 	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO,
@@ -2801,6 +2806,7 @@ static const struct of_device_id macb_dt_ids[] = {
 	{ .compatible = "cdns,at32ap7000-macb" },
 	{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
 	{ .compatible = "cdns,macb" },
+	{ .compatible = "cdns,np4-macb", .data = &np4_config },
 	{ .compatible = "cdns,pc302-gem", .data = &pc302gem_config },
 	{ .compatible = "cdns,gem", .data = &pc302gem_config },
 	{ .compatible = "atmel,sama5d2-gem", .data = &sama5d2_config },
-- 
1.9.1

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#1301542 — Re: [PATCH v5 net-next 2/3] net: macb: Add NP4 macb config using USRIO_DISABLED

FromNicolas Ferre <nicolas.ferre@atmel.com>
Date2016-01-05 14:50 +0100
SubjectRe: [PATCH v5 net-next 2/3] net: macb: Add NP4 macb config using USRIO_DISABLED
Message-ID<qNA9Q-3si-13@gated-at.bofh.it>
In reply to#1301540
Le 05/01/2016 14:39, Neil Armstrong a écrit :
> Declare a new NP4 SoC variant having USRIO_DISABLED as capability bit.
> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>


> ---
>  drivers/net/ethernet/cadence/macb.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
> index fa53bc3..d12ee07 100644
> --- a/drivers/net/ethernet/cadence/macb.c
> +++ b/drivers/net/ethernet/cadence/macb.c
> @@ -2781,6 +2781,11 @@ static const struct macb_config emac_config = {
>  	.init = at91ether_init,
>  };
>  
> +static const struct macb_config np4_config = {
> +	.caps = MACB_CAPS_USRIO_DISABLED,
> +	.clk_init = macb_clk_init,
> +	.init = macb_init,
> +};
>  
>  static const struct macb_config zynqmp_config = {
>  	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO,
> @@ -2801,6 +2806,7 @@ static const struct of_device_id macb_dt_ids[] = {
>  	{ .compatible = "cdns,at32ap7000-macb" },
>  	{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
>  	{ .compatible = "cdns,macb" },
> +	{ .compatible = "cdns,np4-macb", .data = &np4_config },
>  	{ .compatible = "cdns,pc302-gem", .data = &pc302gem_config },
>  	{ .compatible = "cdns,gem", .data = &pc302gem_config },
>  	{ .compatible = "atmel,sama5d2-gem", .data = &sama5d2_config },
> 


-- 
Nicolas Ferre
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#1303922 — Re: [PATCH v5 net-next 0/3] Add new capability and macb DT variant

FromDavid Miller <davem@davemloft.net>
Date2016-01-07 22:30 +0100
SubjectRe: [PATCH v5 net-next 0/3] Add new capability and macb DT variant
Message-ID<qOqi7-5nl-5@gated-at.bofh.it>
In reply to#1301531
From: Neil Armstrong <narmstrong@baylibre.com>
Date: Tue,  5 Jan 2016 14:39:15 +0100

> The first patch introduces a new capability bit to disable usage of the
> USRIO register on platform not implementing it thus avoiding some external
> imprecise aborts on ARM based platforms.
> The two last patchs adds a new macb variant compatible name using the
> capability, the NP4 SoC uses this particular hardware configuration.
> 
> v1: http://lkml.kernel.org/r/1449485914-12883-1-git-send-email-narmstrong@baylibre.com
> v2: http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstrong@baylibre.com
> v3: http://lkml.kernel.org/r/1451898103-21868-1-git-send-email-narmstrong@baylibre.com
> v4: http://lkml.kernel.org/r/1451900573-22657-1-git-send-email-narmstrong@baylibre.com
> v5: switch SoC name to non-generic NP4 name

Series applied to net-next, thanks.

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