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[GIT PULL] clockevents for 4.5

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  [GIT PULL] clockevents for 4.5 Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-17 16:00 +0100
    [PATCH 59/69] clocksource/drivers/dw_apb_timer: Use {readl|writel}_relaxed in critical path Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
    [PATCH 11/69] clocksource/drivers/pxa_timer: Move the Kconfig rule Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
    [PATCH 31/69] clocksource/drivers/prcmu: Fix Kconfig and add COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
    [PATCH 03/69] clocksource/drivers/mtk_timer: Fix memleak in mtk_timer_init() Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
    [PATCH 41/69] clocksource/drivers/h8300_timer8: Remove unused headers Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
    [PATCH 05/69] clocksource/drivers/rockchip: Make the driver more readable Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
    [PATCH 01/69] clocksource/drivers/mtk_timer: Add pr_fmt define Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
      [PATCH 21/69] clocksource/drivers/dw_apb: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
      [PATCH 07/69] clocksource/drivers/rockchip: Remove dsb() usage Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
      [PATCH 34/69] clocksource/drivers/fsl-ftm: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
      [PATCH 25/69] clocksource/drivers/vt8500: Remove unneeded header Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
      [PATCH 53/69] clocksource/drivers/timer_sun5i: Replace code by clocksource_mmio_init Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:20 +0100
      [PATCH 49/69] clocksource/drivers/h8300_timer16: Remove unused macros Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 54/69] clocksource/drivers/h8300_timer8: Separate the Kconfig option from the arch Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 51/69] clocksource/drivers/h8300_timer16: Fix irq return value check Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 66/69] clocksource/drivers/h8300: Fix timer not overflow case Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 47/69] clocksource/drivers/h8300_timer8: Retrieve the clock rate at init time Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 60/69] clocksource/drivers/dw_apb_timer: Inline apbt_readl and apbt_writel Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 65/69] clocksource/drivers/h8300: Change to overflow interrupt Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 55/69] h8300: Rename ctlr_out/in[bwl] to raw_read/write[bwl] Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 52/69] clocksource/drivers/h8300_timer16: Remove pointless lock Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 64/69] clocksource/drivers/lpc32: Correct pr_err() output format Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 48/69] clocksource/drivers/h8300_timer16: Remove pointless headers Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 63/69] clocksource/drivers/arm_global_timer: Fix suspend resume Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 68/69] clocksource/drivers/h8300: Initializer cleanup. Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 56/69] clocksource/drivers/h8300: Increase the compilation test coverage Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 67/69] clocksource/drivers/h8300: Simplify delta handling Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 50/69] clocksource/drivers/h8300_timer16: Remove unused fields in timer16_priv Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 44/69] clocksource/drivers/h8300_timer8: Fix irq return value check Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 58/69] clocksource/drivers/dw_apb_timer: Fix apbt_readl return types Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 45/69] clocksource/drivers/h8300_timer8: Remove pointless irq re-entrant safe code Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 62/69] clocksource/drivers/pistachio: Fix wrong calculated clocksource read value Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 46/69] clocksource/drivers/h8300_timer8: Remove irq and lock legacy code Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 69/69] clocksource/drivers/h8300: Use ioread / iowrite Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 61/69] clockevents/drivers/arm_global_timer: Use writel_relaxed in gt_compare_set Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 57/69] clocksource/drivers/tango-xtal: Replace code by clocksource_mmio_init Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:30 +0100
      [PATCH 43/69] clocksource/drivers/h8300_timer8: Remove PERIODIC and ONESHOT macro Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 20/69] clocksource/drivers/digicolor: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 19/69] clocksource/drivers/orion: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 37/69] clocksource/drivers/h8300: Cleanup startup and remove module code. Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 30/69] clocksource/drivers/nomadik_mtu: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 40/69] clocksource/drivers/h8300_tpu: Remove pointless headers for TPU Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 39/69] clocksource/drivers/h8300_tpu: Remove unused macros Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 35/69] clocksource/drivers/Kconfig: Add missing GENERIC_CLOCKEVENTS dependency Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 27/69] clocksource/drivers/cadence_ttc: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 13/69] clocksource/drivers/tango: Add COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 17/69] clocksource/drivers/armada-370-xp: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 38/69] clocksource/drivers/h8300_timer8: Fix compilation error with dev_warn Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 42/69] clocksource/drivers/h8300_timer8: Remove unused macros Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 36/69] clocksource/drivers/dw_apb_timer_of: Implement ARM delay timer Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 26/69] clocksource/drivers/vt8500: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 22/69] clocksource/drivers/sun4i: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 12/69] clocksource/drivers/pxa_timer: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 23/69] clocksource/drivers/sun5i: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 28/69] clocksource/drivers/asm9260: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 18/69] clocksource/drivers/meson6: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 32/69] clocksource/drivers/exynos_mct: Fix Kconfig and add COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 24/69] clocksource/drivers/tegra2: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 29/69] clocksource/drivers/lpc32xx: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 33/69] clocksource/drivers/samsung-pwm: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:40 +0100
      [PATCH 14/69] clocksource/drivers/pistachio: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:50 +0100
      [PATCH 08/69] clocksource/drivers/qcom: Make COMPILE_TEST enabled for ARM architecture Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:50 +0100
      [PATCH 09/69] clocksource/drivers/st_lpc: Fix Kconfig dependency Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:50 +0100
      [PATCH 02/69] clocksource/drivers/mtk_timer: Fix pr_warn() messages in mtk_timer_init Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:50 +0100
        Re: [PATCH 02/69] clocksource/drivers/mtk_timer: Fix pr_warn()  messages in mtk_timer_init Matthias Brugger <matthias.bgg@gmail.com> - 2015-12-30 19:20 +0100
      [PATCH 15/69] clocksource/drivers/mediatek: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:50 +0100
        Re: [PATCH 15/69] clocksource/drivers/mediatek: Add the COMPILE_TEST  option Matthias Brugger <matthias.bgg@gmail.com> - 2015-12-30 19:20 +0100
      [PATCH 10/69] clocksource/drivers/st_lpc: Add the COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:50 +0100
      [PATCH 06/69] time: Define dummy functions for the generic sched clock Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:50 +0100
      [PATCH 16/69] clocksource/drivers/rockchip: Add COMPILE_TEST option Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:50 +0100
      [PATCH 04/69] clocksource/drivers/tegra: Allow timer irq affinity change Daniel Lezcano <daniel.lezcano@linaro.org> - 2015-12-18 15:50 +0100

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#1294862 — [PATCH 55/69] h8300: Rename ctlr_out/in[bwl] to raw_read/write[bwl]

For the sake of consistency, let rename all ctrl_out/in calls to the write/read
calls so we have the same API consistent with the other architectures hence
open the door for the increasing of the test compilation coverage.

The unsigned long coercive cast is removed because all variables are set to
the right type "void __iomem *".

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 arch/h8300/include/asm/io.h          | 39 +++++++++++++++++++++---------------
 arch/h8300/kernel/setup.c            |  8 ++++----
 drivers/clocksource/h8300_timer16.c  | 28 +++++++++++++-------------
 drivers/clocksource/h8300_timer8.c   | 34 +++++++++++++++----------------
 drivers/clocksource/h8300_tpu.c      | 28 +++++++++++++-------------
 drivers/irqchip/irq-renesas-h8300h.c |  8 ++++----
 6 files changed, 76 insertions(+), 69 deletions(-)

diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h
index bb837cd..f0e14f3 100644
--- a/arch/h8300/include/asm/io.h
+++ b/arch/h8300/include/asm/io.h
@@ -3,40 +3,45 @@
 
 #ifdef __KERNEL__
 
-#include <asm-generic/io.h>
-
 /* H8/300 internal I/O functions */
-static inline unsigned char ctrl_inb(unsigned long addr)
+
+#define __raw_readb __raw_readb
+static inline u8 __raw_readb(const volatile void __iomem *addr)
 {
-	return *(volatile unsigned char *)addr;
+	return *(volatile u8 *)addr;
 }
 
-static inline unsigned short ctrl_inw(unsigned long addr)
+#define __raw_readw __raw_readw
+static inline u16 __raw_readw(const volatile void __iomem *addr)
 {
-	return *(volatile unsigned short *)addr;
+	return *(volatile u16 *)addr;
 }
 
-static inline unsigned long ctrl_inl(unsigned long addr)
+#define __raw_readl __raw_readl
+static inline u32  __raw_readl(const volatile void __iomem *addr)
 {
-	return *(volatile unsigned long *)addr;
+	return *(volatile u32 *)addr;
 }
 
-static inline void ctrl_outb(unsigned char b, unsigned long addr)
+#define __raw_writeb __raw_writeb
+static inline void __raw_writeb(u8 b, const volatile void __iomem *addr)
 {
-	*(volatile unsigned char *)addr = b;
+	*(volatile u8 *)addr = b;
 }
 
-static inline void ctrl_outw(unsigned short b, unsigned long addr)
+#define __raw_writew __raw_writew
+static inline void __raw_writew(u16 b, const volatile void __iomem *addr)
 {
-	*(volatile unsigned short *)addr = b;
+	*(volatile u16 *)addr = b;
 }
 
-static inline void ctrl_outl(unsigned long b, unsigned long addr)
+#define __raw_writel __raw_writel
+static inline void __raw_writel(u32 b, const volatile void __iomem *addr)
 {
-	*(volatile unsigned long *)addr = b;
+	*(volatile u32 *)addr = b;
 }
 
-static inline void ctrl_bclr(int b, unsigned char *addr)
+static inline void ctrl_bclr(int b, void __iomem *addr)
 {
 	if (__builtin_constant_p(b))
 		__asm__("bclr %1,%0" : "+WU"(*addr): "i"(b));
@@ -44,7 +49,7 @@ static inline void ctrl_bclr(int b, unsigned char *addr)
 		__asm__("bclr %w1,%0" : "+WU"(*addr): "r"(b));
 }
 
-static inline void ctrl_bset(int b, unsigned char *addr)
+static inline void ctrl_bset(int b, void __iomem *addr)
 {
 	if (__builtin_constant_p(b))
 		__asm__("bset %1,%0" : "+WU"(*addr): "i"(b));
@@ -52,6 +57,8 @@ static inline void ctrl_bset(int b, unsigned char *addr)
 		__asm__("bset %w1,%0" : "+WU"(*addr): "r"(b));
 }
 
+#include <asm-generic/io.h>
+
 #endif /* __KERNEL__ */
 
 #endif /* _H8300_IO_H */
diff --git a/arch/h8300/kernel/setup.c b/arch/h8300/kernel/setup.c
index c772abe..e4985df 100644
--- a/arch/h8300/kernel/setup.c
+++ b/arch/h8300/kernel/setup.c
@@ -207,14 +207,14 @@ device_initcall(device_probe);
 #define get_wait(base, addr) ({		\
 	int baddr;			\
 	baddr = ((addr) / 0x200000 * 2);			     \
-	w *= (ctrl_inw((unsigned long)(base) + 2) & (3 << baddr)) + 1;	\
+	w *= (readw((base) + 2) & (3 << baddr)) + 1;		     \
 	})
 #endif
 #if defined(CONFIG_CPU_H8S)
 #define get_wait(base, addr) ({		\
 	int baddr;			\
 	baddr = ((addr) / 0x200000 * 16);			     \
-	w *= (ctrl_inl((unsigned long)(base) + 2) & (7 << baddr)) + 1;	\
+	w *= (readl((base) + 2) & (7 << baddr)) + 1;	\
 	})
 #endif
 
@@ -228,8 +228,8 @@ static __init int access_timing(void)
 
 	bsc = of_find_compatible_node(NULL, NULL, "renesas,h8300-bsc");
 	base = of_iomap(bsc, 0);
-	w = (ctrl_inb((unsigned long)base + 0) & bit)?2:1;
-	if (ctrl_inb((unsigned long)base + 1) & bit)
+	w = (readb(base + 0) & bit)?2:1;
+	if (readb(base + 1) & bit)
 		w *= get_wait(base, addr);
 	else
 		w *= 2;
diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c
index f396605..fc14a3f 100644
--- a/drivers/clocksource/h8300_timer16.c
+++ b/drivers/clocksource/h8300_timer16.c
@@ -23,8 +23,8 @@
 struct timer16_priv {
 	struct clocksource cs;
 	unsigned long total_cycles;
-	unsigned long mapbase;
-	unsigned long mapcommon;
+	void __iomem *mapbase;
+	void __iomem *mapcommon;
 	unsigned short cs_enabled;
 	unsigned char enb;
 	unsigned char imfa;
@@ -38,15 +38,15 @@ static unsigned long timer16_get_counter(struct timer16_priv *p)
 	unsigned long v1, v2, v3;
 	int o1, o2;
 
-	o1 = ctrl_inb(p->mapcommon + TISRC) & p->ovf;
+	o1 = readb(p->mapcommon + TISRC) & p->ovf;
 
 	/* Make sure the timer value is stable. Stolen from acpi_pm.c */
 	do {
 		o2 = o1;
-		v1 = ctrl_inw(p->mapbase + TCNT);
-		v2 = ctrl_inw(p->mapbase + TCNT);
-		v3 = ctrl_inw(p->mapbase + TCNT);
-		o1 = ctrl_inb(p->mapcommon + TISRC) & p->ovf;
+		v1 = readw(p->mapbase + TCNT);
+		v2 = readw(p->mapbase + TCNT);
+		v3 = readw(p->mapbase + TCNT);
+		o1 = readb(p->mapcommon + TISRC) & p->ovf;
 	} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
 			  || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
 
@@ -59,7 +59,7 @@ static irqreturn_t timer16_interrupt(int irq, void *dev_id)
 {
 	struct timer16_priv *p = (struct timer16_priv *)dev_id;
 
-	ctrl_outb(ctrl_inb(p->mapcommon + TISRA) & ~p->imfa,
+	writeb(readb(p->mapcommon + TISRA) & ~p->imfa,
 		  p->mapcommon + TISRA);
 	p->total_cycles += 0x10000;
 
@@ -89,9 +89,9 @@ static int timer16_enable(struct clocksource *cs)
 	WARN_ON(p->cs_enabled);
 
 	p->total_cycles = 0;
-	ctrl_outw(0x0000, p->mapbase + TCNT);
-	ctrl_outb(0x83, p->mapbase + TCR);
-	ctrl_outb(ctrl_inb(p->mapcommon + TSTR) | p->enb,
+	writew(0x0000, p->mapbase + TCNT);
+	writeb(0x83, p->mapbase + TCR);
+	writeb(readb(p->mapcommon + TSTR) | p->enb,
 		  p->mapcommon + TSTR);
 
 	p->cs_enabled = true;
@@ -104,7 +104,7 @@ static void timer16_disable(struct clocksource *cs)
 
 	WARN_ON(!p->cs_enabled);
 
-	ctrl_outb(ctrl_inb(p->mapcommon + TSTR) & ~p->enb,
+	writeb(readb(p->mapcommon + TSTR) & ~p->enb,
 		  p->mapcommon + TSTR);
 
 	p->cs_enabled = false;
@@ -158,8 +158,8 @@ static void __init h8300_16timer_init(struct device_node *node)
 
 	of_property_read_u32(node, "renesas,channel", &ch);
 
-	timer16_priv.mapbase = (unsigned long)base[REG_CH];
-	timer16_priv.mapcommon = (unsigned long)base[REG_COMM];
+	timer16_priv.mapbase = base[REG_CH];
+	timer16_priv.mapcommon = base[REG_COMM];
 	timer16_priv.enb = 1 << ch;
 	timer16_priv.imfa = 1 << ch;
 	timer16_priv.imiea = 1 << (4 + ch);
diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index 187c416..aa4b2a98 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -30,7 +30,7 @@
 
 struct timer8_priv {
 	struct clock_event_device ced;
-	unsigned long mapbase;
+	void __iomem *mapbase;
 	unsigned long flags;
 	unsigned int rate;
 	unsigned int tcora;
@@ -41,15 +41,15 @@ static unsigned long timer8_get_counter(struct timer8_priv *p)
 	unsigned long v1, v2, v3;
 	int o1, o2;
 
-	o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
+	o1 = readb(p->mapbase + _8TCSR) & 0x20;
 
 	/* Make sure the timer value is stable. Stolen from acpi_pm.c */
 	do {
 		o2 = o1;
-		v1 = ctrl_inw(p->mapbase + _8TCNT);
-		v2 = ctrl_inw(p->mapbase + _8TCNT);
-		v3 = ctrl_inw(p->mapbase + _8TCNT);
-		o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
+		v1 = readw(p->mapbase + _8TCNT);
+		v2 = readw(p->mapbase + _8TCNT);
+		v3 = readw(p->mapbase + _8TCNT);
+		o1 = readb(p->mapbase + _8TCSR) & 0x20;
 	} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
 			  || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
 
@@ -61,13 +61,13 @@ static irqreturn_t timer8_interrupt(int irq, void *dev_id)
 {
 	struct timer8_priv *p = dev_id;
 
-	ctrl_outb(ctrl_inb(p->mapbase + _8TCSR) & ~0x40,
+	writeb(readb(p->mapbase + _8TCSR) & ~0x40,
 		  p->mapbase + _8TCSR);
 
-	ctrl_outw(p->tcora, p->mapbase + TCORA);
+	writew(p->tcora, p->mapbase + TCORA);
 
 	if (clockevent_state_oneshot(&p->ced))
-		ctrl_outw(0x0000, p->mapbase + _8TCR);
+		writew(0x0000, p->mapbase + _8TCR);
 
 	p->ced.event_handler(&p->ced);
 
@@ -82,18 +82,18 @@ static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
 		pr_warn("delta out of range\n");
 	now = timer8_get_counter(p);
 	p->tcora = delta;
-	ctrl_outb(ctrl_inb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
+	writeb(readb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
 	if (delta > now)
-		ctrl_outw(delta, p->mapbase + TCORA);
+		writew(delta, p->mapbase + TCORA);
 	else
-		ctrl_outw(now + 1, p->mapbase + TCORA);
+		writew(now + 1, p->mapbase + TCORA);
 }
 
 static int timer8_enable(struct timer8_priv *p)
 {
-	ctrl_outw(0xffff, p->mapbase + TCORA);
-	ctrl_outw(0x0000, p->mapbase + _8TCNT);
-	ctrl_outw(0x0c02, p->mapbase + _8TCR);
+	writew(0xffff, p->mapbase + TCORA);
+	writew(0x0000, p->mapbase + _8TCNT);
+	writew(0x0c02, p->mapbase + _8TCR);
 
 	return 0;
 }
@@ -114,7 +114,7 @@ static int timer8_start(struct timer8_priv *p)
 
 static void timer8_stop(struct timer8_priv *p)
 {
-	ctrl_outw(0x0000, p->mapbase + _8TCR);
+	writew(0x0000, p->mapbase + _8TCR);
 }
 
 static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
@@ -213,7 +213,7 @@ static void __init h8300_8timer_init(struct device_node *node)
 		goto unmap_reg;
 	}
 
-	timer8_priv.mapbase = (unsigned long)base;
+	timer8_priv.mapbase = base;
 
 	rate = clk_get_rate(clk) / SCALE;
 	if (!rate) {
diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c
index c1eef42..91bf1992 100644
--- a/drivers/clocksource/h8300_tpu.c
+++ b/drivers/clocksource/h8300_tpu.c
@@ -21,8 +21,8 @@
 
 struct tpu_priv {
 	struct clocksource cs;
-	unsigned long mapbase1;
-	unsigned long mapbase2;
+	void __iomem *mapbase1;
+	void __iomem *mapbase2;
 	raw_spinlock_t lock;
 	unsigned int cs_enabled;
 };
@@ -31,8 +31,8 @@ static inline unsigned long read_tcnt32(struct tpu_priv *p)
 {
 	unsigned long tcnt;
 
-	tcnt = ctrl_inw(p->mapbase1 + TCNT) << 16;
-	tcnt |= ctrl_inw(p->mapbase2 + TCNT);
+	tcnt = readw(p->mapbase1 + TCNT) << 16;
+	tcnt |= readw(p->mapbase2 + TCNT);
 	return tcnt;
 }
 
@@ -41,7 +41,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
 	unsigned long v1, v2, v3;
 	int o1, o2;
 
-	o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
+	o1 = readb(p->mapbase1 + TSR) & 0x10;
 
 	/* Make sure the timer value is stable. Stolen from acpi_pm.c */
 	do {
@@ -49,7 +49,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
 		v1 = read_tcnt32(p);
 		v2 = read_tcnt32(p);
 		v3 = read_tcnt32(p);
-		o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
+		o1 = readb(p->mapbase1 + TSR) & 0x10;
 	} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
 			  || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
 
@@ -82,10 +82,10 @@ static int tpu_clocksource_enable(struct clocksource *cs)
 
 	WARN_ON(p->cs_enabled);
 
-	ctrl_outw(0, p->mapbase1 + TCNT);
-	ctrl_outw(0, p->mapbase2 + TCNT);
-	ctrl_outb(0x0f, p->mapbase1 + TCR);
-	ctrl_outb(0x03, p->mapbase2 + TCR);
+	writew(0, p->mapbase1 + TCNT);
+	writew(0, p->mapbase2 + TCNT);
+	writeb(0x0f, p->mapbase1 + TCR);
+	writeb(0x03, p->mapbase2 + TCR);
 
 	p->cs_enabled = true;
 	return 0;
@@ -97,8 +97,8 @@ static void tpu_clocksource_disable(struct clocksource *cs)
 
 	WARN_ON(!p->cs_enabled);
 
-	ctrl_outb(0, p->mapbase1 + TCR);
-	ctrl_outb(0, p->mapbase2 + TCR);
+	writeb(0, p->mapbase1 + TCR);
+	writeb(0, p->mapbase2 + TCR);
 	p->cs_enabled = false;
 }
 
@@ -139,8 +139,8 @@ static void __init h8300_tpu_init(struct device_node *node)
 		goto unmap_L;
 	}
 
-	tpu_priv.mapbase1 = (unsigned long)base[CH_L];
-	tpu_priv.mapbase2 = (unsigned long)base[CH_H];
+	tpu_priv.mapbase1 = base[CH_L];
+	tpu_priv.mapbase2 = base[CH_H];
 
 	clocksource_register_hz(&tpu_priv.cs, clk_get_rate(clk) / 64);
 
diff --git a/drivers/irqchip/irq-renesas-h8300h.c b/drivers/irqchip/irq-renesas-h8300h.c
index 6fd30d5..c378768 100644
--- a/drivers/irqchip/irq-renesas-h8300h.c
+++ b/drivers/irqchip/irq-renesas-h8300h.c
@@ -21,9 +21,9 @@ static const char ipr_bit[] = {
 	10, 10, 10, 10,  9,  9,  9,  9,
 };
 
-static void *intc_baseaddr;
+static void __iomem *intc_baseaddr;
 
-#define IPR ((unsigned long)intc_baseaddr + 6)
+#define IPR (intc_baseaddr + 6)
 
 static void h8300h_disable_irq(struct irq_data *data)
 {
@@ -81,8 +81,8 @@ static int __init h8300h_intc_of_init(struct device_node *intc,
 	BUG_ON(!intc_baseaddr);
 
 	/* All interrupt priority low */
-	ctrl_outb(0x00, IPR + 0);
-	ctrl_outb(0x00, IPR + 1);
+	writeb(0x00, IPR + 0);
+	writeb(0x00, IPR + 1);
 
 	domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, NULL);
 	BUG_ON(!domain);
-- 
1.9.1

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#1294863 — [PATCH 52/69] clocksource/drivers/h8300_timer16: Remove pointless lock

The lock in the timer16_clocksource_read is not needed, remove it.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/h8300_timer16.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c
index 129dca0..f396605 100644
--- a/drivers/clocksource/h8300_timer16.c
+++ b/drivers/clocksource/h8300_timer16.c
@@ -30,7 +30,6 @@ struct timer16_priv {
 	unsigned char imfa;
 	unsigned char imiea;
 	unsigned char ovf;
-	raw_spinlock_t lock;
 	struct clk *clk;
 };
 
@@ -75,13 +74,10 @@ static inline struct timer16_priv *cs_to_priv(struct clocksource *cs)
 static cycle_t timer16_clocksource_read(struct clocksource *cs)
 {
 	struct timer16_priv *p = cs_to_priv(cs);
-	unsigned long flags, raw;
-	unsigned long value;
+	unsigned long raw, value;
 
-	raw_spin_lock_irqsave(&p->lock, flags);
 	value = p->total_cycles;
 	raw = timer16_get_counter(p);
-	raw_spin_unlock_irqrestore(&p->lock, flags);
 
 	return value + raw;
 }
-- 
1.9.1

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#1294864 — [PATCH 64/69] clocksource/drivers/lpc32: Correct pr_err() output format

From: Vladimir Zapolskiy <vz@mleia.com>

If by some reason timerclk is not available, both clockevent and
clocksource initializations correctly exit, but output of errno to
kernel log buffer may be confusing:

  lpc32xx_clk_init: failed to map system control block registers
  lpc32xx_clocksource_init: clock get failed (4294966779)
  lpc32xx_clockevent_init: clock get failed (4294966779)

Use signed integer output in the correspondent pr_err() string formats:

  lpc32xx_clocksource_init: clock get failed (-517)
  lpc32xx_clockevent_init: clock get failed (-517)

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/time-lpc32xx.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clocksource/time-lpc32xx.c b/drivers/clocksource/time-lpc32xx.c
index a1c06a2..1316876 100644
--- a/drivers/clocksource/time-lpc32xx.c
+++ b/drivers/clocksource/time-lpc32xx.c
@@ -125,7 +125,7 @@ static int __init lpc32xx_clocksource_init(struct device_node *np)
 
 	clk = of_clk_get_by_name(np, "timerclk");
 	if (IS_ERR(clk)) {
-		pr_err("clock get failed (%lu)\n", PTR_ERR(clk));
+		pr_err("clock get failed (%ld)\n", PTR_ERR(clk));
 		return PTR_ERR(clk);
 	}
 
@@ -184,7 +184,7 @@ static int __init lpc32xx_clockevent_init(struct device_node *np)
 
 	clk = of_clk_get_by_name(np, "timerclk");
 	if (IS_ERR(clk)) {
-		pr_err("clock get failed (%lu)\n", PTR_ERR(clk));
+		pr_err("clock get failed (%ld)\n", PTR_ERR(clk));
 		return PTR_ERR(clk);
 	}
 
-- 
1.9.1

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#1294866 — [PATCH 48/69] clocksource/drivers/h8300_timer16: Remove pointless headers

The headers are not needed, remove them.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/h8300_timer16.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c
index cdf0d83..1c9dd02 100644
--- a/drivers/clocksource/h8300_timer16.c
+++ b/drivers/clocksource/h8300_timer16.c
@@ -4,25 +4,15 @@
  *  Copyright 2015 Yoshinori Sato <ysato@users.sourcefoge.jp>
  */
 
-#include <linux/errno.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/slab.h>
 #include <linux/interrupt.h>
 #include <linux/init.h>
-#include <linux/platform_device.h>
 #include <linux/clocksource.h>
-#include <linux/module.h>
 #include <linux/clk.h>
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 
-#include <asm/segment.h>
-#include <asm/irq.h>
-
 #define TSTR	0
 #define TSNC	1
 #define TMDR	2
-- 
1.9.1

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#1294867 — [PATCH 63/69] clocksource/drivers/arm_global_timer: Fix suspend resume

From: Grygorii Strashko <grygorii.strashko@ti.com>

Now the System stall is observed on TI AM437x based board (am437x-gp-evm)
during resuming from System suspend when ARM Global timer is selected as
clocksource device (CPUIdle not enabled) - SysRq are working, but nothing
else.

The reason of stall is that ARM Global timer loses its contexts during
System suspend:
   GT_CONTROL.TIMER_ENABLE = 0 (unbanked)
   GT_COUNTERx = 0

Hence, update ARM Global timer driver to reflect above behaviour
- re-enable ARM Global timer on resume (GT_CONTROL.TIMER_ENABLE = 1)
  if not enabled.

CC: Arnd Bergmann <arnd@arndb.de>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/arm_global_timer.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/clocksource/arm_global_timer.c b/drivers/clocksource/arm_global_timer.c
index f99be6b..d189d8c 100644
--- a/drivers/clocksource/arm_global_timer.c
+++ b/drivers/clocksource/arm_global_timer.c
@@ -195,12 +195,23 @@ static cycle_t gt_clocksource_read(struct clocksource *cs)
 	return gt_counter_read();
 }
 
+static void gt_resume(struct clocksource *cs)
+{
+	unsigned long ctrl;
+
+	ctrl = readl(gt_base + GT_CONTROL);
+	if (!(ctrl & GT_CONTROL_TIMER_ENABLE))
+		/* re-enable timer on resume */
+		writel(GT_CONTROL_TIMER_ENABLE, gt_base + GT_CONTROL);
+}
+
 static struct clocksource gt_clocksource = {
 	.name	= "arm_global_timer",
 	.rating	= 300,
 	.read	= gt_clocksource_read,
 	.mask	= CLOCKSOURCE_MASK(64),
 	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
+	.resume = gt_resume,
 };
 
 #ifdef CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
-- 
1.9.1

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#1294868 — [PATCH 68/69] clocksource/drivers/h8300: Initializer cleanup.

From: Yoshinori Sato <ysato@users.sourceforge.jp>

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/h8300_timer8.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index 1ba453b..9087dd2 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -33,7 +33,6 @@ struct timer8_priv {
 	void __iomem *mapbase;
 	unsigned long flags;
 	unsigned int rate;
-	unsigned int tcora;
 };
 
 static irqreturn_t timer8_interrupt(int irq, void *dev_id)
@@ -163,8 +162,6 @@ static void __init h8300_8timer_init(struct device_node *node)
 {
 	void __iomem *base;
 	int irq;
-	int ret = 0;
-	int rate;
 	struct clk *clk;
 
 	clk = of_clk_get(node, 0);
@@ -187,20 +184,20 @@ static void __init h8300_8timer_init(struct device_node *node)
 
 	timer8_priv.mapbase = base;
 
-	rate = clk_get_rate(clk) / SCALE;
-	if (!rate) {
+	timer8_priv.rate = clk_get_rate(clk) / SCALE;
+	if (!timer8_priv.rate) {
 		pr_err("Failed to get rate for the clocksource\n");
 		goto unmap_reg;
 	}
 
-	ret = request_irq(irq, timer8_interrupt,
-			  IRQF_TIMER, timer8_priv.ced.name, &timer8_priv);
-	if (ret < 0) {
+	if (request_irq(irq, timer8_interrupt, IRQF_TIMER,
+			timer8_priv.ced.name, &timer8_priv) < 0) {
 		pr_err("failed to request irq %d for clockevent\n", irq);
 		goto unmap_reg;
 	}
 
-	clockevents_config_and_register(&timer8_priv.ced, rate, 1, 0x0000ffff);
+	clockevents_config_and_register(&timer8_priv.ced,
+					timer8_priv.rate, 1, 0x0000ffff);
 
 	return;
 unmap_reg:
-- 
1.9.1

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#1294869 — [PATCH 56/69] clocksource/drivers/h8300: Increase the compilation test coverage

Add the COMPILE_TEST option so the drivers can be compiled on different
architecture with the 'allyesconfig' kernel configuration.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/Kconfig | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 73477b5..db240cb 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -363,13 +363,24 @@ config CLKSRC_PXA
 	  platforms.
 
 config H8300_TMR8
-        bool
+        bool "Clockevent timer for the H8300 platform" if COMPILE_TEST
+        depends on GENERIC_CLOCKEVENTS
+	help
+	  This enables the 8 bits timer for the H8300 platform.
 
 config H8300_TMR16
-        bool
+        bool "Clockevent timer for the H83069 platform" if COMPILE_TEST
+        depends on GENERIC_CLOCKEVENTS
+	help
+	  This enables the 16 bits timer for the H8300 platform with the
+	  H83069 cpu.
 
 config H8300_TPU
-        bool
+        bool "Clocksource for the H8300 platform" if COMPILE_TEST
+        depends on GENERIC_CLOCKEVENTS
+	help
+	  This enables the clocksource for the H8300 platform with the
+	  H8S2678 cpu.
 
 config CLKSRC_IMX_GPT
 	bool "Clocksource using i.MX GPT" if COMPILE_TEST
-- 
1.9.1

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#1294871 — [PATCH 67/69] clocksource/drivers/h8300: Simplify delta handling

From: Yoshinori Sato <ysato@users.sourceforge.jp>

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/h8300_timer8.c | 40 ++++++--------------------------------
 1 file changed, 6 insertions(+), 34 deletions(-)

diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index aa4b2a98..1ba453b 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -36,57 +36,29 @@ struct timer8_priv {
 	unsigned int tcora;
 };
 
-static unsigned long timer8_get_counter(struct timer8_priv *p)
-{
-	unsigned long v1, v2, v3;
-	int o1, o2;
-
-	o1 = readb(p->mapbase + _8TCSR) & 0x20;
-
-	/* Make sure the timer value is stable. Stolen from acpi_pm.c */
-	do {
-		o2 = o1;
-		v1 = readw(p->mapbase + _8TCNT);
-		v2 = readw(p->mapbase + _8TCNT);
-		v3 = readw(p->mapbase + _8TCNT);
-		o1 = readb(p->mapbase + _8TCSR) & 0x20;
-	} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
-			  || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
-
-	v2 |= o1 << 10;
-	return v2;
-}
-
 static irqreturn_t timer8_interrupt(int irq, void *dev_id)
 {
 	struct timer8_priv *p = dev_id;
 
-	writeb(readb(p->mapbase + _8TCSR) & ~0x40,
-		  p->mapbase + _8TCSR);
-
-	writew(p->tcora, p->mapbase + TCORA);
-
 	if (clockevent_state_oneshot(&p->ced))
 		writew(0x0000, p->mapbase + _8TCR);
 
 	p->ced.event_handler(&p->ced);
 
+	writeb(readb(p->mapbase + _8TCSR) & ~0x40,
+		  p->mapbase + _8TCSR);
+
 	return IRQ_HANDLED;
 }
 
 static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
 {
-	unsigned long now;
-
 	if (delta >= 0x10000)
 		pr_warn("delta out of range\n");
-	now = timer8_get_counter(p);
-	p->tcora = delta;
+	writeb(readb(p->mapbase + _8TCR) & ~0x40, p->mapbase + _8TCR);
+	writew(0, p->mapbase + _8TCNT);
+	writew(delta, p->mapbase + TCORA);
 	writeb(readb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
-	if (delta > now)
-		writew(delta, p->mapbase + TCORA);
-	else
-		writew(now + 1, p->mapbase + TCORA);
 }
 
 static int timer8_enable(struct timer8_priv *p)
-- 
1.9.1

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#1294872 — [PATCH 50/69] clocksource/drivers/h8300_timer16: Remove unused fields in timer16_priv

The fields are not used in the code, remove them.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/h8300_timer16.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c
index bc9289b..6705bf7 100644
--- a/drivers/clocksource/h8300_timer16.c
+++ b/drivers/clocksource/h8300_timer16.c
@@ -25,8 +25,6 @@ struct timer16_priv {
 	unsigned long total_cycles;
 	unsigned long mapbase;
 	unsigned long mapcommon;
-	unsigned long flags;
-	unsigned short gra;
 	unsigned short cs_enabled;
 	unsigned char enb;
 	unsigned char imfa;
-- 
1.9.1

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#1294876 — [PATCH 44/69] clocksource/drivers/h8300_timer8: Fix irq return value check

The value returned in case of error for the 'irq_of_parse_and_map' function is
zero in case of error. Fix the check in the init code.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/h8300_timer8.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index 2433325..3eedeff 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -230,7 +230,7 @@ static void __init h8300_8timer_init(struct device_node *node)
 	}
 
 	irq = irq_of_parse_and_map(node, 0);
-	if (irq < 0) {
+	if (!irq) {
 		pr_err("failed to get irq for clockevent\n");
 		goto unmap_reg;
 	}
-- 
1.9.1

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#1294878 — [PATCH 58/69] clocksource/drivers/dw_apb_timer: Fix apbt_readl return types

From: Jisheng Zhang <jszhang@marvell.com>

On Marvell BG4CT platform, we observed the __apbt_read_clocksource()
return wrong value: Let's assume the APBTMR_N_CURRENT_VALUE value is
0xf0000000, we got 0xffffffff0fffffff, but it should be 0xfffffff.

This issue should be common on all 64bit platforms. We fix the issue
by letting aptb_readl() return u32. apbt_writel() is also updated
to write u32 val rather than unsigned long.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/dw_apb_timer.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/clocksource/dw_apb_timer.c b/drivers/clocksource/dw_apb_timer.c
index c76c750..3a6d9db 100644
--- a/drivers/clocksource/dw_apb_timer.c
+++ b/drivers/clocksource/dw_apb_timer.c
@@ -49,12 +49,12 @@ clocksource_to_dw_apb_clocksource(struct clocksource *cs)
 	return container_of(cs, struct dw_apb_clocksource, cs);
 }
 
-static unsigned long apbt_readl(struct dw_apb_timer *timer, unsigned long offs)
+static u32 apbt_readl(struct dw_apb_timer *timer, unsigned long offs)
 {
 	return readl(timer->base + offs);
 }
 
-static void apbt_writel(struct dw_apb_timer *timer, unsigned long val,
+static void apbt_writel(struct dw_apb_timer *timer, u32 val,
 		 unsigned long offs)
 {
 	writel(val, timer->base + offs);
@@ -62,7 +62,7 @@ static void apbt_writel(struct dw_apb_timer *timer, unsigned long val,
 
 static void apbt_disable_int(struct dw_apb_timer *timer)
 {
-	unsigned long ctrl = apbt_readl(timer, APBTMR_N_CONTROL);
+	u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL);
 
 	ctrl |= APBTMR_CONTROL_INT;
 	apbt_writel(timer, ctrl, APBTMR_N_CONTROL);
@@ -103,7 +103,7 @@ static irqreturn_t dw_apb_clockevent_irq(int irq, void *data)
 
 static void apbt_enable_int(struct dw_apb_timer *timer)
 {
-	unsigned long ctrl = apbt_readl(timer, APBTMR_N_CONTROL);
+	u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL);
 	/* clear pending intr */
 	apbt_readl(timer, APBTMR_N_EOI);
 	ctrl &= ~APBTMR_CONTROL_INT;
@@ -113,7 +113,7 @@ static void apbt_enable_int(struct dw_apb_timer *timer)
 static int apbt_shutdown(struct clock_event_device *evt)
 {
 	struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);
-	unsigned long ctrl;
+	u32 ctrl;
 
 	pr_debug("%s CPU %d state=shutdown\n", __func__,
 		 cpumask_first(evt->cpumask));
@@ -127,7 +127,7 @@ static int apbt_shutdown(struct clock_event_device *evt)
 static int apbt_set_oneshot(struct clock_event_device *evt)
 {
 	struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);
-	unsigned long ctrl;
+	u32 ctrl;
 
 	pr_debug("%s CPU %d state=oneshot\n", __func__,
 		 cpumask_first(evt->cpumask));
@@ -160,7 +160,7 @@ static int apbt_set_periodic(struct clock_event_device *evt)
 {
 	struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);
 	unsigned long period = DIV_ROUND_UP(dw_ced->timer.freq, HZ);
-	unsigned long ctrl;
+	u32 ctrl;
 
 	pr_debug("%s CPU %d state=periodic\n", __func__,
 		 cpumask_first(evt->cpumask));
@@ -196,7 +196,7 @@ static int apbt_resume(struct clock_event_device *evt)
 static int apbt_next_event(unsigned long delta,
 			   struct clock_event_device *evt)
 {
-	unsigned long ctrl;
+	u32 ctrl;
 	struct dw_apb_clock_event_device *dw_ced = ced_to_dw_apb_ced(evt);
 
 	/* Disable timer */
@@ -323,7 +323,7 @@ void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs)
 	 * start count down from 0xffff_ffff. this is done by toggling the
 	 * enable bit then load initial load count to ~0.
 	 */
-	unsigned long ctrl = apbt_readl(&dw_cs->timer, APBTMR_N_CONTROL);
+	u32 ctrl = apbt_readl(&dw_cs->timer, APBTMR_N_CONTROL);
 
 	ctrl &= ~APBTMR_CONTROL_ENABLE;
 	apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL);
@@ -338,7 +338,7 @@ void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs)
 
 static cycle_t __apbt_read_clocksource(struct clocksource *cs)
 {
-	unsigned long current_count;
+	u32 current_count;
 	struct dw_apb_clocksource *dw_cs =
 		clocksource_to_dw_apb_clocksource(cs);
 
-- 
1.9.1

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#1294879 — [PATCH 45/69] clocksource/drivers/h8300_timer8: Remove pointless irq re-entrant safe code

The current code assumes the interrupt function is re-entrant.

That is not correct. An interrupt handler is never invoked concurrently. The
interrupt line is masked on all processors.

Remove the chewing flags in the code.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/h8300_timer8.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index 3eedeff..7111b99 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -24,8 +24,6 @@
 #define TCORB	6
 #define _8TCNT	8
 
-#define FLAG_SKIPEVENT (1 << 1)
-#define FLAG_IRQCONTEXT (1 << 2)
 #define FLAG_STARTED (1 << 3)
 
 #define SCALE 64
@@ -67,14 +65,13 @@ static irqreturn_t timer8_interrupt(int irq, void *dev_id)
 
 	ctrl_outb(ctrl_inb(p->mapbase + _8TCSR) & ~0x40,
 		  p->mapbase + _8TCSR);
-	p->flags |= FLAG_IRQCONTEXT;
+
 	ctrl_outw(p->tcora, p->mapbase + TCORA);
-	if (!(p->flags & FLAG_SKIPEVENT)) {
-		if (clockevent_state_oneshot(&p->ced))
-			ctrl_outw(0x0000, p->mapbase + _8TCR);
-		p->ced.event_handler(&p->ced);
-	}
-	p->flags &= ~(FLAG_SKIPEVENT | FLAG_IRQCONTEXT);
+
+	if (clockevent_state_oneshot(&p->ced))
+		ctrl_outw(0x0000, p->mapbase + _8TCR);
+
+	p->ced.event_handler(&p->ced);
 
 	return IRQ_HANDLED;
 }
-- 
1.9.1

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#1294880 — [PATCH 62/69] clocksource/drivers/pistachio: Fix wrong calculated clocksource read value

From: Jisheng Zhang <jszhang@marvell.com>

Let's assume the counter value is 0xf0000000, the pistachio clocksource
read cycles function should return ~0x0fffffff but actually it returns
0xffffffff0fffffff.

That occurs because:

	~(cycle_t)value is different from (cycle_t)~value.

unsigned long val = ~(unsigned long)0xf0000000;
40049a:       48 b8 ff ff ff 0f ff    movabs $0xffffffff0fffffff,%rax

unsigned long val = (unsigned long)~0xf0000000;
40049a:       48 c7 45 f8 ff ff ff    movq   $0xfffffff,-0x8(%rbp)

We fix this issue by calculating bitwise-not counter, then cast to
cycle_t.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/time-pistachio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clocksource/time-pistachio.c b/drivers/clocksource/time-pistachio.c
index bba6799..3269d9e 100644
--- a/drivers/clocksource/time-pistachio.c
+++ b/drivers/clocksource/time-pistachio.c
@@ -84,7 +84,7 @@ pistachio_clocksource_read_cycles(struct clocksource *cs)
 	counter = gpt_readl(pcs->base, TIMER_CURRENT_VALUE, 0);
 	raw_spin_unlock_irqrestore(&pcs->lock, flags);
 
-	return ~(cycle_t)counter;
+	return (cycle_t)~counter;
 }
 
 static u64 notrace pistachio_read_sched_clock(void)
-- 
1.9.1

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#1294881 — [PATCH 46/69] clocksource/drivers/h8300_timer8: Remove irq and lock legacy code

The time framawork takes care of disabling the interrupts and takes a lock
to prevent races.

Remove the legacy code in the driver taking care of the races.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/h8300_timer8.c | 16 ----------------
 1 file changed, 16 deletions(-)

diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index 7111b99..24d91b1 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -31,7 +31,6 @@
 struct timer8_priv {
 	struct clock_event_device ced;
 	unsigned long mapbase;
-	raw_spinlock_t lock;
 	unsigned long flags;
 	unsigned int rate;
 	unsigned int tcora;
@@ -78,10 +77,8 @@ static irqreturn_t timer8_interrupt(int irq, void *dev_id)
 
 static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
 {
-	unsigned long flags;
 	unsigned long now;
 
-	raw_spin_lock_irqsave(&p->lock, flags);
 	if (delta >= 0x10000)
 		pr_warn("delta out of range\n");
 	now = timer8_get_counter(p);
@@ -91,8 +88,6 @@ static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
 		ctrl_outw(delta, p->mapbase + TCORA);
 	else
 		ctrl_outw(now + 1, p->mapbase + TCORA);
-
-	raw_spin_unlock_irqrestore(&p->lock, flags);
 }
 
 static int timer8_enable(struct timer8_priv *p)
@@ -108,9 +103,6 @@ static int timer8_enable(struct timer8_priv *p)
 static int timer8_start(struct timer8_priv *p)
 {
 	int ret = 0;
-	unsigned long flags;
-
-	raw_spin_lock_irqsave(&p->lock, flags);
 
 	if (!(p->flags & FLAG_STARTED))
 		ret = timer8_enable(p);
@@ -120,20 +112,12 @@ static int timer8_start(struct timer8_priv *p)
 	p->flags |= FLAG_STARTED;
 
  out:
-	raw_spin_unlock_irqrestore(&p->lock, flags);
-
 	return ret;
 }
 
 static void timer8_stop(struct timer8_priv *p)
 {
-	unsigned long flags;
-
-	raw_spin_lock_irqsave(&p->lock, flags);
-
 	ctrl_outw(0x0000, p->mapbase + _8TCR);
-
-	raw_spin_unlock_irqrestore(&p->lock, flags);
 }
 
 static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
-- 
1.9.1

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#1294882 — [PATCH 69/69] clocksource/drivers/h8300: Use ioread / iowrite

From: Yoshinori Sato <ysato@users.sourceforge.jp>

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/h8300_timer16.c | 43 ++++++++++++++++++-------------------
 drivers/clocksource/h8300_timer8.c  | 28 ++++++++++++++----------
 drivers/clocksource/h8300_tpu.c     | 22 ++++++++++---------
 3 files changed, 50 insertions(+), 43 deletions(-)

diff --git a/drivers/clocksource/h8300_timer16.c b/drivers/clocksource/h8300_timer16.c
index 934ed0b..75c4407 100644
--- a/drivers/clocksource/h8300_timer16.c
+++ b/drivers/clocksource/h8300_timer16.c
@@ -19,6 +19,9 @@
 #define TCR	0
 #define TCNT	2
 
+#define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a))
+#define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a))
+
 struct timer16_priv {
 	struct clocksource cs;
 	unsigned long total_cycles;
@@ -28,23 +31,22 @@ struct timer16_priv {
 	unsigned char enb;
 	unsigned char ovf;
 	unsigned char ovie;
-	struct clk *clk;
 };
 
 static unsigned long timer16_get_counter(struct timer16_priv *p)
 {
-	unsigned long v1, v2, v3;
-	int o1, o2;
+	unsigned short v1, v2, v3;
+	unsigned char  o1, o2;
 
-	o1 = readb(p->mapcommon + TISRC) & p->ovf;
+	o1 = ioread8(p->mapcommon + TISRC) & p->ovf;
 
 	/* Make sure the timer value is stable. Stolen from acpi_pm.c */
 	do {
 		o2 = o1;
-		v1 = readw(p->mapbase + TCNT);
-		v2 = readw(p->mapbase + TCNT);
-		v3 = readw(p->mapbase + TCNT);
-		o1 = readb(p->mapcommon + TISRC) & p->ovf;
+		v1 = ioread16be(p->mapbase + TCNT);
+		v2 = ioread16be(p->mapbase + TCNT);
+		v3 = ioread16be(p->mapbase + TCNT);
+		o1 = ioread8(p->mapcommon + TISRC) & p->ovf;
 	} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
 			  || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
 
@@ -59,8 +61,7 @@ static irqreturn_t timer16_interrupt(int irq, void *dev_id)
 {
 	struct timer16_priv *p = (struct timer16_priv *)dev_id;
 
-	writeb(readb(p->mapcommon + TISRC) & ~p->ovf,
-		  p->mapcommon + TISRC);
+	bclr(p->ovf, p->mapcommon + TISRC);
 	p->total_cycles += 0x10000;
 
 	return IRQ_HANDLED;
@@ -89,12 +90,10 @@ static int timer16_enable(struct clocksource *cs)
 	WARN_ON(p->cs_enabled);
 
 	p->total_cycles = 0;
-	writew(0x0000, p->mapbase + TCNT);
-	writeb(0x83, p->mapbase + TCR);
-	writeb(readb(p->mapcommon + TSTR) | p->enb,
-		  p->mapcommon + TSTR);
-	writeb(readb(p->mapcommon + TISRC) | p->ovie,
-		  p->mapcommon + TSTR);
+	iowrite16be(0x0000, p->mapbase + TCNT);
+	iowrite8(0x83, p->mapbase + TCR);
+	bset(p->ovie, p->mapcommon + TISRC);
+	bset(p->enb, p->mapcommon + TSTR);
 
 	p->cs_enabled = true;
 	return 0;
@@ -106,8 +105,8 @@ static void timer16_disable(struct clocksource *cs)
 
 	WARN_ON(!p->cs_enabled);
 
-	writeb(readb(p->mapcommon + TSTR) & ~p->enb,
-		  p->mapcommon + TSTR);
+	bclr(p->ovie, p->mapcommon + TISRC);
+	bclr(p->enb, p->mapcommon + TSTR);
 
 	p->cs_enabled = false;
 }
@@ -162,9 +161,9 @@ static void __init h8300_16timer_init(struct device_node *node)
 
 	timer16_priv.mapbase = base[REG_CH];
 	timer16_priv.mapcommon = base[REG_COMM];
-	timer16_priv.enb = 1 << ch;
-	timer16_priv.ovf = 1 << ch;
-	timer16_priv.ovie = 1 << (4 + ch);
+	timer16_priv.enb = ch;
+	timer16_priv.ovf = ch;
+	timer16_priv.ovie = 4 + ch;
 
 	ret = request_irq(irq, timer16_interrupt,
 			  IRQF_TIMER, timer16_priv.cs.name, &timer16_priv);
@@ -174,7 +173,7 @@ static void __init h8300_16timer_init(struct device_node *node)
 	}
 
 	clocksource_register_hz(&timer16_priv.cs,
-				clk_get_rate(timer16_priv.clk) / 8);
+				clk_get_rate(clk) / 8);
 	return;
 
 unmap_comm:
diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index 9087dd2..c151941 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -24,10 +24,16 @@
 #define TCORB	6
 #define _8TCNT	8
 
+#define CMIEA	6
+#define CMFA	6
+
 #define FLAG_STARTED (1 << 3)
 
 #define SCALE 64
 
+#define bset(b, a) iowrite8(ioread8(a) | (1 << (b)), (a))
+#define bclr(b, a) iowrite8(ioread8(a) & ~(1 << (b)), (a))
+
 struct timer8_priv {
 	struct clock_event_device ced;
 	void __iomem *mapbase;
@@ -40,12 +46,11 @@ static irqreturn_t timer8_interrupt(int irq, void *dev_id)
 	struct timer8_priv *p = dev_id;
 
 	if (clockevent_state_oneshot(&p->ced))
-		writew(0x0000, p->mapbase + _8TCR);
+		iowrite16be(0x0000, p->mapbase + _8TCR);
 
 	p->ced.event_handler(&p->ced);
 
-	writeb(readb(p->mapbase + _8TCSR) & ~0x40,
-		  p->mapbase + _8TCSR);
+	bclr(CMFA, p->mapbase + _8TCSR);
 
 	return IRQ_HANDLED;
 }
@@ -54,17 +59,18 @@ static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
 {
 	if (delta >= 0x10000)
 		pr_warn("delta out of range\n");
-	writeb(readb(p->mapbase + _8TCR) & ~0x40, p->mapbase + _8TCR);
-	writew(0, p->mapbase + _8TCNT);
-	writew(delta, p->mapbase + TCORA);
-	writeb(readb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
+	bclr(CMIEA, p->mapbase + _8TCR);
+	iowrite16be(delta, p->mapbase + TCORA);
+	iowrite16be(0x0000, p->mapbase + _8TCNT);
+	bclr(CMFA, p->mapbase + _8TCSR);
+	bset(CMIEA, p->mapbase + _8TCR);
 }
 
 static int timer8_enable(struct timer8_priv *p)
 {
-	writew(0xffff, p->mapbase + TCORA);
-	writew(0x0000, p->mapbase + _8TCNT);
-	writew(0x0c02, p->mapbase + _8TCR);
+	iowrite16be(0xffff, p->mapbase + TCORA);
+	iowrite16be(0x0000, p->mapbase + _8TCNT);
+	iowrite16be(0x0c02, p->mapbase + _8TCR);
 
 	return 0;
 }
@@ -85,7 +91,7 @@ static int timer8_start(struct timer8_priv *p)
 
 static void timer8_stop(struct timer8_priv *p)
 {
-	writew(0x0000, p->mapbase + _8TCR);
+	iowrite16be(0x0000, p->mapbase + _8TCR);
 }
 
 static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
diff --git a/drivers/clocksource/h8300_tpu.c b/drivers/clocksource/h8300_tpu.c
index 91bf1992..d4c1a28 100644
--- a/drivers/clocksource/h8300_tpu.c
+++ b/drivers/clocksource/h8300_tpu.c
@@ -19,6 +19,8 @@
 #define TSR	0x5
 #define TCNT	0x6
 
+#define TCFV	0x10
+
 struct tpu_priv {
 	struct clocksource cs;
 	void __iomem *mapbase1;
@@ -31,8 +33,8 @@ static inline unsigned long read_tcnt32(struct tpu_priv *p)
 {
 	unsigned long tcnt;
 
-	tcnt = readw(p->mapbase1 + TCNT) << 16;
-	tcnt |= readw(p->mapbase2 + TCNT);
+	tcnt = ioread16be(p->mapbase1 + TCNT) << 16;
+	tcnt |= ioread16be(p->mapbase2 + TCNT);
 	return tcnt;
 }
 
@@ -41,7 +43,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
 	unsigned long v1, v2, v3;
 	int o1, o2;
 
-	o1 = readb(p->mapbase1 + TSR) & 0x10;
+	o1 = ioread8(p->mapbase1 + TSR) & TCFV;
 
 	/* Make sure the timer value is stable. Stolen from acpi_pm.c */
 	do {
@@ -49,7 +51,7 @@ static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
 		v1 = read_tcnt32(p);
 		v2 = read_tcnt32(p);
 		v3 = read_tcnt32(p);
-		o1 = readb(p->mapbase1 + TSR) & 0x10;
+		o1 = ioread8(p->mapbase1 + TSR) & TCFV;
 	} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
 			  || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
 
@@ -82,10 +84,10 @@ static int tpu_clocksource_enable(struct clocksource *cs)
 
 	WARN_ON(p->cs_enabled);
 
-	writew(0, p->mapbase1 + TCNT);
-	writew(0, p->mapbase2 + TCNT);
-	writeb(0x0f, p->mapbase1 + TCR);
-	writeb(0x03, p->mapbase2 + TCR);
+	iowrite16be(0, p->mapbase1 + TCNT);
+	iowrite16be(0, p->mapbase2 + TCNT);
+	iowrite8(0x0f, p->mapbase1 + TCR);
+	iowrite8(0x03, p->mapbase2 + TCR);
 
 	p->cs_enabled = true;
 	return 0;
@@ -97,8 +99,8 @@ static void tpu_clocksource_disable(struct clocksource *cs)
 
 	WARN_ON(!p->cs_enabled);
 
-	writeb(0, p->mapbase1 + TCR);
-	writeb(0, p->mapbase2 + TCR);
+	iowrite8(0, p->mapbase1 + TCR);
+	iowrite8(0, p->mapbase2 + TCR);
 	p->cs_enabled = false;
 }
 
-- 
1.9.1

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#1294884 — [PATCH 61/69] clockevents/drivers/arm_global_timer: Use writel_relaxed in gt_compare_set

From: Jisheng Zhang <jszhang@marvell.com>

Use the relaxed version to improve performance. we measured time of
4096 rounds of gt_compare_set() spent on Marvell BG2Q:

before the patch: 3690648ns on average
after the patch: 1083023ns on average

improved by 70%!

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/arm_global_timer.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/clocksource/arm_global_timer.c b/drivers/clocksource/arm_global_timer.c
index a2cb6fa..f99be6b 100644
--- a/drivers/clocksource/arm_global_timer.c
+++ b/drivers/clocksource/arm_global_timer.c
@@ -99,17 +99,17 @@ static void gt_compare_set(unsigned long delta, int periodic)
 
 	counter += delta;
 	ctrl = GT_CONTROL_TIMER_ENABLE;
-	writel(ctrl, gt_base + GT_CONTROL);
-	writel(lower_32_bits(counter), gt_base + GT_COMP0);
-	writel(upper_32_bits(counter), gt_base + GT_COMP1);
+	writel_relaxed(ctrl, gt_base + GT_CONTROL);
+	writel_relaxed(lower_32_bits(counter), gt_base + GT_COMP0);
+	writel_relaxed(upper_32_bits(counter), gt_base + GT_COMP1);
 
 	if (periodic) {
-		writel(delta, gt_base + GT_AUTO_INC);
+		writel_relaxed(delta, gt_base + GT_AUTO_INC);
 		ctrl |= GT_CONTROL_AUTO_INC;
 	}
 
 	ctrl |= GT_CONTROL_COMP_ENABLE | GT_CONTROL_IRQ_ENABLE;
-	writel(ctrl, gt_base + GT_CONTROL);
+	writel_relaxed(ctrl, gt_base + GT_CONTROL);
 }
 
 static int gt_clockevent_shutdown(struct clock_event_device *evt)
-- 
1.9.1

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#1294885 — [PATCH 57/69] clocksource/drivers/tango-xtal: Replace code by clocksource_mmio_init

The current code to initialize, register and read the clocksource is
already factored out in mmio.c via the clocksource_mmio_init function.

Factor out the code with the clocksource_mmio_init function.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/Kconfig      |  1 +
 drivers/clocksource/tango_xtal.c | 18 +++---------------
 2 files changed, 4 insertions(+), 15 deletions(-)

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index db240cb..b251013 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -351,6 +351,7 @@ config CLKSRC_TANGO_XTAL
 	bool "Clocksource for Tango SoC" if COMPILE_TEST
 	depends on ARM
 	select CLKSRC_OF
+	select CLKSRC_MMIO
 	help
 	  This enables the clocksource for Tango SoC
 
diff --git a/drivers/clocksource/tango_xtal.c b/drivers/clocksource/tango_xtal.c
index d297b30..2bcecaf 100644
--- a/drivers/clocksource/tango_xtal.c
+++ b/drivers/clocksource/tango_xtal.c
@@ -19,19 +19,6 @@ static u64 notrace read_sched_clock(void)
 	return read_xtal_counter();
 }
 
-static cycle_t read_clocksource(struct clocksource *cs)
-{
-	return read_xtal_counter();
-}
-
-static struct clocksource tango_xtal = {
-	.name	= "tango-xtal",
-	.rating	= 350,
-	.read	= read_clocksource,
-	.mask	= CLOCKSOURCE_MASK(32),
-	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
 static void __init tango_clocksource_init(struct device_node *np)
 {
 	struct clk *clk;
@@ -53,8 +40,9 @@ static void __init tango_clocksource_init(struct device_node *np)
 	delay_timer.freq = xtal_freq;
 	delay_timer.read_current_timer = read_xtal_counter;
 
-	ret = clocksource_register_hz(&tango_xtal, xtal_freq);
-	if (ret != 0) {
+	ret = clocksource_mmio_init(xtal_in_cnt, "tango-xtal", xtal_freq, 350,
+				    32, clocksource_mmio_readl_up);
+	if (!ret) {
 		pr_err("%s: registration failed\n", np->full_name);
 		return;
 	}
-- 
1.9.1

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#1294886 — [PATCH 43/69] clocksource/drivers/h8300_timer8: Remove PERIODIC and ONESHOT macro

Specify the delta as parameter for the timer8_clock_event_start function
instead of using a macro to tell PERIODIC or ONESHOT.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/h8300_timer8.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/clocksource/h8300_timer8.c b/drivers/clocksource/h8300_timer8.c
index 88b9b06..2433325 100644
--- a/drivers/clocksource/h8300_timer8.c
+++ b/drivers/clocksource/h8300_timer8.c
@@ -28,9 +28,6 @@
 #define FLAG_IRQCONTEXT (1 << 2)
 #define FLAG_STARTED (1 << 3)
 
-#define ONESHOT  0
-#define PERIODIC 1
-
 #define SCALE 64
 
 struct timer8_priv {
@@ -147,7 +144,7 @@ static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
 	return container_of(ced, struct timer8_priv, ced);
 }
 
-static void timer8_clock_event_start(struct timer8_priv *p, int periodic)
+static void timer8_clock_event_start(struct timer8_priv *p, unsigned long delta)
 {
 	struct clock_event_device *ced = &p->ced;
 
@@ -158,7 +155,7 @@ static void timer8_clock_event_start(struct timer8_priv *p, int periodic)
 	ced->max_delta_ns = clockevent_delta2ns(0xffff, ced);
 	ced->min_delta_ns = clockevent_delta2ns(0x0001, ced);
 
-	timer8_set_next(p, periodic?(p->rate + HZ/2) / HZ:0x10000);
+	timer8_set_next(p, delta);
 }
 
 static int timer8_clock_event_shutdown(struct clock_event_device *ced)
@@ -173,7 +170,7 @@ static int timer8_clock_event_periodic(struct clock_event_device *ced)
 
 	pr_info("%s: used for periodic clock events\n", ced->name);
 	timer8_stop(p);
-	timer8_clock_event_start(p, PERIODIC);
+	timer8_clock_event_start(p, (p->rate + HZ/2) / HZ);
 
 	return 0;
 }
@@ -184,7 +181,7 @@ static int timer8_clock_event_oneshot(struct clock_event_device *ced)
 
 	pr_info("%s: used for oneshot clock events\n", ced->name);
 	timer8_stop(p);
-	timer8_clock_event_start(p, ONESHOT);
+	timer8_clock_event_start(p, 0x10000);
 
 	return 0;
 }
-- 
1.9.1

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#1294887 — [PATCH 20/69] clocksource/drivers/digicolor: Add the COMPILE_TEST option

Increase the compilation test coverage by adding the COMPILE_TEST option.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/Kconfig | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 68a63b2..63a8c6f 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -28,7 +28,9 @@ config CLKSRC_MMIO
 	bool
 
 config DIGICOLOR_TIMER
-	bool
+	bool "Digicolor timer driver" if COMPILE_TEST
+	help
+	  Enables the support for the digicolor timer driver.
 
 config DW_APB_TIMER
 	bool
-- 
1.9.1

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#1294888 — [PATCH 19/69] clocksource/drivers/orion: Add the COMPILE_TEST option

Increase the compilation test coverage by adding the COMPILE_TEST option.

The driver is using the atomic_io API which is not portable, so the
compilation is restricted to ARM only.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/Kconfig | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index f6e71b7..68a63b2 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -59,9 +59,12 @@ config MESON6_TIMER
 	  Enables the support for the Meson6 timer driver.
 
 config ORION_TIMER
+	bool "Orion timer driver" if COMPILE_TEST
+	depends on ARM
 	select CLKSRC_OF
 	select CLKSRC_MMIO
-	bool
+	help
+	  Enables the support for the Orion timer driver
 
 config SUN4I_TIMER
 	select CLKSRC_MMIO
-- 
1.9.1

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