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[PATCH 1/2] ARM: dts: TS-4800: drop uart rts/cts pin reservations

Started byDamien Riegel <damien.riegel@savoirfairelinux.com>
First post2015-12-17 22:30 +0100
Last post2015-12-21 14:00 +0100
Articles 2 — 2 participants

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  [PATCH 1/2] ARM: dts: TS-4800: drop uart rts/cts pin reservations Damien Riegel <damien.riegel@savoirfairelinux.com> - 2015-12-17 22:30 +0100
    Re: [PATCH 1/2] ARM: dts: TS-4800: drop uart rts/cts pin reservations Shawn Guo <shawnguo@kernel.org> - 2015-12-21 14:00 +0100

#1294278 — [PATCH 1/2] ARM: dts: TS-4800: drop uart rts/cts pin reservations

FromDamien Riegel <damien.riegel@savoirfairelinux.com>
Date2015-12-17 22:30 +0100
Subject[PATCH 1/2] ARM: dts: TS-4800: drop uart rts/cts pin reservations
Message-ID<qGOhz-4Td-3@gated-at.bofh.it>
These pins are actually not routed for UARTs, they should not be
reserved.

Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
---
 arch/arm/boot/dts/imx51-ts4800.dts | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/boot/dts/imx51-ts4800.dts b/arch/arm/boot/dts/imx51-ts4800.dts
index f1317f7..64ac55c 100644
--- a/arch/arm/boot/dts/imx51-ts4800.dts
+++ b/arch/arm/boot/dts/imx51-ts4800.dts
@@ -157,8 +157,6 @@
 		fsl,pins = <
 			MX51_PAD_UART1_RXD__UART1_RXD		0x1c5
 			MX51_PAD_UART1_TXD__UART1_TXD		0x1c5
-			MX51_PAD_UART1_RTS__UART1_RTS		0x1c5
-			MX51_PAD_UART1_CTS__UART1_CTS		0x1c5
 		>;
 	};
 
@@ -173,8 +171,6 @@
 		fsl,pins = <
 			MX51_PAD_EIM_D25__UART3_RXD		0x1c5
 			MX51_PAD_EIM_D26__UART3_TXD		0x1c5
-			MX51_PAD_EIM_D27__UART3_RTS		0x1c5
-			MX51_PAD_EIM_D24__UART3_CTS		0x1c5
 		>;
 	};
 };
-- 
2.5.0

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#1295968

FromShawn Guo <shawnguo@kernel.org>
Date2015-12-21 14:00 +0100
Message-ID<qI8ed-6Cx-9@gated-at.bofh.it>
In reply to#1294278
On Thu, Dec 17, 2015 at 04:16:52PM -0500, Damien Riegel wrote:
> These pins are actually not routed for UARTs, they should not be
> reserved.
> 
> Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>

Applied both, thanks.
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