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Groups > linux.kernel > #1292218 > unrolled thread

[PATCH] watchdog: dw_wdt: fix signedness bug in dw_wdt_top_in_seconds()

Started byJisheng Zhang <jszhang@marvell.com>
First post2015-12-15 15:30 +0100
Last post2015-12-28 03:50 +0100
Articles 3 — 3 participants

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  [PATCH] watchdog: dw_wdt: fix signedness bug in dw_wdt_top_in_seconds() Jisheng Zhang <jszhang@marvell.com> - 2015-12-15 15:30 +0100
    Re: [PATCH] watchdog: dw_wdt: fix signedness bug in  dw_wdt_top_in_seconds() Guenter Roeck <linux@roeck-us.net> - 2015-12-15 17:20 +0100
    Re: [PATCH] watchdog: dw_wdt: fix signedness bug in dw_wdt_top_in_seconds() Wim Van Sebroeck <wim@iguana.be> - 2015-12-28 03:50 +0100

#1292218 — [PATCH] watchdog: dw_wdt: fix signedness bug in dw_wdt_top_in_seconds()

FromJisheng Zhang <jszhang@marvell.com>
Date2015-12-15 15:30 +0100
Subject[PATCH] watchdog: dw_wdt: fix signedness bug in dw_wdt_top_in_seconds()
Message-ID<qFYM1-5hd-11@gated-at.bofh.it>
On 64bit platforms, "(1 << (16 + top)) / clk_get_rate(dw_wdt.clk)" is
sign-extended to 64bit then converted to unsigned 64bit, finally divide
the clk rate. If the top is the maximum TOP i.e 15, "(1 << (16 +15))"
will be sign-extended to 0xffffffff80000000, then converted to unsigned
0xffffffff80000000, which is a huge number, thus the final result is
wrong.

We fix this issue by giving usigned value(1U in this case) at first.

Let's assume clk rate is 25MHZ,
Before the patch:
dw_wdt_top_in_seconds(15) = -864612050

After the patch:
dw_wdt_top_in_seconds(15) = 85

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
 drivers/watchdog/dw_wdt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
index 6ea0634..8fefa4ad 100644
--- a/drivers/watchdog/dw_wdt.c
+++ b/drivers/watchdog/dw_wdt.c
@@ -81,7 +81,7 @@ static inline int dw_wdt_top_in_seconds(unsigned top)
 	 * There are 16 possible timeout values in 0..15 where the number of
 	 * cycles is 2 ^ (16 + i) and the watchdog counts down.
 	 */
-	return (1 << (16 + top)) / clk_get_rate(dw_wdt.clk);
+	return (1U << (16 + top)) / clk_get_rate(dw_wdt.clk);
 }
 
 static int dw_wdt_get_top(void)
-- 
2.6.4

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#1292324 — Re: [PATCH] watchdog: dw_wdt: fix signedness bug in dw_wdt_top_in_seconds()

FromGuenter Roeck <linux@roeck-us.net>
Date2015-12-15 17:20 +0100
SubjectRe: [PATCH] watchdog: dw_wdt: fix signedness bug in dw_wdt_top_in_seconds()
Message-ID<qG0uu-6y5-23@gated-at.bofh.it>
In reply to#1292218
On 12/15/2015 06:25 AM, Jisheng Zhang wrote:
> On 64bit platforms, "(1 << (16 + top)) / clk_get_rate(dw_wdt.clk)" is
> sign-extended to 64bit then converted to unsigned 64bit, finally divide
> the clk rate. If the top is the maximum TOP i.e 15, "(1 << (16 +15))"
> will be sign-extended to 0xffffffff80000000, then converted to unsigned
> 0xffffffff80000000, which is a huge number, thus the final result is
> wrong.
>
> We fix this issue by giving usigned value(1U in this case) at first.
>
> Let's assume clk rate is 25MHZ,
> Before the patch:
> dw_wdt_top_in_seconds(15) = -864612050
>
> After the patch:
> dw_wdt_top_in_seconds(15) = 85
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>

Nice catch.

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

> ---
>   drivers/watchdog/dw_wdt.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
> index 6ea0634..8fefa4ad 100644
> --- a/drivers/watchdog/dw_wdt.c
> +++ b/drivers/watchdog/dw_wdt.c
> @@ -81,7 +81,7 @@ static inline int dw_wdt_top_in_seconds(unsigned top)
>   	 * There are 16 possible timeout values in 0..15 where the number of
>   	 * cycles is 2 ^ (16 + i) and the watchdog counts down.
>   	 */
> -	return (1 << (16 + top)) / clk_get_rate(dw_wdt.clk);
> +	return (1U << (16 + top)) / clk_get_rate(dw_wdt.clk);
>   }
>
>   static int dw_wdt_get_top(void)
>

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#1298476

FromWim Van Sebroeck <wim@iguana.be>
Date2015-12-28 03:50 +0100
Message-ID<qKw3m-3Io-797@gated-at.bofh.it>
In reply to#1292218
Hi Jisheng,

> On 64bit platforms, "(1 << (16 + top)) / clk_get_rate(dw_wdt.clk)" is
> sign-extended to 64bit then converted to unsigned 64bit, finally divide
> the clk rate. If the top is the maximum TOP i.e 15, "(1 << (16 +15))"
> will be sign-extended to 0xffffffff80000000, then converted to unsigned
> 0xffffffff80000000, which is a huge number, thus the final result is
> wrong.
> 
> We fix this issue by giving usigned value(1U in this case) at first.
> 
> Let's assume clk rate is 25MHZ,
> Before the patch:
> dw_wdt_top_in_seconds(15) = -864612050
> 
> After the patch:
> dw_wdt_top_in_seconds(15) = 85
> 
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> ---
>  drivers/watchdog/dw_wdt.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
> index 6ea0634..8fefa4ad 100644
> --- a/drivers/watchdog/dw_wdt.c
> +++ b/drivers/watchdog/dw_wdt.c
> @@ -81,7 +81,7 @@ static inline int dw_wdt_top_in_seconds(unsigned top)
>  	 * There are 16 possible timeout values in 0..15 where the number of
>  	 * cycles is 2 ^ (16 + i) and the watchdog counts down.
>  	 */
> -	return (1 << (16 + top)) / clk_get_rate(dw_wdt.clk);
> +	return (1U << (16 + top)) / clk_get_rate(dw_wdt.clk);
>  }
>  
>  static int dw_wdt_get_top(void)
> -- 
> 2.6.4
> 

Patch is added to linux-watchdog-next.

Kind regards,
Wim.

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