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[PATCH] perf/x86/amd: Adding support for new IOMMU performance event

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  [PATCH] perf/x86/amd: Adding support for new IOMMU performance event Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> - 2015-12-12 00:10 +0100
    Re: [PATCH] perf/x86/amd: Adding support for new IOMMU performance  event Joerg Roedel <joro@8bytes.org> - 2015-12-14 16:10 +0100

#1289999 — [PATCH] perf/x86/amd: Adding support for new IOMMU performance event

From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>

This patch adds new IOMMU performance event based on
the information in table 74 of the AMD I/O Virtualization Technology
(IOMMU) Specification (Document Id: 4882, Rev 2.62, Feb 2015)

Link: http://support.amd.com/TechDocs/48882_IOMMU.pdf
Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
---
 arch/x86/kernel/cpu/perf_event_amd_iommu.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/x86/kernel/cpu/perf_event_amd_iommu.c b/arch/x86/kernel/cpu/perf_event_amd_iommu.c
index 97242a9..86f8259 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_iommu.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_iommu.c
@@ -118,6 +118,11 @@ static struct amd_iommu_event_desc amd_iommu_v2_event_descs[] = {
 	AMD_IOMMU_EVENT_DESC(cmd_processed,           "csource=0x11"),
 	AMD_IOMMU_EVENT_DESC(cmd_processed_inv,       "csource=0x12"),
 	AMD_IOMMU_EVENT_DESC(tlb_inv,                 "csource=0x13"),
+	AMD_IOMMU_EVENT_DESC(ign_rd_wr_mmio_1ff8h,    "csource=0x14"),
+	AMD_IOMMU_EVENT_DESC(vapic_int_non_guest,     "csource=0x15"),
+	AMD_IOMMU_EVENT_DESC(vapic_int_guest,         "csource=0x16"),
+	AMD_IOMMU_EVENT_DESC(smi_recv,                "csource=0x17"),
+	AMD_IOMMU_EVENT_DESC(smi_blk,                 "csource=0x18"),
 	{ /* end: all zeroes */ },
 };
 
-- 
1.9.1

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#1291250 — Re: [PATCH] perf/x86/amd: Adding support for new IOMMU performance event

On Fri, Dec 11, 2015 at 04:53:17PM -0600, Suravee Suthikulpanit wrote:
> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> 
> This patch adds new IOMMU performance event based on
> the information in table 74 of the AMD I/O Virtualization Technology
> (IOMMU) Specification (Document Id: 4882, Rev 2.62, Feb 2015)
> 
> Link: http://support.amd.com/TechDocs/48882_IOMMU.pdf
> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
> ---
>  arch/x86/kernel/cpu/perf_event_amd_iommu.c | 5 +++++
>  1 file changed, 5 insertions(+)

Reviewed-by: Joerg Roedel <jroedel@suse.de>
Acked-by: Joerg Roedel <jroedel@suse.de>

> 
> diff --git a/arch/x86/kernel/cpu/perf_event_amd_iommu.c b/arch/x86/kernel/cpu/perf_event_amd_iommu.c
> index 97242a9..86f8259 100644
> --- a/arch/x86/kernel/cpu/perf_event_amd_iommu.c
> +++ b/arch/x86/kernel/cpu/perf_event_amd_iommu.c
> @@ -118,6 +118,11 @@ static struct amd_iommu_event_desc amd_iommu_v2_event_descs[] = {
>  	AMD_IOMMU_EVENT_DESC(cmd_processed,           "csource=0x11"),
>  	AMD_IOMMU_EVENT_DESC(cmd_processed_inv,       "csource=0x12"),
>  	AMD_IOMMU_EVENT_DESC(tlb_inv,                 "csource=0x13"),
> +	AMD_IOMMU_EVENT_DESC(ign_rd_wr_mmio_1ff8h,    "csource=0x14"),
> +	AMD_IOMMU_EVENT_DESC(vapic_int_non_guest,     "csource=0x15"),
> +	AMD_IOMMU_EVENT_DESC(vapic_int_guest,         "csource=0x16"),
> +	AMD_IOMMU_EVENT_DESC(smi_recv,                "csource=0x17"),
> +	AMD_IOMMU_EVENT_DESC(smi_blk,                 "csource=0x18"),
>  	{ /* end: all zeroes */ },
>  };
>  
> -- 
> 1.9.1
> 
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