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| Started by | Lee Jones <lee.jones@linaro.org> |
|---|---|
| First post | 2015-12-08 15:40 +0100 |
| Last post | 2015-12-08 16:40 +0100 |
| Articles | 3 — 2 participants |
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[PATCH v5 04/11] ARM: STi: STiH407: Provide generic (safe) DVFS configuration Lee Jones <lee.jones@linaro.org> - 2015-12-08 15:40 +0100
Re: [PATCH v5 04/11] ARM: STi: STiH407: Provide generic (safe) DVFS configuration Viresh Kumar <viresh.kumar@linaro.org> - 2015-12-08 16:10 +0100
Re: [PATCH v5 04/11] ARM: STi: STiH407: Provide generic (safe) DVFS configuration Lee Jones <lee.jones@linaro.org> - 2015-12-08 16:40 +0100
| From | Lee Jones <lee.jones@linaro.org> |
|---|---|
| Date | 2015-12-08 15:40 +0100 |
| Subject | [PATCH v5 04/11] ARM: STi: STiH407: Provide generic (safe) DVFS configuration |
| Message-ID | <qDrAR-3yq-5@gated-at.bofh.it> |
You'll notice that the voltage cell is populated with 0's. Voltage
information is very platform specific, even depends on 'cut' and
'substrate' versions. Thus it is left blank for a generic (safe)
implementation. If other nodes/properties are provided by the
bootloader, the ST CPUFreq driver will over-ride these generic
values.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
arch/arm/boot/dts/stih407-family.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 81f8121..9fa1e58 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -22,15 +22,29 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
+
/* u-boot puts hpen in SBC dmem at 0xa4 offset */
cpu-release-addr = <0x94100A4>;
+
+ /* kHz uV */
+ operating-points = <1500000 0
+ 1200000 0
+ 800000 0
+ 500000 0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
+
/* u-boot puts hpen in SBC dmem at 0xa4 offset */
cpu-release-addr = <0x94100A4>;
+
+ /* kHz uV */
+ operating-points = <1500000 0
+ 1200000 0
+ 800000 0
+ 500000 0>;
};
};
--
1.9.1
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| From | Viresh Kumar <viresh.kumar@linaro.org> |
|---|---|
| Date | 2015-12-08 16:10 +0100 |
| Subject | Re: [PATCH v5 04/11] ARM: STi: STiH407: Provide generic (safe) DVFS configuration |
| Message-ID | <qDs3U-3Yk-9@gated-at.bofh.it> |
| In reply to | #1286528 |
On 08-12-15, 14:31, Lee Jones wrote:
> diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
> index 81f8121..9fa1e58 100644
> --- a/arch/arm/boot/dts/stih407-family.dtsi
> +++ b/arch/arm/boot/dts/stih407-family.dtsi
> @@ -22,15 +22,29 @@
> device_type = "cpu";
> compatible = "arm,cortex-a9";
> reg = <0>;
> +
> /* u-boot puts hpen in SBC dmem at 0xa4 offset */
> cpu-release-addr = <0x94100A4>;
> +
> + /* kHz uV */
> + operating-points = <1500000 0
> + 1200000 0
> + 800000 0
> + 500000 0>;
> };
> cpu@1 {
> device_type = "cpu";
> compatible = "arm,cortex-a9";
> reg = <1>;
> +
> /* u-boot puts hpen in SBC dmem at 0xa4 offset */
> cpu-release-addr = <0x94100A4>;
> +
> + /* kHz uV */
> + operating-points = <1500000 0
> + 1200000 0
> + 800000 0
> + 500000 0>;
Why didn't you move to opp-v2 ?
--
viresh
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| From | Lee Jones <lee.jones@linaro.org> |
|---|---|
| Date | 2015-12-08 16:40 +0100 |
| Subject | Re: [PATCH v5 04/11] ARM: STi: STiH407: Provide generic (safe) DVFS configuration |
| Message-ID | <qDswX-48l-59@gated-at.bofh.it> |
| In reply to | #1286565 |
On Tue, 08 Dec 2015, Viresh Kumar wrote:
> On 08-12-15, 14:31, Lee Jones wrote:
> > diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
> > index 81f8121..9fa1e58 100644
> > --- a/arch/arm/boot/dts/stih407-family.dtsi
> > +++ b/arch/arm/boot/dts/stih407-family.dtsi
> > @@ -22,15 +22,29 @@
> > device_type = "cpu";
> > compatible = "arm,cortex-a9";
> > reg = <0>;
> > +
> > /* u-boot puts hpen in SBC dmem at 0xa4 offset */
> > cpu-release-addr = <0x94100A4>;
> > +
> > + /* kHz uV */
> > + operating-points = <1500000 0
> > + 1200000 0
> > + 800000 0
> > + 500000 0>;
> > };
> > cpu@1 {
> > device_type = "cpu";
> > compatible = "arm,cortex-a9";
> > reg = <1>;
> > +
> > /* u-boot puts hpen in SBC dmem at 0xa4 offset */
> > cpu-release-addr = <0x94100A4>;
> > +
> > + /* kHz uV */
> > + operating-points = <1500000 0
> > + 1200000 0
> > + 800000 0
> > + 500000 0>;
>
> Why didn't you move to opp-v2 ?
Because we can't guarantee that the system was booted with a
bootloader which supports opp-v2. This is the fall-back
configuration. Please continue through the set.
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
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