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[PATCH v4 15/19] irqchip/mips-gic: Clear percpu_masks correctly when mapping

Started byQais Yousef <qais.yousef@imgtec.com>
First post2015-12-08 14:30 +0100
Last post2015-12-08 14:30 +0100
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  [PATCH v4 15/19] irqchip/mips-gic: Clear percpu_masks correctly when mapping Qais Yousef <qais.yousef@imgtec.com> - 2015-12-08 14:30 +0100

#1286474 — [PATCH v4 15/19] irqchip/mips-gic: Clear percpu_masks correctly when mapping

FromQais Yousef <qais.yousef@imgtec.com>
Date2015-12-08 14:30 +0100
Subject[PATCH v4 15/19] irqchip/mips-gic: Clear percpu_masks correctly when mapping
Message-ID<qDqv9-2Ue-47@gated-at.bofh.it>
When setting the mapping for a hwirq, make sure we clear percpu_masks for
all other cpus in case it was set previously.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
 drivers/irqchip/irq-mips-gic.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 331376f39f59..fe6b91679009 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -773,6 +773,7 @@ static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq,
 {
 	int intr = GIC_HWIRQ_TO_SHARED(hw);
 	unsigned long flags;
+	int i;
 
 	irq_set_chip_and_handler(virq, &gic_level_irq_controller,
 				 handle_level_irq);
@@ -780,6 +781,8 @@ static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq,
 	spin_lock_irqsave(&gic_lock, flags);
 	gic_map_to_pin(intr, gic_cpu_pin);
 	gic_map_to_vpe(intr, vpe);
+	for (i = 0; i < gic_vpes; i++)
+		clear_bit(intr, pcpu_masks[i].pcpu_mask);
 	set_bit(intr, pcpu_masks[vpe].pcpu_mask);
 	spin_unlock_irqrestore(&gic_lock, flags);
 
-- 
2.1.0

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