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| Started by | Kapil Hali <kapilh@broadcom.com> |
|---|---|
| First post | 2015-12-01 17:30 +0100 |
| Last post | 2015-12-06 19:30 +0100 |
| Articles | 8 — 3 participants |
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[PATCH v4 0/5] SMP support for Broadcom NSP Kapil Hali <kapilh@broadcom.com> - 2015-12-01 17:30 +0100
[PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP Kapil Hali <kapilh@broadcom.com> - 2015-12-01 17:30 +0100
Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP Florian Fainelli <f.fainelli@gmail.com> - 2015-12-02 00:10 +0100
Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP Rob Herring <robh@kernel.org> - 2015-12-02 16:30 +0100
Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP Kapil Hali <kapilh@broadcom.com> - 2015-12-02 17:10 +0100
Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP Florian Fainelli <f.fainelli@gmail.com> - 2015-12-03 22:30 +0100
Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP Rob Herring <robh@kernel.org> - 2015-12-06 02:00 +0100
Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP Kapil Hali <kapilh@broadcom.com> - 2015-12-06 19:30 +0100
| From | Kapil Hali <kapilh@broadcom.com> |
|---|---|
| Date | 2015-12-01 17:30 +0100 |
| Subject | [PATCH v4 0/5] SMP support for Broadcom NSP |
| Message-ID | <qAVYu-3yp-11@gated-at.bofh.it> |
Change in v4:
* Cleaned up kona_smp.c and associated DT file.
* Corrected documentation for DT bindings.
* Corrected secondary-boot-reg entry for bcm4708 DT file.
Change in v3:
* Fixed patch subject from RESEND PATCH to PATCH
* Deleted arch/arm/mach-bcm/bcm_nsp.h file
* Removed inclusion of header file bcm_nsp.h in platsmp.c
* Removed unused variable 'timeout' in nsp_boot_secondary()
Changes in v2:
Removed the pen_holding method of SMP bringup for NSP SoC and
replaced it with simple wakeup of secondary core using ARM IPI.
This series adds SMP support for Broadcom's Northstar Plus SoC.
There are similar SMP enablement methods for many ARMv7 bsed SoCs.
BCM NSP SoC, has a typical such mechanism - after power-on, the
secondary core is held in a standby state, primary core provides a
startup address for the secondary core and wakes it up. Booting of
the secondary core is serialized using pen_release global variable.
The startup address is programmed at a special register location
which is defined in the device tree using a "secondary-boot-reg"
property in a node whose "enable-method" property matches.
The first patch adds cpu-enable-method in the device tree bindings
documentation. It also updates ARM CPU device tree documentation
with Broadcom Northstar Plus CPU details.
The second patch adds SMP support to the BCM NSP device tree file.
The third patch, enables SMP on BCM NSP. It also consolidates
common SMP handling between BCM NSP and BCM Kona.
The final patch, enables SMP on BCM 4708 and this patch is pulled
in from Jon Mason's patch from the mailing list.
This patch series is constructed based on Linux v4.4-rc1.
The source code is available at GITHUB:
https://github.com/Broadcom/cygnus-linux/tree/nsp-smp-v2
Jon Mason (1):
ARM: BCM: Add SMP support for Broadcom 4708
Kapil Hali (4):
dt-bindings: add SMP enable-method for Broadcom NSP
ARM: BCM: Clean up SMP support for Broadcom Kona
ARM: dts: Add SMP support for Broadcom NSP
ARM: BCM: Add SMP support for Broadcom NSP
.../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ++++++
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
arch/arm/boot/dts/bcm-nsp.dtsi | 33 +++--
arch/arm/boot/dts/bcm11351.dtsi | 2 +-
arch/arm/boot/dts/bcm21664.dtsi | 2 +-
arch/arm/boot/dts/bcm4708.dtsi | 2 +
arch/arm/mach-bcm/Kconfig | 3 +
arch/arm/mach-bcm/Makefile | 11 +-
arch/arm/mach-bcm/{kona_smp.c => platsmp.c} | 144 +++++++++++++++++----
9 files changed, 193 insertions(+), 44 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
rename arch/arm/mach-bcm/{kona_smp.c => platsmp.c} (63%)
--
2.1.0
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| From | Kapil Hali <kapilh@broadcom.com> |
|---|---|
| Date | 2015-12-01 17:30 +0100 |
| Subject | [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP |
| Message-ID | <qAVYv-3yp-39@gated-at.bofh.it> |
| In reply to | #1281019 |
Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's
Northstar Plus CPU to the 32-bit ARM CPU device tree binding
documentation file and create a new binding documentation for
Northstar Plus CPU.
Signed-off-by: Kapil Hali <kapilh@broadcom.com>
---
.../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ++++++++++++++++++++++
Documentation/devicetree/bindings/arm/cpus.txt | 1 +
2 files changed, 40 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
new file mode 100644
index 0000000..bf08872
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
@@ -0,0 +1,39 @@
+Broadcom Northstar Plus SoC CPU Enable Method
+---------------------------------------------
+This binding defines the enable method used for starting secondary
+CPUs in the following Broadcom SoCs:
+ BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312
+
+The enable method is specified by defining the following required
+properties in the "cpus" device tree node:
+ - enable-method = "brcm,bcm-nsp-smp";
+ - secondary-boot-reg = <...>;
+
+The secondary-boot-reg property is a u32 value that specifies the
+physical address of the register which should hold the common
+entry point for a secondary CPU. This entry is cpu node specific
+and should be added per cpu. E.g., in case of NSP (BCM58625) which
+is a dual core CPU SoC, this entry should be added to cpu1 node.
+
+
+Example:
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-method = "brcm,bcm-nsp-smp";
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ next-level-cache = <&L2>;
+ reg = <0>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ next-level-cache = <&L2>;
+ reg = <1>;
+ secondary-boot-reg = <0xffff042c>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 3a07a87..d191554 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -190,6 +190,7 @@ nodes to be present and contain the properties described below.
"allwinner,sun6i-a31"
"allwinner,sun8i-a23"
"arm,psci"
+ "brcm,bcm-nsp-smp"
"brcm,brahma-b15"
"marvell,armada-375-smp"
"marvell,armada-380-smp"
--
2.1.0
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| From | Florian Fainelli <f.fainelli@gmail.com> |
|---|---|
| Date | 2015-12-02 00:10 +0100 |
| Subject | Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP |
| Message-ID | <qB2dA-7BZ-27@gated-at.bofh.it> |
| In reply to | #1281023 |
On 01/12/15 08:24, Kapil Hali wrote: > Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's > Northstar Plus CPU to the 32-bit ARM CPU device tree binding > documentation file and create a new binding documentation for > Northstar Plus CPU. > > Signed-off-by: Kapil Hali <kapilh@broadcom.com> Applied to devicetree/next, thanks! -- Florian -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2015-12-02 16:30 +0100 |
| Subject | Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP |
| Message-ID | <qBhvY-xy-21@gated-at.bofh.it> |
| In reply to | #1281023 |
On Tue, Dec 01, 2015 at 11:24:05AM -0500, Kapil Hali wrote:
> Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's
> Northstar Plus CPU to the 32-bit ARM CPU device tree binding
> documentation file and create a new binding documentation for
> Northstar Plus CPU.
>
> Signed-off-by: Kapil Hali <kapilh@broadcom.com>
> ---
> .../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ++++++++++++++++++++++
> Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> 2 files changed, 40 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
>
> diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
> new file mode 100644
> index 0000000..bf08872
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
> @@ -0,0 +1,39 @@
> +Broadcom Northstar Plus SoC CPU Enable Method
> +---------------------------------------------
> +This binding defines the enable method used for starting secondary
> +CPUs in the following Broadcom SoCs:
> + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312
> +
> +The enable method is specified by defining the following required
> +properties in the "cpus" device tree node:
> + - enable-method = "brcm,bcm-nsp-smp";
> + - secondary-boot-reg = <...>;
Both of these are supposed to be per cpu core.
Rob
> +
> +The secondary-boot-reg property is a u32 value that specifies the
> +physical address of the register which should hold the common
> +entry point for a secondary CPU. This entry is cpu node specific
> +and should be added per cpu. E.g., in case of NSP (BCM58625) which
> +is a dual core CPU SoC, this entry should be added to cpu1 node.
> +
> +
> +Example:
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + enable-method = "brcm,bcm-nsp-smp";
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a9";
> + next-level-cache = <&L2>;
> + reg = <0>;
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a9";
> + next-level-cache = <&L2>;
> + reg = <1>;
> + secondary-boot-reg = <0xffff042c>;
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
> index 3a07a87..d191554 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.txt
> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
> @@ -190,6 +190,7 @@ nodes to be present and contain the properties described below.
> "allwinner,sun6i-a31"
> "allwinner,sun8i-a23"
> "arm,psci"
> + "brcm,bcm-nsp-smp"
> "brcm,brahma-b15"
> "marvell,armada-375-smp"
> "marvell,armada-380-smp"
> --
> 2.1.0
>
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| From | Kapil Hali <kapilh@broadcom.com> |
|---|---|
| Date | 2015-12-02 17:10 +0100 |
| Subject | Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP |
| Message-ID | <qBi8G-12u-9@gated-at.bofh.it> |
| In reply to | #1281903 |
Hi Rob,
On 12/2/2015 8:56 PM, Rob Herring wrote:
> On Tue, Dec 01, 2015 at 11:24:05AM -0500, Kapil Hali wrote:
>> Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's
>> Northstar Plus CPU to the 32-bit ARM CPU device tree binding
>> documentation file and create a new binding documentation for
>> Northstar Plus CPU.
>>
>> Signed-off-by: Kapil Hali <kapilh@broadcom.com>
>> ---
>> .../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ++++++++++++++++++++++
>> Documentation/devicetree/bindings/arm/cpus.txt | 1 +
>> 2 files changed, 40 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
>>
>> diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
>> new file mode 100644
>> index 0000000..bf08872
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt
>> @@ -0,0 +1,39 @@
>> +Broadcom Northstar Plus SoC CPU Enable Method
>> +---------------------------------------------
>> +This binding defines the enable method used for starting secondary
>> +CPUs in the following Broadcom SoCs:
>> + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312
>> +
>> +The enable method is specified by defining the following required
>> +properties in the "cpus" device tree node:
>> + - enable-method = "brcm,bcm-nsp-smp";
>> + - secondary-boot-reg = <...>;
>
> Both of these are supposed to be per cpu core.
'enable-method' if not found in 'cpu' node is looked at in the 'cpus'
node. Except for two-three SoC families, 'enable-method' is within
'cpus' node. Is my interpretation incorrect? Did I miss anything here?
>
> Rob
>
>> +
>> +The secondary-boot-reg property is a u32 value that specifies the
>> +physical address of the register which should hold the common
>> +entry point for a secondary CPU. This entry is cpu node specific
>> +and should be added per cpu. E.g., in case of NSP (BCM58625) which
>> +is a dual core CPU SoC, this entry should be added to cpu1 node.
>> +
>> +
>> +Example:
>> + cpus {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + enable-method = "brcm,bcm-nsp-smp";
>> +
>> + cpu0: cpu@0 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a9";
>> + next-level-cache = <&L2>;
>> + reg = <0>;
>> + };
>> +
>> + cpu1: cpu@1 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a9";
>> + next-level-cache = <&L2>;
>> + reg = <1>;
>> + secondary-boot-reg = <0xffff042c>;
>> + };
>> + };
>> diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
>> index 3a07a87..d191554 100644
>> --- a/Documentation/devicetree/bindings/arm/cpus.txt
>> +++ b/Documentation/devicetree/bindings/arm/cpus.txt
>> @@ -190,6 +190,7 @@ nodes to be present and contain the properties described below.
>> "allwinner,sun6i-a31"
>> "allwinner,sun8i-a23"
>> "arm,psci"
>> + "brcm,bcm-nsp-smp"
>> "brcm,brahma-b15"
>> "marvell,armada-375-smp"
>> "marvell,armada-380-smp"
>> --
>> 2.1.0
>>
>
Thanks,
Kapil
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| From | Florian Fainelli <f.fainelli@gmail.com> |
|---|---|
| Date | 2015-12-03 22:30 +0100 |
| Subject | Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP |
| Message-ID | <qBJBU-22d-19@gated-at.bofh.it> |
| In reply to | #1281954 |
On 02/12/15 08:06, Kapil Hali wrote: >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt >>> @@ -0,0 +1,39 @@ >>> +Broadcom Northstar Plus SoC CPU Enable Method >>> +--------------------------------------------- >>> +This binding defines the enable method used for starting secondary >>> +CPUs in the following Broadcom SoCs: >>> + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 >>> + >>> +The enable method is specified by defining the following required >>> +properties in the "cpus" device tree node: >>> + - enable-method = "brcm,bcm-nsp-smp"; >>> + - secondary-boot-reg = <...>; >> >> Both of these are supposed to be per cpu core. > > 'enable-method' if not found in 'cpu' node is looked at in the 'cpus' > node. Except for two-three SoC families, 'enable-method' is within > 'cpus' node. Is my interpretation incorrect? Did I miss anything here? So, what do we do from here? I would appreciate a timely answer from the DT maintainers here so we can decide on the fate of this patch series for 4.5. Thank you -- Florian -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2015-12-06 02:00 +0100 |
| Subject | Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP |
| Message-ID | <qCvQe-8ev-7@gated-at.bofh.it> |
| In reply to | #1281954 |
On Wed, Dec 2, 2015 at 10:06 AM, Kapil Hali <kapilh@broadcom.com> wrote: > Hi Rob, > > On 12/2/2015 8:56 PM, Rob Herring wrote: >> On Tue, Dec 01, 2015 at 11:24:05AM -0500, Kapil Hali wrote: >>> Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's >>> Northstar Plus CPU to the 32-bit ARM CPU device tree binding >>> documentation file and create a new binding documentation for >>> Northstar Plus CPU. >>> >>> Signed-off-by: Kapil Hali <kapilh@broadcom.com> >>> --- >>> .../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ++++++++++++++++++++++ >>> Documentation/devicetree/bindings/arm/cpus.txt | 1 + >>> 2 files changed, 40 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt >>> >>> diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt >>> new file mode 100644 >>> index 0000000..bf08872 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt >>> @@ -0,0 +1,39 @@ >>> +Broadcom Northstar Plus SoC CPU Enable Method >>> +--------------------------------------------- >>> +This binding defines the enable method used for starting secondary >>> +CPUs in the following Broadcom SoCs: >>> + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 >>> + >>> +The enable method is specified by defining the following required >>> +properties in the "cpus" device tree node: >>> + - enable-method = "brcm,bcm-nsp-smp"; >>> + - secondary-boot-reg = <...>; >> >> Both of these are supposed to be per cpu core. > > 'enable-method' if not found in 'cpu' node is looked at in the 'cpus' > node. Except for two-three SoC families, 'enable-method' is within > 'cpus' node. Is my interpretation incorrect? Did I miss anything here? I'm not sure how you counted, but it is much more than 2-3 that are correct (including all of PPC). It is quite mixed in dts files, but it is documented to be per cpu node, so lets follow the documentation please. Rob -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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| From | Kapil Hali <kapilh@broadcom.com> |
|---|---|
| Date | 2015-12-06 19:30 +0100 |
| Subject | Re: [PATCH v4 1/5] dt-bindings: add SMP enable-method for Broadcom NSP |
| Message-ID | <qCMem-23y-27@gated-at.bofh.it> |
| In reply to | #1284678 |
Hi Rob, On 12/6/2015 6:22 AM, Rob Herring wrote: > On Wed, Dec 2, 2015 at 10:06 AM, Kapil Hali <kapilh@broadcom.com> wrote: >> Hi Rob, >> >> On 12/2/2015 8:56 PM, Rob Herring wrote: >>> On Tue, Dec 01, 2015 at 11:24:05AM -0500, Kapil Hali wrote: >>>> Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's >>>> Northstar Plus CPU to the 32-bit ARM CPU device tree binding >>>> documentation file and create a new binding documentation for >>>> Northstar Plus CPU. >>>> >>>> Signed-off-by: Kapil Hali <kapilh@broadcom.com> >>>> --- >>>> .../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ++++++++++++++++++++++ >>>> Documentation/devicetree/bindings/arm/cpus.txt | 1 + >>>> 2 files changed, 40 insertions(+) >>>> create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt >>>> >>>> diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt >>>> new file mode 100644 >>>> index 0000000..bf08872 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt >>>> @@ -0,0 +1,39 @@ >>>> +Broadcom Northstar Plus SoC CPU Enable Method >>>> +--------------------------------------------- >>>> +This binding defines the enable method used for starting secondary >>>> +CPUs in the following Broadcom SoCs: >>>> + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 >>>> + >>>> +The enable method is specified by defining the following required >>>> +properties in the "cpus" device tree node: >>>> + - enable-method = "brcm,bcm-nsp-smp"; >>>> + - secondary-boot-reg = <...>; >>> >>> Both of these are supposed to be per cpu core. >> >> 'enable-method' if not found in 'cpu' node is looked at in the 'cpus' >> node. Except for two-three SoC families, 'enable-method' is within >> 'cpus' node. Is my interpretation incorrect? Did I miss anything here? > > I'm not sure how you counted, but it is much more than 2-3 that are > correct (including all of PPC). It is quite mixed in dts files, but it > is documented to be per cpu node, so lets follow the documentation > please. > > Rob > I looked at arch/arm/* and not other arch types. But, as you said, let us keep it how it is in documentation and I have already updated latest patch set reflecting this change. Thanks, Kapil -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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