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[PATCH RESEND net-next 0/3] dts: hisi: fixes can't find eth for hip05-D02

Started byyankejian <yankejian@huawei.com>
First post2015-12-05 08:50 +0100
Last post2015-12-07 02:40 +0100
Articles 7 — 3 participants

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  [PATCH RESEND net-next 0/3] dts: hisi: fixes can't find eth for hip05-D02 yankejian <yankejian@huawei.com> - 2015-12-05 08:50 +0100
    [PATCH RESEND net-next 2/3] dts: hisi: fixes no syscon error when init mdio yankejian <yankejian@huawei.com> - 2015-12-05 08:50 +0100
      Re: [PATCH RESEND net-next 2/3] dts: hisi: fixes no syscon error when init mdio Arnd Bergmann <arnd@arndb.de> - 2015-12-05 23:20 +0100
        Re: [PATCH RESEND net-next 2/3] dts: hisi: fixes no syscon error when  init mdio "Yankejian (Hackim Yim)" <yankejian@huawei.com> - 2015-12-07 02:40 +0100
    [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board yankejian <yankejian@huawei.com> - 2015-12-05 09:00 +0100
      Re: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board Arnd Bergmann <arnd@arndb.de> - 2015-12-05 23:20 +0100
        Re: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree  bindings for Hisilicon D02 Board "Yankejian (Hackim Yim)" <yankejian@huawei.com> - 2015-12-07 02:40 +0100

#1284481 — [PATCH RESEND net-next 0/3] dts: hisi: fixes can't find eth for hip05-D02

Fromyankejian <yankejian@huawei.com>
Date2015-12-05 08:50 +0100
Subject[PATCH RESEND net-next 0/3] dts: hisi: fixes can't find eth for hip05-D02
Message-ID<qCfLr-66U-7@gated-at.bofh.it>
this patchset fixes the bug that eth can't initial successful on hip05-D02
because the dts files doesn't match the source code.

yankejian (3):
  dts: hisi: enables the ethX for D02 board
  dts: hisi: fixes no syscon error when init mdio
  arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board

 .../devicetree/bindings/arm/hisilicon/hisilicon.txt      | 16 ++++++++++++++++
 arch/arm64/boot/dts/hisilicon/hip05-d02.dts              | 16 ++++++++++++++++
 arch/arm64/boot/dts/hisilicon/hip05.dtsi                 |  4 ++++
 arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi             |  4 ++--
 4 files changed, 38 insertions(+), 2 deletions(-)

-- 
1.9.1

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#1284482 — [PATCH RESEND net-next 2/3] dts: hisi: fixes no syscon error when init mdio

Fromyankejian <yankejian@huawei.com>
Date2015-12-05 08:50 +0100
Subject[PATCH RESEND net-next 2/3] dts: hisi: fixes no syscon error when init mdio
Message-ID<qCfLs-66U-11@gated-at.bofh.it>
In reply to#1284481
when linux start up, we get the log below:
"Hi-HNS_MDIO 803c0000.mdio: no syscon hisilicon,peri-c-subctrl
 mdio_bus mdio@803c0000: mdio sys ctl reg has not maped       "

the source code about the subctrl is dealled with syscon, but dts doesn't.
it cause such fault. so this patch adds the syscon info on dts files to
fixes it.

Signed-off-by: yankejian <yankejian@huawei.com>
---
 arch/arm64/boot/dts/hisilicon/hip05.dtsi     | 4 ++++
 arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi | 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index 4ff16d0..daaca63 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -246,6 +246,10 @@
 			clock-frequency = <200000000>;
 		};
 
+		peri_c_subctrl: sub_ctrl_c@80000000 {
+			compatible = "hisilicon,peri-c-subctrl", "syscon";
+			reg = < 0x0 0x80000000 0x0 0x10000>;
+		};
 		uart0: uart@80300000 {
 			compatible = "snps,dw-apb-uart";
 			reg = <0x0 0x80300000 0x0 0x10000>;
diff --git a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
index 606dd5a..4d4815e 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05_hns.dtsi
@@ -10,8 +10,8 @@ soc0: soc@000000000 {
 		#address-cells = <1>;
 		#size-cells = <0>;
 		compatible = "hisilicon,hns-mdio";
-		reg = <0x0 0x803c0000 0x0 0x10000
-		       0x0 0x80000000 0x0 0x10000>;
+		reg = <0x0 0x803c0000 0x0 0x10000>;
+		subctrl_vbase = <&peri_c_subctrl>;
 
 		soc0_phy0: ethernet-phy@0 {
 			reg = <0x0>;
-- 
1.9.1

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#1284655 — Re: [PATCH RESEND net-next 2/3] dts: hisi: fixes no syscon error when init mdio

FromArnd Bergmann <arnd@arndb.de>
Date2015-12-05 23:20 +0100
SubjectRe: [PATCH RESEND net-next 2/3] dts: hisi: fixes no syscon error when init mdio
Message-ID<qCtlo-6PY-11@gated-at.bofh.it>
In reply to#1284482
On Saturday 05 December 2015 15:56:57 yankejian wrote:
>                 #size-cells = <0>;
>                 compatible = "hisilicon,hns-mdio";
> -               reg = <0x0 0x803c0000 0x0 0x10000
> -                      0x0 0x80000000 0x0 0x10000>;
> +               reg = <0x0 0x803c0000 0x0 0x10000>;
> +               subctrl_vbase = <&peri_c_subctrl>;
>  
>                 soc0_phy0: ethernet-phy@0 {
>                         reg = <0x0>;

I don't see the subctrl_vbase property documented in the binding. Please
modify the binding as well.

Also, please use the normal naming conventions using '-' instead of '_'
inside of property names.

	Arnd
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#1284957 — Re: [PATCH RESEND net-next 2/3] dts: hisi: fixes no syscon error when init mdio

From"Yankejian (Hackim Yim)" <yankejian@huawei.com>
Date2015-12-07 02:40 +0100
SubjectRe: [PATCH RESEND net-next 2/3] dts: hisi: fixes no syscon error when init mdio
Message-ID<qCSWu-6fY-7@gated-at.bofh.it>
In reply to#1284655

On 2015/12/6 6:15, Arnd Bergmann wrote:
> On Saturday 05 December 2015 15:56:57 yankejian wrote:
>>                 #size-cells = <0>;
>>                 compatible = "hisilicon,hns-mdio";
>> -               reg = <0x0 0x803c0000 0x0 0x10000
>> -                      0x0 0x80000000 0x0 0x10000>;
>> +               reg = <0x0 0x803c0000 0x0 0x10000>;
>> +               subctrl_vbase = <&peri_c_subctrl>;
>>  
>>                 soc0_phy0: ethernet-phy@0 {
>>                         reg = <0x0>;
> I don't see the subctrl_vbase property documented in the binding. Please
> modify the binding as well.
>
> Also, please use the normal naming conventions using '-' instead of '_'
> inside of property names.
>
> 	Arnd
>
> .

Hi, Arnd
Thanks for your suggestions. i will fixes it later.


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#1284483 — [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board

Fromyankejian <yankejian@huawei.com>
Date2015-12-05 09:00 +0100
Subject[PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board
Message-ID<qCfV8-6f3-1@gated-at.bofh.it>
In reply to#1284481
This patch adds documentation for the devicetree bindings used by the
DT files of Hisilicon Hip05-D02 development board.

Signed-off-by: yankejian <yankejian@huawei.com>
---
 .../devicetree/bindings/arm/hisilicon/hisilicon.txt      | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index 6ac7c00..5318d78 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -187,6 +187,22 @@ Example:
 		reg = <0xb0000000 0x10000>;
 	};
 
+Hisilicon HiP05 PERISUB system controller
+
+Required properties:
+- compatible : "hisilicon,peri-c-subctrl", "syscon";
+- reg : Register address and size
+
+The HiP05 PERISUB system controller is shared by peripheral controllers in
+HiP05 Soc to implement some basic configurations. the peripheral
+ controllers include mdio, ddr, iic, uart, timer and so on.
+
+Example:
+	/* for HiP05 PCIe-SAS system */
+	pcie_sas: system_controller@0xb0000000 {
+		compatible = "hisilicon,pcie-sas-subctrl", "syscon";
+		reg = <0xb0000000 0x10000>;
+	};
 -----------------------------------------------------------------------
 Hisilicon CPU controller
 
-- 
1.9.1

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#1284654 — Re: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board

FromArnd Bergmann <arnd@arndb.de>
Date2015-12-05 23:20 +0100
SubjectRe: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board
Message-ID<qCtlo-6PY-7@gated-at.bofh.it>
In reply to#1284483
On Saturday 05 December 2015 15:56:58 yankejian wrote:
> +Required properties:
> +- compatible : "hisilicon,peri-c-subctrl", "syscon";
> +- reg : Register address and size
> +
> +The HiP05 PERISUB system controller is shared by peripheral controllers in
> +HiP05 Soc to implement some basic configurations. the peripheral
> + controllers include mdio, ddr, iic, uart, timer and so on.
> +
> +Example:
> +       /* for HiP05 PCIe-SAS system */
> +       pcie_sas: system_controller@0xb0000000 {
> +               compatible = "hisilicon,pcie-sas-subctrl", "syscon";
> +               reg = <0xb0000000 0x10000>;
> +       };
> 

The compatible string in the example does not match the required properties.

	Arnd
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#1284958 — Re: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board

From"Yankejian (Hackim Yim)" <yankejian@huawei.com>
Date2015-12-07 02:40 +0100
SubjectRe: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board
Message-ID<qCSWu-6fY-9@gated-at.bofh.it>
In reply to#1284654

On 2015/12/6 6:13, Arnd Bergmann wrote:
> On Saturday 05 December 2015 15:56:58 yankejian wrote:
>> +Required properties:
>> +- compatible : "hisilicon,peri-c-subctrl", "syscon";
>> +- reg : Register address and size
>> +
>> +The HiP05 PERISUB system controller is shared by peripheral controllers in
>> +HiP05 Soc to implement some basic configurations. the peripheral
>> + controllers include mdio, ddr, iic, uart, timer and so on.
>> +
>> +Example:
>> +       /* for HiP05 PCIe-SAS system */
>> +       pcie_sas: system_controller@0xb0000000 {
>> +               compatible = "hisilicon,pcie-sas-subctrl", "syscon";
>> +               reg = <0xb0000000 0x10000>;
>> +       };
>>
> The compatible string in the example does not match the required properties.
>
> 	Arnd
>
> .
Hi, Arnd
Thanks for your suggestions. i will fixes it later.



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