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[PATCH 0/4] ARM: sun9i: Support Allwinner A80 NMI controller

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  [PATCH 0/4] ARM: sun9i: Support Allwinner A80 NMI controller Chen-Yu Tsai <wens@csie.org> - 2015-12-03 09:30 +0100
    [PATCH 3/4] irqchip/sunxi-nmi: Support sun9i A80 NMI controller Chen-Yu Tsai <wens@csie.org> - 2015-12-03 09:30 +0100
      Re: [PATCH 3/4] irqchip/sunxi-nmi: Support sun9i A80 NMI controller Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-12-03 10:50 +0100
    Re: [linux-sunxi] [PATCH 0/4] ARM: sun9i: Support Allwinner A80 NMI  controller Hans de Goede <hdegoede@redhat.com> - 2015-12-03 09:50 +0100
    Re: [PATCH 0/4] ARM: sun9i: Support Allwinner A80 NMI controller Jason Cooper <jason@lakedaemon.net> - 2015-12-03 13:10 +0100
    Re: [PATCH 0/4] ARM: sun9i: Support Allwinner A80 NMI controller Jason Cooper <jason@lakedaemon.net> - 2015-12-03 14:20 +0100

#1282783 — [PATCH 0/4] ARM: sun9i: Support Allwinner A80 NMI controller

Hi everyone,

This series extends irqchip-sunxi-nmi to add support for the NMI
controller found in Allwinner's A80 SoC.

All Allwinner SoCs have an external NMI pin which the PMIC uses to
signal interrupts to the processor. On multi-core chips, there's an
NMI controller handling this pin and chaining interrupts to the GIC.
We already have support for this on previous sun[678]i family chips.

This series extends support to the A80 SoC. This is needed to add
support for the PMICs. A complete series, including PMIC support,
can be found here:

    https://github.com/wens/linux/tree/axp809

Patch 1 renames the binding doc, to remove the SoC specific bits from
the filename.

Patch 2 adds a new compatible string for the A80 variant.

Patch 3 adds driver support for the A80 variant.

Patch 4 adds the NMI controller device node to the A80 dtsi file.

Chen-Yu Tsai (4):
  irqchip/sunxi-nmi: Rename binding doc filename to
    allwinner,sunxi-nmi.txt
  irqchip/sunxi-nmi: Add sun9i-a80 variant to binding doc
  irqchip/sunxi-nmi: Support sun9i A80 NMI controller
  ARM: dts: sun9i: Add NMI controller device node

 ...{allwinner,sun67i-sc-nmi.txt => allwinner,sunxi-nmi.txt} |  2 +-
 arch/arm/boot/dts/sun9i-a80.dtsi                            |  8 ++++++++
 drivers/irqchip/irq-sunxi-nmi.c                             | 13 +++++++++++++
 3 files changed, 22 insertions(+), 1 deletion(-)
 rename Documentation/devicetree/bindings/interrupt-controller/{allwinner,sun67i-sc-nmi.txt => allwinner,sunxi-nmi.txt} (94%)

-- 
2.6.2

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#1282784 — [PATCH 3/4] irqchip/sunxi-nmi: Support sun9i A80 NMI controller

The A80 moves the NMI controller into the PRCM address space, and also
rearranges the registers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/irqchip/irq-sunxi-nmi.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/irqchip/irq-sunxi-nmi.c b/drivers/irqchip/irq-sunxi-nmi.c
index 4ef178078e5b..0820f67cc9a7 100644
--- a/drivers/irqchip/irq-sunxi-nmi.c
+++ b/drivers/irqchip/irq-sunxi-nmi.c
@@ -50,6 +50,12 @@ static struct sunxi_sc_nmi_reg_offs sun6i_reg_offs = {
 	.enable	= 0x34,
 };
 
+static struct sunxi_sc_nmi_reg_offs sun9i_reg_offs = {
+	.ctrl	= 0x00,
+	.pend	= 0x08,
+	.enable	= 0x04,
+};
+
 static inline void sunxi_sc_nmi_write(struct irq_chip_generic *gc, u32 off,
 				      u32 val)
 {
@@ -207,3 +213,10 @@ static int __init sun7i_sc_nmi_irq_init(struct device_node *node,
 	return sunxi_sc_nmi_irq_init(node, &sun7i_reg_offs);
 }
 IRQCHIP_DECLARE(sun7i_sc_nmi, "allwinner,sun7i-a20-sc-nmi", sun7i_sc_nmi_irq_init);
+
+static int __init sun9i_nmi_irq_init(struct device_node *node,
+				     struct device_node *parent)
+{
+	return sunxi_sc_nmi_irq_init(node, &sun9i_reg_offs);
+}
+IRQCHIP_DECLARE(sun9i_nmi, "allwinner,sun9i-a80-nmi", sun9i_nmi_irq_init);
-- 
2.6.2

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#1282856 — Re: [PATCH 3/4] irqchip/sunxi-nmi: Support sun9i A80 NMI controller

[Multipart message — attachments visible in raw view] — view raw

On Thu, Dec 03, 2015 at 04:20:12PM +0800, Chen-Yu Tsai wrote:
> The A80 moves the NMI controller into the PRCM address space, and also
> rearranges the registers.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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#1282804 — Re: [linux-sunxi] [PATCH 0/4] ARM: sun9i: Support Allwinner A80 NMI controller

Hi,

On 03-12-15 09:20, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This series extends irqchip-sunxi-nmi to add support for the NMI
> controller found in Allwinner's A80 SoC.
>
> All Allwinner SoCs have an external NMI pin which the PMIC uses to
> signal interrupts to the processor. On multi-core chips, there's an
> NMI controller handling this pin and chaining interrupts to the GIC.
> We already have support for this on previous sun[678]i family chips.
>
> This series extends support to the A80 SoC. This is needed to add
> support for the PMICs. A complete series, including PMIC support,
> can be found here:
>
>      https://github.com/wens/linux/tree/axp809
>
> Patch 1 renames the binding doc, to remove the SoC specific bits from
> the filename.
>
> Patch 2 adds a new compatible string for the A80 variant.
>
> Patch 3 adds driver support for the A80 variant.
>
> Patch 4 adds the NMI controller device node to the A80 dtsi file.
>
> Chen-Yu Tsai (4):
>    irqchip/sunxi-nmi: Rename binding doc filename to
>      allwinner,sunxi-nmi.txt
>    irqchip/sunxi-nmi: Add sun9i-a80 variant to binding doc
>    irqchip/sunxi-nmi: Support sun9i A80 NMI controller
>    ARM: dts: sun9i: Add NMI controller device node

Series looks good to me and is:

Reviewed-by: Hans de Goede <hdegoede@redhat.com>

Regards,

Hans
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#1282981

Chen-Yu,

On Thu, Dec 03, 2015 at 04:20:09PM +0800, Chen-Yu Tsai wrote:
> This series extends support to the A80 SoC. This is needed to add
> support for the PMICs. A complete series, including PMIC support,
> can be found here:
> 
>     https://github.com/wens/linux/tree/axp809

I'll pull all but the last patch in this series into a separate, stable
branch you can base off of at some point today.

thx,

Jason.
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#1283039

On Thu, Dec 03, 2015 at 04:20:09PM +0800, Chen-Yu Tsai wrote:
> Patch 1 renames the binding doc, to remove the SoC specific bits from
> the filename.
> 
> Patch 2 adds a new compatible string for the A80 variant.
> 
> Patch 3 adds driver support for the A80 variant.

Applied to irqchip/sunxi.  Once this has had a day or two in -next, you
can consider it stable.  I'll also merge it into irqchip/core around
that time.  Added Maxime and Hans' tags.

thx,

Jason.
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