Groups > linux.kernel > #1277285 > unrolled thread

[PATCH v2 00/19] Implement generic IPI support mechanism

Started by	Qais Yousef <qais.yousef@imgtec.com>
First post	2015-11-25 13:10 +0100
Last post	2015-11-25 13:20 +0100
Articles	20 on this page of 30 — 3 participants

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  [PATCH v2 00/19] Implement generic IPI support mechanism Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:10 +0100
    [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:10 +0100
      Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper  functions Thomas Gleixner <tglx@linutronix.de> - 2015-11-30 12:30 +0100
        Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper  functions Qais Yousef <qais.yousef@imgtec.com> - 2015-11-30 12:50 +0100
          Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper  functions Thomas Gleixner <tglx@linutronix.de> - 2015-11-30 14:20 +0100
            Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper  functions Qais Yousef <qais.yousef@imgtec.com> - 2015-11-30 15:00 +0100
    [PATCH v2 16/19] MIPS: Add generic SMP IPI support Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:10 +0100
    [PATCH v2 01/19] genirq: Add new IRQ_DOMAIN_FLAGS_IPI Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:10 +0100
    [PATCH v2 03/19] genirq: Add GENERIC_IRQ_IPI Kconfig symbol Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:10 +0100
    [PATCH v2 19/19] irqchip/mips-gic: Add new DT property to reserve IPIs Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:10 +0100
      Re: [PATCH v2 19/19] irqchip/mips-gic: Add new DT property to  reserve IPIs Rob Herring <robh@kernel.org> - 2015-11-25 17:10 +0100
    [PATCH v2 14/19] irqchip/mips-gic: Use gic_vpes instead of NR_CPUS Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:10 +0100
    [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:10 +0100
      Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse  mapping Qais Yousef <qais.yousef@imgtec.com> - 2015-11-27 12:50 +0100
        Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse  mapping Thomas Gleixner <tglx@linutronix.de> - 2015-11-30 11:50 +0100
          Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse  mapping Qais Yousef <qais.yousef@imgtec.com> - 2015-11-30 12:00 +0100
            Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse  mapping Thomas Gleixner <tglx@linutronix.de> - 2015-11-30 12:30 +0100
              Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse  mapping Qais Yousef <qais.yousef@imgtec.com> - 2015-11-30 13:00 +0100
                Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse  mapping Qais Yousef <qais.yousef@imgtec.com> - 2015-12-01 11:50 +0100
    [PATCH v2 02/19] genirq: Add DOMAIN_BUS_IPI Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:10 +0100
    [PATCH v2 11/19] genirq: Implement ipi_send_{mask, single}() Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:10 +0100
    [PATCH v2 15/19] irqchip/mips-gic: Clear percpu_masks correctly when mapping Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:20 +0100
    [PATCH v2 17/19] MIPS: Make smp CMP, CPS and MT use the new generic IPI functions Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:20 +0100
    [PATCH v2 12/19] irqchip/mips-gic: Add a IPI hierarchy domain Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:20 +0100
    [PATCH v2 08/19] genirq: Add a new generic IPI reservation code to irq core Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:20 +0100
    [PATCH v2 07/19] genirq: Make irq_domain_alloc_descs() non static Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:20 +0100
    [PATCH v2 10/19] genirq: Add a new irq_send_ipi() to irq_chip Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:20 +0100
    [PATCH v2 06/19] genirq: Add struct ipi_mapping and its helper functions Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:20 +0100
    [PATCH v2 05/19] genirq: Add struct ipi_mask to irq_data Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:20 +0100
    [PATCH v2 13/19] irqchip/mips-gic: Add device hierarchy domain Qais Yousef <qais.yousef@imgtec.com> - 2015-11-25 13:20 +0100

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#1277285 — [PATCH v2 00/19] Implement generic IPI support mechanism

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-25 13:10 +0100
Subject	[PATCH v2 00/19] Implement generic IPI support mechanism
Message-ID	<qyH3z-67h-9@gated-at.bofh.it>

This series adds support for a generic IPI mechanism that can be used by both
arch and drivers to send IPIs to other CPUs.

v2 introduces a big change over v1 and should have addressed all review comments.

List of changes:
	- We now have 2 IPI flags to distinguish per cpu IPIs from single ones.
	- IPI functions are in ipi.c
	- Added offset to ipi_mask to cater for masks starting at non-zero.
	- New API for sending IPIs.
	- Added device hierarchy to mips-gic.
	- Added a new patch to reserve mips-gic IPIs from DT.
	- Dropped the Docs help for now till API stabilises.

It's hard to detail every change done but these are the headlines.
It would be good to look at all patches again. Hopefully I broke them down in
an away that is easy to review.

I hope this is close enough to how it should be done and I didn't stray off.

I tested this on Malta platform which effectively doesn't have DT support.
Unfortunately I don't have access to a platform with DT support that can run on
latest kernel. The recent changes in irq/core makes backporting the patches non
trivial.

Thanks in advance.

Qais

Qais Yousef (19):
  genirq: Add new IRQ_DOMAIN_FLAGS_IPI
  genirq: Add DOMAIN_BUS_IPI
  genirq: Add GENERIC_IRQ_IPI Kconfig symbol
  genirq: Add new struct ipi_mask and helper functions
  genirq: Add struct ipi_mask to irq_data
  genirq: Add struct ipi_mapping and its helper functions
  genirq: Make irq_domain_alloc_descs() non static
  genirq: Add a new generic IPI reservation code to irq core
  genirq: Add a new function to get IPI reverse mapping
  genirq: Add a new irq_send_ipi() to irq_chip
  genirq: Implement ipi_send_{mask, single}()
  irqchip/mips-gic: Add a IPI hierarchy domain
  irqchip/mips-gic: Add device hierarchy domain
  irqchip/mips-gic: Use gic_vpes instead of NR_CPUS
  irqchip/mips-gic: Clear percpu_masks correctly when mapping
  MIPS: Add generic SMP IPI support
  MIPS: Make smp CMP, CPS and MT use the new generic IPI functions
  MIPS: Delete smp-gic.c
  irqchip/mips-gic: Add new DT property to reserve IPIs

 .../bindings/interrupt-controller/mips-gic.txt     |   7 +
 arch/mips/Kconfig                                  |   6 -
 arch/mips/include/asm/smp-ops.h                    |   5 +-
 arch/mips/kernel/Makefile                          |   1 -
 arch/mips/kernel/smp-cmp.c                         |   4 +-
 arch/mips/kernel/smp-cps.c                         |   4 +-
 arch/mips/kernel/smp-gic.c                         |  64 ---
 arch/mips/kernel/smp-mt.c                          |   2 +-
 arch/mips/kernel/smp.c                             | 139 ++++++
 drivers/irqchip/Kconfig                            |   2 +
 drivers/irqchip/irq-mips-gic.c                     | 354 +++++++++++----
 include/linux/irq.h                                | 152 +++++++
 include/linux/irqchip/mips-gic.h                   |   3 -
 include/linux/irqdomain.h                          |  46 ++
 kernel/irq/Kconfig                                 |   4 +
 kernel/irq/Makefile                                |   1 +
 kernel/irq/ipi.c                                   | 478 +++++++++++++++++++++
 kernel/irq/irqdomain.c                             |   6 +-
 18 files changed, 1102 insertions(+), 176 deletions(-)
 delete mode 100644 arch/mips/kernel/smp-gic.c
 create mode 100644 kernel/irq/ipi.c

-- 
2.1.0

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#1277287 — [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-25 13:10 +0100
Subject	[PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions
Message-ID	<qyH3z-67h-13@gated-at.bofh.it>
In reply to	#1277285

cpumask is limited to NR_CPUS. Introduce ipi_mask which allows us to address
cpu range that is higher than NR_CPUS which is required for drivers to send
IPIs for coprocessor that are outside Linux CPU range.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
 include/linux/irq.h | 84 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 84 insertions(+)

diff --git a/include/linux/irq.h b/include/linux/irq.h
index 3c1c96786248..7d8c3d88f16f 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -19,6 +19,7 @@
 #include <linux/irqreturn.h>
 #include <linux/irqnr.h>
 #include <linux/errno.h>
+#include <linux/slab.h>
 #include <linux/topology.h>
 #include <linux/wait.h>
 #include <linux/io.h>
@@ -128,6 +129,29 @@ struct msi_desc;
 struct irq_domain;
 
 /**
+ * struct ipi_mask - IPI mask information
+ * @nbits: number of bits in cpumask
+ * @offset: the starting position at which the first cpu is set in the mask
+ *	    this is only required by generic code to manage per_cpu IPIs.
+ * @global: whether the mask is SMP IPI ie: subset of cpu_possible_mask or not
+ * @cpumask: cpumask to be used when the ipi_mask is global
+ * @cpu_bitmap: the cpu bitmap to use when the ipi_mask is not global
+ *
+ * ipi_mask is similar to cpumask, but it provides nbits that's configurable
+ * rather than fixed to NR_CPUS. We need that to describe IPI masks to
+ * coprocessors that are outside the NR_CPUS range.
+ */
+struct ipi_mask {
+	unsigned int	nbits;
+	unsigned int	offset;
+	bool		global;
+	union {
+		struct cpumask	cpumask;
+		unsigned long	cpu_bitmap[0];
+	};
+};
+
+/**
  * struct irq_common_data - per irq data shared by all irqchips
  * @state_use_accessors: status information for irq chip functions.
  *			Use accessor functions to deal with it
@@ -934,4 +958,64 @@ static inline u32 irq_reg_readl(struct irq_chip_generic *gc,
 		return readl(gc->reg_base + reg_offset);
 }
 
+static inline const unsigned long *ipi_mask_bits(const struct ipi_mask *ipimask)
+{
+	if (ipimask->global)
+		return cpumask_bits(&ipimask->cpumask);
+	else
+		return ipimask->cpu_bitmap;
+}
+
+static inline unsigned int ipi_mask_weight(const struct ipi_mask *ipimask)
+{
+	if (ipimask->global)
+		return cpumask_weight(&ipimask->cpumask);
+	else
+		return bitmap_weight(ipimask->cpu_bitmap, ipimask->nbits);
+}
+
+static inline void ipi_mask_copy(struct ipi_mask *dst,
+				 const struct ipi_mask *src)
+{
+	dst->nbits = src->nbits;
+	dst->global = src->global;
+
+	if (src->global)
+		return cpumask_copy(&dst->cpumask, &src->cpumask);
+	else
+		return bitmap_copy(dst->cpu_bitmap,
+					src->cpu_bitmap, src->nbits);
+}
+
+static inline struct ipi_mask *ipi_mask_alloc(unsigned int nbits)
+{
+	size_t size = sizeof(struct ipi_mask) + BITS_TO_LONGS(nbits);
+	return kzalloc(size, GFP_KERNEL);
+}
+
+static inline void ipi_mask_free(struct ipi_mask *ipimask)
+{
+	kfree(ipimask);
+}
+
+static inline void ipi_mask_set_cpumask(struct ipi_mask *ipimask,
+					const struct cpumask *cpumask)
+{
+	ipimask->nbits = nr_cpu_ids;
+	ipimask->global = true;
+	cpumask_copy(&ipimask->cpumask, cpumask);
+}
+
+static inline void ipi_mask_set_offset(struct ipi_mask *ipimask,
+				       unsigned int offset)
+{
+	ipimask->offset = offset;
+}
+
+#define ipi_mask_for_each_cpu(cpu, mask)			\
+	for ((cpu) = -1;					\
+		(cpu) = find_next_bit(ipi_mask_bits(mask),	\
+				      (mask)->nbits, (cpu)+1),	\
+		(cpu) < (mask)->nbits;)
+
 #endif /* _LINUX_IRQ_H */
-- 
2.1.0

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#1279778 — Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions

From	Thomas Gleixner <tglx@linutronix.de>
Date	2015-11-30 12:30 +0100
Subject	Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions
Message-ID	<qAuOB-2S8-9@gated-at.bofh.it>
In reply to	#1277287

On Wed, 25 Nov 2015, Qais Yousef wrote:
> cpumask is limited to NR_CPUS. Introduce ipi_mask which allows us to address
> cpu range that is higher than NR_CPUS which is required for drivers to send
> IPIs for coprocessor that are outside Linux CPU range.

I have second thoughts on this.

cpumask is indeed limited to NR_CPUS or in case of CPUMASK_ON_STACK
limited to nr_cpu_ids.

But, that's not an issue for that coprocessor case. Let's assume you
have 16 Linux CPUs and 4 coprocessors. So you set the number of
possible cpus (NR_CPUS) to 20. That makes the cpumask sizeof 20.

The boot-process sets the number of available cpus to 16. So the
Linux side will never try to access anything beyond cpu15.

But you can spare that extra mask magic and simply use cpumask. Sorry
that I did not think about that earlier.

Thanks,

	tglx
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#1279792 — Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-30 12:50 +0100
Subject	Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions
Message-ID	<qAv7Y-33k-15@gated-at.bofh.it>
In reply to	#1279778

On 11/30/2015 11:20 AM, Thomas Gleixner wrote:
> On Wed, 25 Nov 2015, Qais Yousef wrote:
>> cpumask is limited to NR_CPUS. Introduce ipi_mask which allows us to address
>> cpu range that is higher than NR_CPUS which is required for drivers to send
>> IPIs for coprocessor that are outside Linux CPU range.
> I have second thoughts on this.
>
> cpumask is indeed limited to NR_CPUS or in case of CPUMASK_ON_STACK
> limited to nr_cpu_ids.
>
> But, that's not an issue for that coprocessor case. Let's assume you
> have 16 Linux CPUs and 4 coprocessors. So you set the number of
> possible cpus (NR_CPUS) to 20. That makes the cpumask sizeof 20.
>
> The boot-process sets the number of available cpus to 16. So the
> Linux side will never try to access anything beyond cpu15.
>
> But you can spare that extra mask magic and simply use cpumask. Sorry
> that I did not think about that earlier.
>
>


Yes it would be much better to reuse it but wouldn't the runtime checks 
against nr_cpu_ids create problems especially when CPUMASK_ON_STACK is 
defined?

Thanks,
Qais
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#1279854 — Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions

From	Thomas Gleixner <tglx@linutronix.de>
Date	2015-11-30 14:20 +0100
Subject	Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions
Message-ID	<qAwx4-47d-1@gated-at.bofh.it>
In reply to	#1279792

On Mon, 30 Nov 2015, Qais Yousef wrote:
> On 11/30/2015 11:20 AM, Thomas Gleixner wrote:
> > On Wed, 25 Nov 2015, Qais Yousef wrote:
> > > cpumask is limited to NR_CPUS. Introduce ipi_mask which allows us to
> > > address
> > > cpu range that is higher than NR_CPUS which is required for drivers to
> > > send
> > > IPIs for coprocessor that are outside Linux CPU range.
> > I have second thoughts on this.
> > 
> > cpumask is indeed limited to NR_CPUS or in case of CPUMASK_ON_STACK
> > limited to nr_cpu_ids.
> > 
> > But, that's not an issue for that coprocessor case. Let's assume you
> > have 16 Linux CPUs and 4 coprocessors. So you set the number of
> > possible cpus (NR_CPUS) to 20. That makes the cpumask sizeof 20.
> > 
> > The boot-process sets the number of available cpus to 16. So the
> > Linux side will never try to access anything beyond cpu15.
> > 
> > But you can spare that extra mask magic and simply use cpumask. Sorry
> > that I did not think about that earlier.
> > 
> > 
> Yes it would be much better to reuse it but wouldn't the runtime checks
> against nr_cpu_ids create problems especially when CPUMASK_ON_STACK is
> defined?

nr_cpu_ids == find_last_bit(cpumask_bits(cpu_possible_mask),NR_CPUS) + 1;

Thanks,

	tglx
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#1279897 — Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-30 15:00 +0100
Subject	Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions
Message-ID	<qAx9N-4lF-17@gated-at.bofh.it>
In reply to	#1279854

On 11/30/2015 01:11 PM, Thomas Gleixner wrote:
> On Mon, 30 Nov 2015, Qais Yousef wrote:
>>
>> Yes it would be much better to reuse it but wouldn't the runtime checks
>> against nr_cpu_ids create problems especially when CPUMASK_ON_STACK is
>> defined?
> nr_cpu_ids == find_last_bit(cpumask_bits(cpu_possible_mask),NR_CPUS) + 1;
>
>

OK. I can partially see your point. I can't see how the extra 
coprocessor bits will be set in cpu_possible_mask and whether this will 
affect normal linux operation (ie: will it think it can bring that cpu 
up or migrate irqs to it?).

Since you don't see an issue with it, it must be just a missing gap in 
my knowledge that I'll fill while doing this work.

Thanks,
Qais
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#1277291 — [PATCH v2 16/19] MIPS: Add generic SMP IPI support

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-25 13:10 +0100
Subject	[PATCH v2 16/19] MIPS: Add generic SMP IPI support
Message-ID	<qyH3A-67h-21@gated-at.bofh.it>
In reply to	#1277285

Use the new generic IPI layer to provide generic SMP IPI support if the irqchip
supports it.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
 arch/mips/kernel/smp.c | 139 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 139 insertions(+)

diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index bd4385a8e6e8..7d0a440a2b02 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -33,12 +33,16 @@
 #include <linux/cpu.h>
 #include <linux/err.h>
 #include <linux/ftrace.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
 
 #include <linux/atomic.h>
 #include <asm/cpu.h>
 #include <asm/processor.h>
 #include <asm/idle.h>
 #include <asm/r4k-timer.h>
+#include <asm/mips-cpc.h>
 #include <asm/mmu_context.h>
 #include <asm/time.h>
 #include <asm/setup.h>
@@ -79,6 +83,11 @@ static cpumask_t cpu_core_setup_map;
 
 cpumask_t cpu_coherent_mask;
 
+#ifdef CONFIG_GENERIC_IRQ_IPI
+static struct irq_desc *call_desc;
+static struct irq_desc *sched_desc;
+#endif
+
 static inline void set_cpu_sibling_map(int cpu)
 {
 	int i;
@@ -145,6 +154,136 @@ void register_smp_ops(struct plat_smp_ops *ops)
 	mp_ops = ops;
 }
 
+#ifdef CONFIG_GENERIC_IRQ_IPI
+void mips_smp_send_ipi_single(int cpu, unsigned int action)
+{
+	mips_smp_send_ipi_mask(cpumask_of(cpu), action);
+}
+
+void mips_smp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
+{
+	unsigned long flags;
+	unsigned int core;
+	int cpu;
+
+	local_irq_save(flags);
+
+	switch (action) {
+	case SMP_CALL_FUNCTION:
+		ipi_send_mask(call_desc, mask);
+		break;
+
+	case SMP_RESCHEDULE_YOURSELF:
+		ipi_send_mask(sched_desc, mask);
+		break;
+
+	default:
+		BUG();
+	}
+
+	if (mips_cpc_present()) {
+		for_each_cpu(cpu, mask) {
+			core = cpu_data[cpu].core;
+
+			if (core == current_cpu_data.core)
+				continue;
+
+			while (!cpumask_test_cpu(cpu, &cpu_coherent_mask)) {
+				mips_cpc_lock_other(core);
+				write_cpc_co_cmd(CPC_Cx_CMD_PWRUP);
+				mips_cpc_unlock_other();
+			}
+		}
+	}
+
+	local_irq_restore(flags);
+}
+
+
+static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
+{
+	scheduler_ipi();
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
+{
+	generic_smp_call_function_interrupt();
+
+	return IRQ_HANDLED;
+}
+
+static struct irqaction irq_resched = {
+	.handler	= ipi_resched_interrupt,
+	.flags		= IRQF_PERCPU,
+	.name		= "IPI resched"
+};
+
+static struct irqaction irq_call = {
+	.handler	= ipi_call_interrupt,
+	.flags		= IRQF_PERCPU,
+	.name		= "IPI call"
+};
+
+static __init void smp_ipi_init_one(unsigned int virq,
+				    struct irqaction *action)
+{
+	int ret;
+
+	irq_set_handler(virq, handle_percpu_irq);
+	ret = setup_irq(virq, action);
+	BUG_ON(ret);
+}
+
+static int __init mips_smp_ipi_init(void)
+{
+	unsigned int call_virq, sched_virq;
+	struct irq_domain *ipidomain;
+	struct device_node *node;
+	struct ipi_mask ipimask;
+
+	node = of_irq_find_parent(of_root);
+	ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
+
+	/*
+	 * Some platforms have half DT setup. So if we found irq node but
+	 * didn't find an ipidomain, try to search for one that is not in the
+	 * DT.
+	 */
+	if (node && !ipidomain)
+		ipidomain = irq_find_matching_host(NULL, DOMAIN_BUS_IPI);
+
+	BUG_ON(!ipidomain);
+
+	ipi_mask_set_cpumask(&ipimask, cpu_possible_mask);
+
+	call_virq = irq_reserve_ipi(ipidomain, &ipimask);
+	BUG_ON(!call_virq);
+
+	sched_virq = irq_reserve_ipi(ipidomain, &ipimask);
+	BUG_ON(!sched_virq);
+
+	if (irq_domain_is_ipi_per_cpu(ipidomain)) {
+		int cpu;
+
+		for_each_cpu(cpu, cpu_possible_mask) {
+			smp_ipi_init_one(call_virq + cpu, &irq_call);
+			smp_ipi_init_one(sched_virq + cpu, &irq_resched);
+		}
+	} else {
+		smp_ipi_init_one(call_virq, &irq_call);
+		smp_ipi_init_one(sched_virq, &irq_resched);
+	}
+
+	call_desc = irq_to_desc(call_virq);
+	sched_desc = irq_to_desc(sched_virq);
+
+	return 0;
+}
+early_initcall(mips_smp_ipi_init);
+#endif
+
 /*
  * First C code run on the secondary CPUs after being started up by
  * the master.
-- 
2.1.0

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#1277294 — [PATCH v2 01/19] genirq: Add new IRQ_DOMAIN_FLAGS_IPI

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-25 13:10 +0100
Subject	[PATCH v2 01/19] genirq: Add new IRQ_DOMAIN_FLAGS_IPI
Message-ID	<qyH3A-67h-25@gated-at.bofh.it>
In reply to	#1277285

This flag will be used to identify an IPI domain.

We have two types:

	- PER_CPU: indicating a virq for each IPI
	- SINGLE: indicating a single virq for all IPIs

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
 include/linux/irqdomain.h | 37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index d5e5c5bef28c..c1a59f37674d 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -171,6 +171,12 @@ enum {
 	/* Core calls alloc/free recursive through the domain hierarchy. */
 	IRQ_DOMAIN_FLAG_AUTO_RECURSIVE	= (1 << 1),
 
+	/* Irq domain is an IPI domain with virq per cpu */
+	IRQ_DOMAIN_FLAG_IPI_PER_CPU	= (1 << 2),
+
+	/* Irq domain is an IPI domain with single virq */
+	IRQ_DOMAIN_FLAG_IPI_SINGLE	= (1 << 3),
+
 	/*
 	 * Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved
 	 * for implementation specific purposes and ignored by the
@@ -391,6 +397,22 @@ static inline bool irq_domain_is_hierarchy(struct irq_domain *domain)
 {
 	return domain->flags & IRQ_DOMAIN_FLAG_HIERARCHY;
 }
+
+static inline bool irq_domain_is_ipi(struct irq_domain *domain)
+{
+	return domain->flags &
+		(IRQ_DOMAIN_FLAG_IPI_PER_CPU | IRQ_DOMAIN_FLAG_IPI_SINGLE);
+}
+
+static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain)
+{
+	return domain->flags & IRQ_DOMAIN_FLAG_IPI_PER_CPU;
+}
+
+static inline bool irq_domain_is_ipi_single(struct irq_domain *domain)
+{
+	return domain->flags & IRQ_DOMAIN_FLAG_IPI_SINGLE;
+}
 #else	/* CONFIG_IRQ_DOMAIN_HIERARCHY */
 static inline void irq_domain_activate_irq(struct irq_data *data) { }
 static inline void irq_domain_deactivate_irq(struct irq_data *data) { }
@@ -404,6 +426,21 @@ static inline bool irq_domain_is_hierarchy(struct irq_domain *domain)
 {
 	return false;
 }
+
+static inline bool irq_domain_is_ipi(struct irq_domain *domain)
+{
+	return false;
+}
+
+static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain)
+{
+	return false;
+}
+
+static inline bool irq_domain_is_ipi_single(struct irq_domain *domain)
+{
+	return false;
+}
 #endif	/* CONFIG_IRQ_DOMAIN_HIERARCHY */
 
 #else /* CONFIG_IRQ_DOMAIN */
-- 
2.1.0

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#1277295 — [PATCH v2 03/19] genirq: Add GENERIC_IRQ_IPI Kconfig symbol

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-25 13:10 +0100
Subject	[PATCH v2 03/19] genirq: Add GENERIC_IRQ_IPI Kconfig symbol
Message-ID	<qyH3A-67h-31@gated-at.bofh.it>
In reply to	#1277285

irqchip should select this config to denote it supports generic IPI.

This will aid generic arch code to know when it can use generic IPI layer.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
 kernel/irq/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig
index 3b48dab80164..3bbfd6a9c475 100644
--- a/kernel/irq/Kconfig
+++ b/kernel/irq/Kconfig
@@ -64,6 +64,10 @@ config IRQ_DOMAIN_HIERARCHY
 	bool
 	select IRQ_DOMAIN
 
+# Generic IRQ IPI support
+config GENERIC_IRQ_IPI
+	bool
+
 # Generic MSI interrupt support
 config GENERIC_MSI_IRQ
 	bool
-- 
2.1.0

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#1277300 — [PATCH v2 19/19] irqchip/mips-gic: Add new DT property to reserve IPIs

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-25 13:10 +0100
Subject	[PATCH v2 19/19] irqchip/mips-gic: Add new DT property to reserve IPIs
Message-ID	<qyH3B-67h-45@gated-at.bofh.it>
In reply to	#1277285

The new property will allow to specify the range of GIC hwirqs to use for IPIs.

This is an optinal property. We preserve the previous behaviour of allocating
the last 2 * gic_vpes if it's not specified or DT is not supported.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org

---
 .../devicetree/bindings/interrupt-controller/mips-gic.txt    |  7 +++++++
 drivers/irqchip/irq-mips-gic.c                               | 12 ++++++++++--
 2 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt b/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
index aae4c384ee1f..173595305e26 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
@@ -23,6 +23,12 @@ Optional properties:
 - mti,reserved-cpu-vectors : Specifies the list of CPU interrupt vectors
   to which the GIC may not route interrupts.  Valid values are 2 - 7.
   This property is ignored if the CPU is started in EIC mode.
+- mti,reserved-ipi-vectors : Specifies the range of GIC interrupts that are
+  reserved for IPIs.
+  It accepts 2 values, the 1st is the starting interrupt and the 2nd is the size
+  of the reserved range.
+  If not specified, the driver will allocate the last 2 * number of VPEs in the
+  system.
 
 Required properties for timer sub-node:
 - compatible : Should be "mti,gic-timer".
@@ -44,6 +50,7 @@ Example:
 		#interrupt-cells = <3>;
 
 		mti,reserved-cpu-vectors = <7>;
+		mti,reserved-ipi-vectors = <40 8>;
 
 		timer {
 			compatible = "mti,gic-timer";
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index c7043a15253b..659fe734d1b7 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -945,6 +945,7 @@ static void __init __gic_init(unsigned long gic_base_addr,
 			      struct device_node *node)
 {
 	unsigned int gicconfig;
+	unsigned int v[2];
 
 	gic_base = ioremap_nocache(gic_base_addr, gic_addrspace_size);
 
@@ -1013,8 +1014,15 @@ static void __init __gic_init(unsigned long gic_base_addr,
 
 	gic_ipi_domain->bus_token = DOMAIN_BUS_IPI;
 
-	/* Make the last 2 * NR_CPUS available for IPIs */
-	bitmap_set(ipi_resrv, gic_shared_intrs - 2 * gic_vpes, 2 * gic_vpes);
+	if (node &&
+	    !of_property_read_u32_array(node, "mti,reserved-ipi-vectors", &v, 2)) {
+		bitmap_set(ipi_resrv, v[0], v[1]);
+	} else {
+		/* Make the last 2 * gic_vpes available for IPIs */
+		bitmap_set(ipi_resrv,
+			   gic_shared_intrs - 2 * gic_vpes,
+			   2 * gic_vpes);
+	}
 
 	gic_basic_init();
 }
-- 
2.1.0

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#1277540 — Re: [PATCH v2 19/19] irqchip/mips-gic: Add new DT property to reserve IPIs

From	Rob Herring <robh@kernel.org>
Date	2015-11-25 17:10 +0100
Subject	Re: [PATCH v2 19/19] irqchip/mips-gic: Add new DT property to reserve IPIs
Message-ID	<qyKNS-9k-67@gated-at.bofh.it>
In reply to	#1277300

On Wed, Nov 25, 2015 at 12:06:57PM +0000, Qais Yousef wrote:
> The new property will allow to specify the range of GIC hwirqs to use for IPIs.
> 
> This is an optinal property. We preserve the previous behaviour of allocating
> the last 2 * gic_vpes if it's not specified or DT is not supported.
> 
> Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Pawel Moll <pawel.moll@arm.com>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
> Cc: Kumar Gala <galak@codeaurora.org>
> Cc: devicetree@vger.kernel.org

Acked-by: Rob Herring <robh@kernel.org>

> 
> ---
>  .../devicetree/bindings/interrupt-controller/mips-gic.txt    |  7 +++++++
>  drivers/irqchip/irq-mips-gic.c                               | 12 ++++++++++--
>  2 files changed, 17 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt b/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
> index aae4c384ee1f..173595305e26 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/mips-gic.txt
> @@ -23,6 +23,12 @@ Optional properties:
>  - mti,reserved-cpu-vectors : Specifies the list of CPU interrupt vectors
>    to which the GIC may not route interrupts.  Valid values are 2 - 7.
>    This property is ignored if the CPU is started in EIC mode.
> +- mti,reserved-ipi-vectors : Specifies the range of GIC interrupts that are
> +  reserved for IPIs.
> +  It accepts 2 values, the 1st is the starting interrupt and the 2nd is the size
> +  of the reserved range.
> +  If not specified, the driver will allocate the last 2 * number of VPEs in the
> +  system.
>  
>  Required properties for timer sub-node:
>  - compatible : Should be "mti,gic-timer".
> @@ -44,6 +50,7 @@ Example:
>  		#interrupt-cells = <3>;
>  
>  		mti,reserved-cpu-vectors = <7>;
> +		mti,reserved-ipi-vectors = <40 8>;
>  
>  		timer {
>  			compatible = "mti,gic-timer";
> diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
> index c7043a15253b..659fe734d1b7 100644
> --- a/drivers/irqchip/irq-mips-gic.c
> +++ b/drivers/irqchip/irq-mips-gic.c
> @@ -945,6 +945,7 @@ static void __init __gic_init(unsigned long gic_base_addr,
>  			      struct device_node *node)
>  {
>  	unsigned int gicconfig;
> +	unsigned int v[2];
>  
>  	gic_base = ioremap_nocache(gic_base_addr, gic_addrspace_size);
>  
> @@ -1013,8 +1014,15 @@ static void __init __gic_init(unsigned long gic_base_addr,
>  
>  	gic_ipi_domain->bus_token = DOMAIN_BUS_IPI;
>  
> -	/* Make the last 2 * NR_CPUS available for IPIs */
> -	bitmap_set(ipi_resrv, gic_shared_intrs - 2 * gic_vpes, 2 * gic_vpes);
> +	if (node &&
> +	    !of_property_read_u32_array(node, "mti,reserved-ipi-vectors", &v, 2)) {
> +		bitmap_set(ipi_resrv, v[0], v[1]);
> +	} else {
> +		/* Make the last 2 * gic_vpes available for IPIs */
> +		bitmap_set(ipi_resrv,
> +			   gic_shared_intrs - 2 * gic_vpes,
> +			   2 * gic_vpes);
> +	}
>  
>  	gic_basic_init();
>  }
> -- 
> 2.1.0
> 
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#1277302 — [PATCH v2 14/19] irqchip/mips-gic: Use gic_vpes instead of NR_CPUS

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-25 13:10 +0100
Subject	[PATCH v2 14/19] irqchip/mips-gic: Use gic_vpes instead of NR_CPUS
Message-ID	<qyH3B-67h-49@gated-at.bofh.it>
In reply to	#1277285

NR_CPUS is set by Kconfig and could be much higher than what actually is in the
system.

gic_vpes should be a true representitives of the number of cpus in the system,
so use it instead.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
 drivers/irqchip/irq-mips-gic.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 8ce5731bd40d..00d197c24e16 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -452,7 +452,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
 	gic_map_to_vpe(irq, mips_cm_vp_id(cpumask_first(&tmp)));
 
 	/* Update the pcpu_masks */
-	for (i = 0; i < NR_CPUS; i++)
+	for (i = 0; i < gic_vpes; i++)
 		clear_bit(irq, pcpu_masks[i].pcpu_mask);
 	set_bit(irq, pcpu_masks[cpumask_first(&tmp)].pcpu_mask);
 
@@ -1084,7 +1084,7 @@ static void __init __gic_init(unsigned long gic_base_addr,
 	gic_ipi_domain->bus_token = DOMAIN_BUS_IPI;
 
 	/* Make the last 2 * NR_CPUS available for IPIs */
-	bitmap_set(ipi_resrv, gic_shared_intrs - 2 * NR_CPUS, 2 * NR_CPUS);
+	bitmap_set(ipi_resrv, gic_shared_intrs - 2 * gic_vpes, 2 * gic_vpes);
 
 	gic_basic_init();
 
-- 
2.1.0

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#1277303 — [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-25 13:10 +0100
Subject	[PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping
Message-ID	<qyH3C-67h-61@gated-at.bofh.it>
In reply to	#1277285

When dealing with coprocessors we need to find out the actual hwirqs values to
pass on to the firmware so that it knows what it needs to use to received and
send IPIs from and to us.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
 include/linux/irq.h |  2 ++
 kernel/irq/ipi.c    | 37 +++++++++++++++++++++++++++++++++++++
 2 files changed, 39 insertions(+)

diff --git a/include/linux/irq.h b/include/linux/irq.h
index 2fb5d255313e..9a5d1e11a08f 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -1070,4 +1070,6 @@ int irq_unmap_ipi(struct ipi_mapping *map, unsigned int cpu);
 irq_hw_number_t irq_ipi_mapping_get_hwirq(struct ipi_mapping *map,
 					  unsigned int cpu);
 
+irq_hw_number_t ipi_get_hwirq(unsigned int irq, unsigned int cpu);
+
 #endif /* _LINUX_IRQ_H */
diff --git a/kernel/irq/ipi.c b/kernel/irq/ipi.c
index f2dc8c73965c..d6faa0e768b8 100644
--- a/kernel/irq/ipi.c
+++ b/kernel/irq/ipi.c
@@ -247,3 +247,40 @@ void irq_destroy_ipi(unsigned int irq)
 
 	irq_domain_free_irqs(irq, nr_irqs);
 }
+
+/**
+ * ipi_get_hwirq - get the hwirq associated with an IPI to a cpu
+ * @irq: linux irq number
+ * @cpu: the cpu to find the revmap for
+ *
+ * When dealing with coprocessors IPI, we need to inform it of the hwirq it
+ * needs to use to receive and send IPIs. This function provides the revmap
+ * to get this info to pass on to coprocessor firmware.
+ *
+ * Returns hwirq value on success and INVALID_HWIRQ on failure.
+ */
+irq_hw_number_t ipi_get_hwirq(unsigned int irq, unsigned int cpu)
+{
+	struct irq_data *data = irq_get_irq_data(irq);
+	struct ipi_mask *ipimask = data ? irq_data_get_ipi_mask(data) : NULL;
+	irq_hw_number_t hwirq;
+
+	if (!data || !ipimask)
+		return INVALID_HWIRQ;
+
+	if (cpu > ipimask->nbits)
+		return INVALID_HWIRQ;
+
+	if (!test_bit(cpu, ipimask->cpu_bitmap))
+		return INVALID_HWIRQ;
+
+	if (irq_domain_is_ipi_per_cpu(data->domain)) {
+		data = irq_get_irq_data(irq + cpu - ipimask->offset);
+		hwirq = data ? irqd_to_hwirq(data) : INVALID_HWIRQ;
+	} else {
+		hwirq = irqd_to_hwirq(data) + cpu - ipimask->offset;
+	}
+
+	return hwirq;
+}
+EXPORT_SYMBOL_GPL(ipi_get_hwirq);
-- 
2.1.0

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#1278765 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-27 12:50 +0100
Subject	Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping
Message-ID	<qzpHk-2hM-3@gated-at.bofh.it>
In reply to	#1277303

On 11/25/2015 12:06 PM, Qais Yousef wrote:
> +
> +/**
> + * ipi_get_hwirq - get the hwirq associated with an IPI to a cpu
> + * @irq: linux irq number
> + * @cpu: the cpu to find the revmap for
> + *
> + * When dealing with coprocessors IPI, we need to inform it of the hwirq it
> + * needs to use to receive and send IPIs. This function provides the revmap
> + * to get this info to pass on to coprocessor firmware.
> + *
> + * Returns hwirq value on success and INVALID_HWIRQ on failure.
> + */
> +irq_hw_number_t ipi_get_hwirq(unsigned int irq, unsigned int cpu)
> +{
> +	struct irq_data *data = irq_get_irq_data(irq);
> +	struct ipi_mask *ipimask = data ? irq_data_get_ipi_mask(data) : NULL;
> +	irq_hw_number_t hwirq;
> +
> +	if (!data || !ipimask)
> +		return INVALID_HWIRQ;
> +
> +	if (cpu > ipimask->nbits)
> +		return INVALID_HWIRQ;
> +
> +	if (!test_bit(cpu, ipimask->cpu_bitmap))
> +		return INVALID_HWIRQ;
> +
> +	if (irq_domain_is_ipi_per_cpu(data->domain)) {
> +		data = irq_get_irq_data(irq + cpu - ipimask->offset);
> +		hwirq = data ? irqd_to_hwirq(data) : INVALID_HWIRQ;
> +	} else {
> +		hwirq = irqd_to_hwirq(data) + cpu - ipimask->offset;
> +	}
> +
> +	return hwirq;
> +}
> +EXPORT_SYMBOL_GPL(ipi_get_hwirq);


While trying to get my remoteproc driver work with this I uncovered a 
problem with this approach.

mips-gic doesn't store the actual hwirq in the irq_data. It uses 
GIC_SHARED_TO_HWIRQ() and GIC_HWIRQ_TO_SHARED() to add and remove an offset.

I'll add a new chip function irq_get_raw_hwirq(struct irq_data *d) that 
will return the real hardware value of hwirq. If not defined, I'll 
revert back to using the irqd_to_hwirq().

Objections?

Thanks,
Qais
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#1279763 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

From	Thomas Gleixner <tglx@linutronix.de>
Date	2015-11-30 11:50 +0100
Subject	Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping
Message-ID	<qAubU-2pN-15@gated-at.bofh.it>
In reply to	#1278765

On Fri, 27 Nov 2015, Qais Yousef wrote:
> 
> While trying to get my remoteproc driver work with this I uncovered a problem
> with this approach.
> 
> mips-gic doesn't store the actual hwirq in the irq_data. It uses
> GIC_SHARED_TO_HWIRQ() and GIC_HWIRQ_TO_SHARED() to add and remove an offset.

Why can't MIPS store the real hwirq number in irq_data?
 
Thanks,

	tglx
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#1279767 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-30 12:00 +0100
Subject	Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping
Message-ID	<qAulz-2t9-5@gated-at.bofh.it>
In reply to	#1279763

On 11/30/2015 10:40 AM, Thomas Gleixner wrote:
> On Fri, 27 Nov 2015, Qais Yousef wrote:
>> While trying to get my remoteproc driver work with this I uncovered a problem
>> with this approach.
>>
>> mips-gic doesn't store the actual hwirq in the irq_data. It uses
>> GIC_SHARED_TO_HWIRQ() and GIC_HWIRQ_TO_SHARED() to add and remove an offset.
> Why can't MIPS store the real hwirq number in irq_data?


I'm wary of ending up in inconsistency hell where some functions need to 
deal with raw hwirq and others with translated ones.

I will give this a go first and see if it gets really ugly.

Thanks,
Qais
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#1279777 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

From	Thomas Gleixner <tglx@linutronix.de>
Date	2015-11-30 12:30 +0100
Subject	Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping
Message-ID	<qAuOB-2S8-7@gated-at.bofh.it>
In reply to	#1279767

On Mon, 30 Nov 2015, Qais Yousef wrote:
> On 11/30/2015 10:40 AM, Thomas Gleixner wrote:
> > On Fri, 27 Nov 2015, Qais Yousef wrote:
> > > While trying to get my remoteproc driver work with this I uncovered a
> > > problem
> > > with this approach.
> > > 
> > > mips-gic doesn't store the actual hwirq in the irq_data. It uses
> > > GIC_SHARED_TO_HWIRQ() and GIC_HWIRQ_TO_SHARED() to add and remove an
> > > offset.
> > Why can't MIPS store the real hwirq number in irq_data?
> 
> 
> I'm wary of ending up in inconsistency hell where some functions need to deal
> with raw hwirq and others with translated ones.
> 
> I will give this a go first and see if it gets really ugly.

Well, the question is why can't those functions not all use the raw
hardware irq. We have it in irq_data exactly to avoid calculations in
the hot path functions.

Thanks,

	tglx
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#1279807 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-30 13:00 +0100
Subject	Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping
Message-ID	<qAvhI-38r-91@gated-at.bofh.it>
In reply to	#1279777

On 11/30/2015 11:22 AM, Thomas Gleixner wrote:
> On Mon, 30 Nov 2015, Qais Yousef wrote:
>> On 11/30/2015 10:40 AM, Thomas Gleixner wrote:
>>> On Fri, 27 Nov 2015, Qais Yousef wrote:
>>>> While trying to get my remoteproc driver work with this I uncovered a
>>>> problem
>>>> with this approach.
>>>>
>>>> mips-gic doesn't store the actual hwirq in the irq_data. It uses
>>>> GIC_SHARED_TO_HWIRQ() and GIC_HWIRQ_TO_SHARED() to add and remove an
>>>> offset.
>>> Why can't MIPS store the real hwirq number in irq_data?
>>
>> I'm wary of ending up in inconsistency hell where some functions need to deal
>> with raw hwirq and others with translated ones.
>>
>> I will give this a go first and see if it gets really ugly.
> Well, the question is why can't those functions not all use the raw
> hardware irq. We have it in irq_data exactly to avoid calculations in
> the hot path functions.
>


I'll see what I can do as part of this series. I think I can fix the new 
IPI and device domains, but can't promise about the root gic domain. It 
might be too big of a change for this series.

Thanks,
Qais
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#1280740 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-12-01 11:50 +0100
Subject	Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping
Message-ID	<qAQFr-8sH-1@gated-at.bofh.it>
In reply to	#1279807

On 11/30/2015 11:59 AM, Qais Yousef wrote:
> On 11/30/2015 11:22 AM, Thomas Gleixner wrote:
>> Well, the question is why can't those functions not all use the raw
>> hardware irq. We have it in irq_data exactly to avoid calculations in
>> the hot path functions.
>>
>
>
> I'll see what I can do as part of this series. I think I can fix the 
> new IPI and device domains, but can't promise about the root gic 
> domain. It might be too big of a change for this series.

Unfortunately this is more work than I can afford putting into it right 
now. Can we have this fix coming in later? It shouldn't affect anything 
in this series.

The major issue here is that I need to split the root domain into shared 
and local so that each will have its linear hwirq space therefore get 
rid of the conversion macros.

BUT, the DT binding will break if I do this. I can't think of a simple 
way to keep the existing binding and do the split. Not without hackery 
and more magic at least which I don't think would be a better alternative.

Thanks,
Qais
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#1277304 — [PATCH v2 02/19] genirq: Add DOMAIN_BUS_IPI

From	Qais Yousef <qais.yousef@imgtec.com>
Date	2015-11-25 13:10 +0100
Subject	[PATCH v2 02/19] genirq: Add DOMAIN_BUS_IPI
Message-ID	<qyH3C-67h-59@gated-at.bofh.it>
In reply to	#1277285

We need a way to search and match IPI domains.

Using the new enum we can use irq_find_matching_host() to do that.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
 include/linux/irqdomain.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index c1a59f37674d..f717796a4d5e 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -73,6 +73,7 @@ enum irq_domain_bus_token {
 	DOMAIN_BUS_PCI_MSI,
 	DOMAIN_BUS_PLATFORM_MSI,
 	DOMAIN_BUS_NEXUS,
+	DOMAIN_BUS_IPI,
 };
 
 /**
-- 
2.1.0

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Page 1 of 2 [1] 2 Next page →

csiph-web

[PATCH v2 00/19] Implement generic IPI support mechanism

Contents

#1277285 — [PATCH v2 00/19] Implement generic IPI support mechanism

#1277287 — [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions

#1279778 — Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions

#1279792 — Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions

#1279854 — Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions

#1279897 — Re: [PATCH v2 04/19] genirq: Add new struct ipi_mask and helper functions

#1277291 — [PATCH v2 16/19] MIPS: Add generic SMP IPI support

#1277294 — [PATCH v2 01/19] genirq: Add new IRQ_DOMAIN_FLAGS_IPI

#1277295 — [PATCH v2 03/19] genirq: Add GENERIC_IRQ_IPI Kconfig symbol

#1277300 — [PATCH v2 19/19] irqchip/mips-gic: Add new DT property to reserve IPIs

#1277540 — Re: [PATCH v2 19/19] irqchip/mips-gic: Add new DT property to reserve IPIs

#1277302 — [PATCH v2 14/19] irqchip/mips-gic: Use gic_vpes instead of NR_CPUS

#1277303 — [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

#1278765 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

#1279763 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

#1279767 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

#1279777 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

#1279807 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

#1280740 — Re: [PATCH v2 09/19] genirq: Add a new function to get IPI reverse mapping

#1277304 — [PATCH v2 02/19] genirq: Add DOMAIN_BUS_IPI