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[PATCH 0/3] Add the rk3368 evb board with the act8846 pmic

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  [PATCH 0/3] Add the rk3368 evb board with the act8846 pmic Caesar Wang <wxt@rock-chips.com> - 2015-12-01 10:20 +0100
    [PATCH 3/3] arm64: dts: rockchip: add the pwm node info for RK3368 SoCs Caesar Wang <wxt@rock-chips.com> - 2015-12-01 10:20 +0100
    [PATCH 1/3] clk: rockchip: Force rk3368 PWM clock (and its parents) on Caesar Wang <wxt@rock-chips.com> - 2015-12-01 10:20 +0100
    Re: [PATCH 0/3] Add the rk3368 evb board with the act8846 pmic Heiko Stübner <heiko@sntech.de> - 2015-12-02 01:00 +0100

#1280673 — [PATCH 0/3] Add the rk3368 evb board with the act8846 pmic

This series pacthes try to add the evb dts for rk3368 SoCs,
This's similar with the rj3288 evb board.

On the moment, pwm/backlight/usb/thermal/emmc stuff can work for this
board, I add the base version for the future firstly.

PATCH [1/3]: Force rk3368 PWM clock (and its parents) On
That's similar HACK way to work.

PATCH [2/3]: Add the RK3368 EVB board for with the act8846 pmic for dtsi

PATCH [3/3]: Add the PWM node info for rk3368 core.



Caesar Wang (3):
  clk: rockchip: Force rk3368 PWM clock (and its parents) on
  arm64: dts: rockchip: add rk3368 evaluation board
  arm64: dts: rockchip: add the pwm node info for RK3368 SoCs

 arch/arm64/boot/dts/rockchip/Makefile              |   2 +-
 .../arm64/boot/dts/rockchip/rk3368-evb-act8846.dts | 173 +++++++++++++
 arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi       | 286 +++++++++++++++++++++
 arch/arm64/boot/dts/rockchip/rk3368.dtsi           |  60 +++++
 drivers/clk/rockchip/clk-rk3368.c                  |   9 +
 5 files changed, 529 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-evb-act8846.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-evb.dtsi

-- 
1.9.1

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#1280677 — [PATCH 3/3] arm64: dts: rockchip: add the pwm node info for RK3368 SoCs

The pulse-width modulator (PWM) feature is very common in
embedded systems. There exust 4 built-in PWM channels.

In general, the pwm pins can via the pinctrl to
configure iomux mode but the pwm2 since the pwm2 iomux mode from
the SoC control register.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 60 ++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 1f10b85..3b4cc84 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -472,6 +472,48 @@
 		status = "disabled";
 	};
 
+	pwm0: pwm@ff680000 {
+		compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
+		reg = <0x0 0xff680000 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		clocks = <&cru PCLK_PWM1>;
+		clock-names = "pwm";
+		status = "disabled";
+	};
+
+	pwm1: pwm@ff680010 {
+		compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
+		reg = <0x0 0xff680010 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm1_pin>;
+		clocks = <&cru PCLK_PWM1>;
+		clock-names = "pwm";
+		status = "disabled";
+	};
+
+	pwm2: pwm@ff680020 {
+		compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
+		reg = <0x0 0xff680020 0x0 0x10>;
+		#pwm-cells = <3>;
+		clocks = <&cru PCLK_PWM1>;
+		clock-names = "pwm";
+		status = "disabled";
+	};
+
+	pwm3: pwm@ff680030 {
+		compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm";
+		reg = <0x0 0xff680030 0x0 0x10>;
+		#pwm-cells = <3>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm3_pin>;
+		clocks = <&cru PCLK_PWM1>;
+		clock-names = "pwm";
+		status = "disabled";
+	};
+
 	uart2: serial@ff690000 {
 		compatible = "rockchip,rk3368-uart", "snps,dw-apb-uart";
 		reg = <0x0 0xff690000 0x0 0x100>;
@@ -713,6 +755,24 @@
 			};
 		};
 
+		pwm0 {
+			pwm0_pin: pwm0-pin {
+				rockchip,pins = <3 8 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm1 {
+			pwm1_pin: pwm1-pin {
+				rockchip,pins = <0 8 RK_FUNC_2 &pcfg_pull_none>;
+			};
+		};
+
+		pwm3 {
+			pwm3_pin: pwm3-pin {
+				rockchip,pins = <3 29 RK_FUNC_3 &pcfg_pull_none>;
+			};
+		};
+
 		sdio0 {
 			sdio0_bus1: sdio0-bus1 {
 				rockchip,pins = <2 28 RK_FUNC_1 &pcfg_pull_up>;
-- 
1.9.1

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#1280679 — [PATCH 1/3] clk: rockchip: Force rk3368 PWM clock (and its parents) on

This's similar with the rk3288 SoCs.
From: Douglas Anderson <dianders@chromium.org>

Quick summary:

Most rk3368 boards (especially those with Pmic that followed the lead
rom rk3368-evb-act8846) have a PWM regulator on them for vdd_logic.
This is the main voltage for all kinds of misc stuff including the
memory controller.

On these boards it is critically important to make sure that the PWM
never ever glitches and never loses its clock. Any glitch could
crash the system.

Right now there are no users of the PWM regulator and also Linux
thinks that the PWM regulator is disabled.  Things happen to work
because firmware configured the PWM and Linux doesn't touch it.
..and the PWM's clock is marked as "ignore unused".

...but things _stop_ working if we turn off serial console.  Why?
Because:
    1. Serial console shares a parent clock with the PWM (pclk_cpu)
    2. If we have no serial console then nobody is holding pclk_cpu on
       at reboot time.  It gets disabled.

We need to fix a lot of the above problems, but until we get
everything right the cleanest "hack" seems like it is to just keep
the "rk_pwm" clock on always.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 drivers/clk/rockchip/clk-rk3368.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index 7e6b783..5385fef 100644
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -819,6 +819,15 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
 };
 
 static const char *const rk3368_critical_clocks[] __initconst = {
+	/*
+	 * HACK: Make sure this stays enabled so all its parents (like pclk_cpu)
+	 * stay enabled. CLK_IGNORE_UNUSED doesn't take care of parents.
+	 *
+	 * This is temporary until the PWM driver enables the right clock, which
+	 * it can't do until we get the ordering _just right_ and never glitch
+	 * the voltage of the PWM regulator.  Ick.
+	 */
+	"pclk_pwm1",
 	"pclk_pd_pmu",
 };
 
-- 
1.9.1

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#1281360

Hi Caesar,

Am Dienstag, 1. Dezember 2015, 17:13:23 schrieb Caesar Wang:
> This series pacthes try to add the evb dts for rk3368 SoCs,
> This's similar with the rj3288 evb board.
> 
> On the moment, pwm/backlight/usb/thermal/emmc stuff can work for this
> board, I add the base version for the future firstly.
applied all 3 to relevant branches for 4.5, with some small changes:

> PATCH [1/3]: Force rk3368 PWM clock (and its parents) On
> That's similar HACK way to work.
shortened the comment in the code a bit

> PATCH [2/3]: Add the RK3368 EVB board for with the act8846 pmic for dtsi
Moved some minor stuff around a bit (ordering, etc)

> PATCH [3/3]: Add the PWM node info for rk3368 core.
this now comes before the addition of the evb files


Heiko
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