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[PATCH v4 2/5] clk: sunxi: Add sun9i A80 apbs gates support

Started byChen-Yu Tsai <wens@csie.org>
First post2015-11-29 04:10 +0100
Last post2015-12-01 12:20 +0100
Articles 3 — 3 participants

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  [PATCH v4 2/5] clk: sunxi: Add sun9i A80 apbs gates support Chen-Yu Tsai <wens@csie.org> - 2015-11-29 04:10 +0100
    Re: [PATCH v4 2/5] clk: sunxi: Add sun9i A80 apbs gates support Rob Herring <robh@kernel.org> - 2015-11-30 18:20 +0100
      Re: [PATCH v4 2/5] clk: sunxi: Add sun9i A80 apbs gates support Maxime Ripard <maxime.ripard@free-electrons.com> - 2015-12-01 12:20 +0100

#1279262 — [PATCH v4 2/5] clk: sunxi: Add sun9i A80 apbs gates support

FromChen-Yu Tsai <wens@csie.org>
Date2015-11-29 04:10 +0100
Subject[PATCH v4 2/5] clk: sunxi: Add sun9i A80 apbs gates support
Message-ID<qA0xb-Hf-5@gated-at.bofh.it>
This patch adds support for the PRCM apbs clock gates found on the
Allwinner A80 SoC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
 drivers/clk/sunxi/clk-simple-gates.c              | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index a94bb56a0e9e..b6859ed6913f 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -55,6 +55,7 @@ Required properties:
 	"allwinner,sun9i-a80-apb1-gates-clk" - for the APB1 gates on A80
 	"allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
 	"allwinner,sun8i-a23-apb2-gates-clk" - for the APB2 gates on A23
+	"allwinner,sun9i-a80-apbs-gates-clk" - for the APBS gates on A80
 	"allwinner,sun5i-a13-mbus-clk" - for the MBUS clock on A13
 	"allwinner,sun4i-a10-mmc-clk" - for the MMC clock
 	"allwinner,sun9i-a80-mmc-clk" - for mmc module clocks on A80
diff --git a/drivers/clk/sunxi/clk-simple-gates.c b/drivers/clk/sunxi/clk-simple-gates.c
index 0214c6548afd..c8acc0612c15 100644
--- a/drivers/clk/sunxi/clk-simple-gates.c
+++ b/drivers/clk/sunxi/clk-simple-gates.c
@@ -140,6 +140,8 @@ CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-gates-clk",
 	       sunxi_simple_gates_init);
 CLK_OF_DECLARE(sun9i_a80_apb1, "allwinner,sun9i-a80-apb1-gates-clk",
 	       sunxi_simple_gates_init);
+CLK_OF_DECLARE(sun9i_a80_apbs, "allwinner,sun9i-a80-apbs-gates-clk",
+	       sunxi_simple_gates_init);
 
 static const int sun4i_a10_ahb_critical_clocks[] __initconst = {
 	14,	/* ahb_sdram */
-- 
2.6.2

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#1280124

FromRob Herring <robh@kernel.org>
Date2015-11-30 18:20 +0100
Message-ID<qAAhl-6vu-35@gated-at.bofh.it>
In reply to#1279262
On Sun, Nov 29, 2015 at 11:03:07AM +0800, Chen-Yu Tsai wrote:
> This patch adds support for the PRCM apbs clock gates found on the
> Allwinner A80 SoC.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Rob Herring <robh@kernel.org>

> ---
>  Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
>  drivers/clk/sunxi/clk-simple-gates.c              | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
> index a94bb56a0e9e..b6859ed6913f 100644
> --- a/Documentation/devicetree/bindings/clock/sunxi.txt
> +++ b/Documentation/devicetree/bindings/clock/sunxi.txt
> @@ -55,6 +55,7 @@ Required properties:
>  	"allwinner,sun9i-a80-apb1-gates-clk" - for the APB1 gates on A80
>  	"allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
>  	"allwinner,sun8i-a23-apb2-gates-clk" - for the APB2 gates on A23
> +	"allwinner,sun9i-a80-apbs-gates-clk" - for the APBS gates on A80
>  	"allwinner,sun5i-a13-mbus-clk" - for the MBUS clock on A13
>  	"allwinner,sun4i-a10-mmc-clk" - for the MMC clock
>  	"allwinner,sun9i-a80-mmc-clk" - for mmc module clocks on A80
> diff --git a/drivers/clk/sunxi/clk-simple-gates.c b/drivers/clk/sunxi/clk-simple-gates.c
> index 0214c6548afd..c8acc0612c15 100644
> --- a/drivers/clk/sunxi/clk-simple-gates.c
> +++ b/drivers/clk/sunxi/clk-simple-gates.c
> @@ -140,6 +140,8 @@ CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-gates-clk",
>  	       sunxi_simple_gates_init);
>  CLK_OF_DECLARE(sun9i_a80_apb1, "allwinner,sun9i-a80-apb1-gates-clk",
>  	       sunxi_simple_gates_init);
> +CLK_OF_DECLARE(sun9i_a80_apbs, "allwinner,sun9i-a80-apbs-gates-clk",
> +	       sunxi_simple_gates_init);
>  
>  static const int sun4i_a10_ahb_critical_clocks[] __initconst = {
>  	14,	/* ahb_sdram */
> -- 
> 2.6.2
> 
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#1280782

FromMaxime Ripard <maxime.ripard@free-electrons.com>
Date2015-12-01 12:20 +0100
Message-ID<qAR8u-sX-11@gated-at.bofh.it>
In reply to#1280124

[Multipart message — attachments visible in raw view] — view raw

On Mon, Nov 30, 2015 at 11:14:06AM -0600, Rob Herring wrote:
> On Sun, Nov 29, 2015 at 11:03:07AM +0800, Chen-Yu Tsai wrote:
> > This patch adds support for the PRCM apbs clock gates found on the
> > Allwinner A80 SoC.
> > 
> > Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> 
> Acked-by: Rob Herring <robh@kernel.org>

Applied, thanks!

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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