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Re: [PATCH 6/6] MIPS: CPS: drop .set mips64r2 directives

Started byPaul Burton <paul.burton@imgtec.com>
First post2015-09-10 20:10 +0200
Last post2015-09-12 17:20 +0200
Articles 3 — 2 participants

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  Re: [PATCH 6/6] MIPS: CPS: drop .set mips64r2 directives Paul Burton <paul.burton@imgtec.com> - 2015-09-10 20:10 +0200
    Re: [PATCH 6/6] MIPS: CPS: drop .set mips64r2 directives John Crispin <john@phrozen.org> - 2015-09-12 08:40 +0200
      Re: [PATCH 6/6] MIPS: CPS: drop .set mips64r2 directives Paul Burton <paul.burton@imgtec.com> - 2015-09-12 17:20 +0200

#1222340 — Re: [PATCH 6/6] MIPS: CPS: drop .set mips64r2 directives

FromPaul Burton <paul.burton@imgtec.com>
Date2015-09-10 20:10 +0200
SubjectRe: [PATCH 6/6] MIPS: CPS: drop .set mips64r2 directives
Message-ID<q7esi-Fm-9@gated-at.bofh.it>
Ralf: is there a reason you've only applied patch 1 of this series?

v4.2 is broken because these didn't get in (despite being submitted well
before the release), and master is still broken because they still
haven't gotten in. If there's a reason you didn't merge them please let
me know, otherwise please can we get them in ASAP.

Thanks,
    Paul

On Wed, Aug 05, 2015 at 03:42:40PM -0700, Paul Burton wrote:
> Commit 977e043d5ea1 ("MIPS: kernel: cps-vec: Replace mips32r2 ISA level
> with mips64r2") leads to .set mips64r2 directives being present in 32
> bit (ie. CONFIG_32BIT=y) kernels. This is incorrect & leads to MIPS64
> instructions being emitted by the assembler when expanding
> pseudo-instructions. For example the "move" instruction can legitimately
> be expanded to a "daddu". This causes problems when the kernel is run on
> a MIPS32 CPU, as CONFIG_32BIT kernels of course often are...
> 
> Fix this by dropping the .set <ISA> directives entirely now that Kconfig
> should be ensuring that kernels including this code are built with a
> suitable -march= compiler flag.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Markos Chandras <markos.chandras@imgtec.com>
> Cc: <stable@vger.kernel.org> # 3.16+
> ---
> 
>  arch/mips/kernel/cps-vec.S | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
> index 209ded1..763d8b7 100644
> --- a/arch/mips/kernel/cps-vec.S
> +++ b/arch/mips/kernel/cps-vec.S
> @@ -229,7 +229,6 @@ LEAF(mips_cps_core_init)
>  	has_mt	t0, 3f
>  
>  	.set	push
> -	.set	mips64r2
>  	.set	mt
>  
>  	/* Only allow 1 TC per VPE to execute... */
> @@ -348,7 +347,6 @@ LEAF(mips_cps_boot_vpes)
>  	 nop
>  
>  	.set	push
> -	.set	mips64r2
>  	.set	mt
>  
>  1:	/* Enter VPE configuration state */
> -- 
> 2.5.0
> 
--
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#1223326

FromJohn Crispin <john@phrozen.org>
Date2015-09-12 08:40 +0200
Message-ID<q7MDE-YG-9@gated-at.bofh.it>
In reply to#1222340
Hi Paul,

--> http://www.linux-mips.org/archives/linux-mips/2015-09/msg00057.html

	John

On 10/09/2015 20:03, Paul Burton wrote:
> Ralf: is there a reason you've only applied patch 1 of this series?
> 
> v4.2 is broken because these didn't get in (despite being submitted well
> before the release), and master is still broken because they still
> haven't gotten in. If there's a reason you didn't merge them please let
> me know, otherwise please can we get them in ASAP.
> 
> Thanks,
>     Paul
> 
> On Wed, Aug 05, 2015 at 03:42:40PM -0700, Paul Burton wrote:
>> Commit 977e043d5ea1 ("MIPS: kernel: cps-vec: Replace mips32r2 ISA level
>> with mips64r2") leads to .set mips64r2 directives being present in 32
>> bit (ie. CONFIG_32BIT=y) kernels. This is incorrect & leads to MIPS64
>> instructions being emitted by the assembler when expanding
>> pseudo-instructions. For example the "move" instruction can legitimately
>> be expanded to a "daddu". This causes problems when the kernel is run on
>> a MIPS32 CPU, as CONFIG_32BIT kernels of course often are...
>>
>> Fix this by dropping the .set <ISA> directives entirely now that Kconfig
>> should be ensuring that kernels including this code are built with a
>> suitable -march= compiler flag.
>>
>> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
>> Cc: Markos Chandras <markos.chandras@imgtec.com>
>> Cc: <stable@vger.kernel.org> # 3.16+
>> ---
>>
>>  arch/mips/kernel/cps-vec.S | 2 --
>>  1 file changed, 2 deletions(-)
>>
>> diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
>> index 209ded1..763d8b7 100644
>> --- a/arch/mips/kernel/cps-vec.S
>> +++ b/arch/mips/kernel/cps-vec.S
>> @@ -229,7 +229,6 @@ LEAF(mips_cps_core_init)
>>  	has_mt	t0, 3f
>>  
>>  	.set	push
>> -	.set	mips64r2
>>  	.set	mt
>>  
>>  	/* Only allow 1 TC per VPE to execute... */
>> @@ -348,7 +347,6 @@ LEAF(mips_cps_boot_vpes)
>>  	 nop
>>  
>>  	.set	push
>> -	.set	mips64r2
>>  	.set	mt
>>  
>>  1:	/* Enter VPE configuration state */
>> -- 
>> 2.5.0
>>
> 
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#1223420

FromPaul Burton <paul.burton@imgtec.com>
Date2015-09-12 17:20 +0200
Message-ID<q7UKR-4gq-7@gated-at.bofh.it>
In reply to#1223326
Thanks John,

That's fine & understood, it's the month before that when these sat
quietly - through the release of a kernel which they fix a regression in
no less, and despite my having asked Ralf on IRC about them a couple of
weeks before v4.2 was released.

If they just fell off the radar or through the cracks, fine, it happens.
I just want to be sure that regression gets fixed as soon as possible.

Thanks,
    Paul

On Sat, Sep 12, 2015 at 08:13:07AM +0200, John Crispin wrote:
> Hi Paul,
> 
> --> http://www.linux-mips.org/archives/linux-mips/2015-09/msg00057.html
> 
> 	John
> 
> On 10/09/2015 20:03, Paul Burton wrote:
> > Ralf: is there a reason you've only applied patch 1 of this series?
> > 
> > v4.2 is broken because these didn't get in (despite being submitted well
> > before the release), and master is still broken because they still
> > haven't gotten in. If there's a reason you didn't merge them please let
> > me know, otherwise please can we get them in ASAP.
> > 
> > Thanks,
> >     Paul
> > 
> > On Wed, Aug 05, 2015 at 03:42:40PM -0700, Paul Burton wrote:
> >> Commit 977e043d5ea1 ("MIPS: kernel: cps-vec: Replace mips32r2 ISA level
> >> with mips64r2") leads to .set mips64r2 directives being present in 32
> >> bit (ie. CONFIG_32BIT=y) kernels. This is incorrect & leads to MIPS64
> >> instructions being emitted by the assembler when expanding
> >> pseudo-instructions. For example the "move" instruction can legitimately
> >> be expanded to a "daddu". This causes problems when the kernel is run on
> >> a MIPS32 CPU, as CONFIG_32BIT kernels of course often are...
> >>
> >> Fix this by dropping the .set <ISA> directives entirely now that Kconfig
> >> should be ensuring that kernels including this code are built with a
> >> suitable -march= compiler flag.
> >>
> >> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> >> Cc: Markos Chandras <markos.chandras@imgtec.com>
> >> Cc: <stable@vger.kernel.org> # 3.16+
> >> ---
> >>
> >>  arch/mips/kernel/cps-vec.S | 2 --
> >>  1 file changed, 2 deletions(-)
> >>
> >> diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
> >> index 209ded1..763d8b7 100644
> >> --- a/arch/mips/kernel/cps-vec.S
> >> +++ b/arch/mips/kernel/cps-vec.S
> >> @@ -229,7 +229,6 @@ LEAF(mips_cps_core_init)
> >>  	has_mt	t0, 3f
> >>  
> >>  	.set	push
> >> -	.set	mips64r2
> >>  	.set	mt
> >>  
> >>  	/* Only allow 1 TC per VPE to execute... */
> >> @@ -348,7 +347,6 @@ LEAF(mips_cps_boot_vpes)
> >>  	 nop
> >>  
> >>  	.set	push
> >> -	.set	mips64r2
> >>  	.set	mt
> >>  
> >>  1:	/* Enter VPE configuration state */
> >> -- 
> >> 2.5.0
> >>
> > 
--
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