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Groups > linux.kernel > #1219840 > unrolled thread

Raspberry Pi native clock driver

Started byEric Anholt <eric@anholt.net>
First post2015-09-06 20:00 +0200
Last post2015-09-10 23:40 +0200
Articles 7 — 3 participants

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Contents

  Raspberry Pi native clock driver Eric Anholt <eric@anholt.net> - 2015-09-06 20:00 +0200
    [PATCH 1/4] clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers. Eric Anholt <eric@anholt.net> - 2015-09-06 20:00 +0200
      Re: [PATCH 1/4] clk: bcm2835: Move under bcm/ with other Broadcom  SoC clk drivers. Lee Jones <lee@kernel.org> - 2015-09-07 08:50 +0200
        Re: [PATCH 1/4] clk: bcm2835: Move under bcm/ with other Broadcom  SoC clk drivers. Stephen Boyd <sboyd@codeaurora.org> - 2015-09-08 21:30 +0200
    [PATCH 4/4] ARM: bcm2835: Switch to using the new clock driver support. Eric Anholt <eric@anholt.net> - 2015-09-06 20:00 +0200
    [PATCH 2/4] clk: bcm2835: Add binding docs for the new platform clock driver. Eric Anholt <eric@anholt.net> - 2015-09-06 20:00 +0200
    Re: [PATCH 3/4] clk: bcm2835: Add support for programming the audio domain clocks. Eric Anholt <eric@anholt.net> - 2015-09-10 23:40 +0200

#1219840 — Raspberry Pi native clock driver

FromEric Anholt <eric@anholt.net>
Date2015-09-06 20:00 +0200
SubjectRaspberry Pi native clock driver
Message-ID<q5Moq-5ST-9@gated-at.bofh.it>
After my last firmware clocks posting, Gordon at Raspberry Pi pointed
that you can, in fact, touch the clocks from the ARM side.  This is
the driver that resulted from that.  With debug printfs at boot the
clock frequencies from .recalc_rate() are looking good, a few are
definitely corrected compared to our previous fixed clock references,
and I've tested that I can now get different frequencies out of the
pixel clock for the KMS driver.

Gordon and Dom took a look at the code, and while I don't have
explicit Acked-Bys, they thought it seemed pretty sound as far as the
hardware goes.  We'll want to sort out eventually who really owns
which clocks between the firmware and Linux, but for now this at least
gets us corrected frequency information on the Linux side.

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#1219841 — [PATCH 1/4] clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.

FromEric Anholt <eric@anholt.net>
Date2015-09-06 20:00 +0200
Subject[PATCH 1/4] clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
Message-ID<q5Moq-5ST-7@gated-at.bofh.it>
In reply to#1219840
clk-bcm2835.c predates the drivers under bcm/, but all the new BCM
drivers are going in there so let's follow them.

Signed-off-by: Eric Anholt <eric@anholt.net>
---
 drivers/clk/Makefile          |  1 -
 drivers/clk/bcm/Makefile      |  1 +
 drivers/clk/bcm/clk-bcm2835.c | 60 +++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/clk-bcm2835.c     | 60 -------------------------------------------
 4 files changed, 61 insertions(+), 61 deletions(-)
 create mode 100644 drivers/clk/bcm/clk-bcm2835.c
 delete mode 100644 drivers/clk/clk-bcm2835.c

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index c4cf075..1bdbe9b 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -19,7 +19,6 @@ endif
 obj-$(CONFIG_MACH_ASM9260)		+= clk-asm9260.o
 obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN)	+= clk-axi-clkgen.o
 obj-$(CONFIG_ARCH_AXXIA)		+= clk-axm5516.o
-obj-$(CONFIG_ARCH_BCM2835)		+= clk-bcm2835.o
 obj-$(CONFIG_COMMON_CLK_CDCE706)	+= clk-cdce706.o
 obj-$(CONFIG_ARCH_CLPS711X)		+= clk-clps711x.o
 obj-$(CONFIG_ARCH_EFM32)		+= clk-efm32gg.o
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 8a7a477..ee2349b 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -3,4 +3,5 @@ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-kona-setup.o
 obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o
 obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
 obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
+obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
 obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
new file mode 100644
index 0000000..6b950ca
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2010 Broadcom
+ * Copyright (C) 2012 Stephen Warren
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/bcm2835.h>
+#include <linux/of.h>
+
+/*
+ * These are fixed clocks. They're probably not all root clocks and it may
+ * be possible to turn them on and off but until this is mapped out better
+ * it's the only way they can be used.
+ */
+void __init bcm2835_init_clocks(void)
+{
+	struct clk *clk;
+	int ret;
+
+	clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT,
+					250000000);
+	if (IS_ERR(clk))
+		pr_err("sys_pclk not registered\n");
+
+	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT,
+					126000000);
+	if (IS_ERR(clk))
+		pr_err("apb_pclk not registered\n");
+
+	clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT,
+					3000000);
+	if (IS_ERR(clk))
+		pr_err("uart0_pclk not registered\n");
+	ret = clk_register_clkdev(clk, NULL, "20201000.uart");
+	if (ret)
+		pr_err("uart0_pclk alias not registered\n");
+
+	clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT,
+					125000000);
+	if (IS_ERR(clk))
+		pr_err("uart1_pclk not registered\n");
+	ret = clk_register_clkdev(clk, NULL, "20215000.uart");
+	if (ret)
+		pr_err("uart1_pclk alias not registered\n");
+}
diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
deleted file mode 100644
index 6b950ca..0000000
--- a/drivers/clk/clk-bcm2835.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright (C) 2010 Broadcom
- * Copyright (C) 2012 Stephen Warren
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#include <linux/clk-provider.h>
-#include <linux/clkdev.h>
-#include <linux/clk/bcm2835.h>
-#include <linux/of.h>
-
-/*
- * These are fixed clocks. They're probably not all root clocks and it may
- * be possible to turn them on and off but until this is mapped out better
- * it's the only way they can be used.
- */
-void __init bcm2835_init_clocks(void)
-{
-	struct clk *clk;
-	int ret;
-
-	clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT,
-					250000000);
-	if (IS_ERR(clk))
-		pr_err("sys_pclk not registered\n");
-
-	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT,
-					126000000);
-	if (IS_ERR(clk))
-		pr_err("apb_pclk not registered\n");
-
-	clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT,
-					3000000);
-	if (IS_ERR(clk))
-		pr_err("uart0_pclk not registered\n");
-	ret = clk_register_clkdev(clk, NULL, "20201000.uart");
-	if (ret)
-		pr_err("uart0_pclk alias not registered\n");
-
-	clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT,
-					125000000);
-	if (IS_ERR(clk))
-		pr_err("uart1_pclk not registered\n");
-	ret = clk_register_clkdev(clk, NULL, "20215000.uart");
-	if (ret)
-		pr_err("uart1_pclk alias not registered\n");
-}
-- 
2.1.4

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#1219953 — Re: [PATCH 1/4] clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.

FromLee Jones <lee@kernel.org>
Date2015-09-07 08:50 +0200
SubjectRe: [PATCH 1/4] clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
Message-ID<q5YpA-6fh-23@gated-at.bofh.it>
In reply to#1219841
On Sun, 06 Sep 2015, Eric Anholt wrote:

> clk-bcm2835.c predates the drivers under bcm/, but all the new BCM
> drivers are going in there so let's follow them.
> 
> Signed-off-by: Eric Anholt <eric@anholt.net>
> ---
>  drivers/clk/Makefile          |  1 -
>  drivers/clk/bcm/Makefile      |  1 +
>  drivers/clk/bcm/clk-bcm2835.c | 60 +++++++++++++++++++++++++++++++++++++++++++
>  drivers/clk/clk-bcm2835.c     | 60 -------------------------------------------

You need to resubmit this with `git format-patch -M`.

>  4 files changed, 61 insertions(+), 61 deletions(-)
>  create mode 100644 drivers/clk/bcm/clk-bcm2835.c
>  delete mode 100644 drivers/clk/clk-bcm2835.c
> 
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index c4cf075..1bdbe9b 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -19,7 +19,6 @@ endif
>  obj-$(CONFIG_MACH_ASM9260)		+= clk-asm9260.o
>  obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN)	+= clk-axi-clkgen.o
>  obj-$(CONFIG_ARCH_AXXIA)		+= clk-axm5516.o
> -obj-$(CONFIG_ARCH_BCM2835)		+= clk-bcm2835.o
>  obj-$(CONFIG_COMMON_CLK_CDCE706)	+= clk-cdce706.o
>  obj-$(CONFIG_ARCH_CLPS711X)		+= clk-clps711x.o
>  obj-$(CONFIG_ARCH_EFM32)		+= clk-efm32gg.o
> diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
> index 8a7a477..ee2349b 100644
> --- a/drivers/clk/bcm/Makefile
> +++ b/drivers/clk/bcm/Makefile
> @@ -3,4 +3,5 @@ obj-$(CONFIG_CLK_BCM_KONA)	+= clk-kona-setup.o
>  obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o
>  obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
>  obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
> +obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
>  obj-$(CONFIG_ARCH_BCM_CYGNUS)	+= clk-cygnus.o
> diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
> new file mode 100644
> index 0000000..6b950ca
> --- /dev/null
> +++ b/drivers/clk/bcm/clk-bcm2835.c
> @@ -0,0 +1,60 @@
> +/*
> + * Copyright (C) 2010 Broadcom
> + * Copyright (C) 2012 Stephen Warren
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/clkdev.h>
> +#include <linux/clk/bcm2835.h>
> +#include <linux/of.h>
> +
> +/*
> + * These are fixed clocks. They're probably not all root clocks and it may
> + * be possible to turn them on and off but until this is mapped out better
> + * it's the only way they can be used.
> + */
> +void __init bcm2835_init_clocks(void)
> +{
> +	struct clk *clk;
> +	int ret;
> +
> +	clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT,
> +					250000000);
> +	if (IS_ERR(clk))
> +		pr_err("sys_pclk not registered\n");
> +
> +	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT,
> +					126000000);
> +	if (IS_ERR(clk))
> +		pr_err("apb_pclk not registered\n");
> +
> +	clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT,
> +					3000000);
> +	if (IS_ERR(clk))
> +		pr_err("uart0_pclk not registered\n");
> +	ret = clk_register_clkdev(clk, NULL, "20201000.uart");
> +	if (ret)
> +		pr_err("uart0_pclk alias not registered\n");
> +
> +	clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT,
> +					125000000);
> +	if (IS_ERR(clk))
> +		pr_err("uart1_pclk not registered\n");
> +	ret = clk_register_clkdev(clk, NULL, "20215000.uart");
> +	if (ret)
> +		pr_err("uart1_pclk alias not registered\n");
> +}
> diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c
> deleted file mode 100644
> index 6b950ca..0000000
> --- a/drivers/clk/clk-bcm2835.c
> +++ /dev/null
> @@ -1,60 +0,0 @@
> -/*
> - * Copyright (C) 2010 Broadcom
> - * Copyright (C) 2012 Stephen Warren
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> - * GNU General Public License for more details.
> - *
> - * You should have received a copy of the GNU General Public License
> - * along with this program; if not, write to the Free Software
> - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
> - */
> -
> -#include <linux/clk-provider.h>
> -#include <linux/clkdev.h>
> -#include <linux/clk/bcm2835.h>
> -#include <linux/of.h>
> -
> -/*
> - * These are fixed clocks. They're probably not all root clocks and it may
> - * be possible to turn them on and off but until this is mapped out better
> - * it's the only way they can be used.
> - */
> -void __init bcm2835_init_clocks(void)
> -{
> -	struct clk *clk;
> -	int ret;
> -
> -	clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT,
> -					250000000);
> -	if (IS_ERR(clk))
> -		pr_err("sys_pclk not registered\n");
> -
> -	clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT,
> -					126000000);
> -	if (IS_ERR(clk))
> -		pr_err("apb_pclk not registered\n");
> -
> -	clk = clk_register_fixed_rate(NULL, "uart0_pclk", NULL, CLK_IS_ROOT,
> -					3000000);
> -	if (IS_ERR(clk))
> -		pr_err("uart0_pclk not registered\n");
> -	ret = clk_register_clkdev(clk, NULL, "20201000.uart");
> -	if (ret)
> -		pr_err("uart0_pclk alias not registered\n");
> -
> -	clk = clk_register_fixed_rate(NULL, "uart1_pclk", NULL, CLK_IS_ROOT,
> -					125000000);
> -	if (IS_ERR(clk))
> -		pr_err("uart1_pclk not registered\n");
> -	ret = clk_register_clkdev(clk, NULL, "20215000.uart");
> -	if (ret)
> -		pr_err("uart1_pclk alias not registered\n");
> -}
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#1221051 — Re: [PATCH 1/4] clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.

FromStephen Boyd <sboyd@codeaurora.org>
Date2015-09-08 21:30 +0200
SubjectRe: [PATCH 1/4] clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
Message-ID<q6wKC-5c4-19@gated-at.bofh.it>
In reply to#1219953
On 09/07, Lee Jones wrote:
> On Sun, 06 Sep 2015, Eric Anholt wrote:
> 
> > clk-bcm2835.c predates the drivers under bcm/, but all the new BCM
> > drivers are going in there so let's follow them.
> > 
> > Signed-off-by: Eric Anholt <eric@anholt.net>
> > ---
> >  drivers/clk/Makefile          |  1 -
> >  drivers/clk/bcm/Makefile      |  1 +
> >  drivers/clk/bcm/clk-bcm2835.c | 60 +++++++++++++++++++++++++++++++++++++++++++
> >  drivers/clk/clk-bcm2835.c     | 60 -------------------------------------------
> 
> You need to resubmit this with `git format-patch -M`.

You don't have to. It would have been nice if it was formatted
with -M so that review is easier, but we can always apply the
patch and then check the result to make sure things look the
same.

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#1219842 — [PATCH 4/4] ARM: bcm2835: Switch to using the new clock driver support.

FromEric Anholt <eric@anholt.net>
Date2015-09-06 20:00 +0200
Subject[PATCH 4/4] ARM: bcm2835: Switch to using the new clock driver support.
Message-ID<q5Moq-5ST-11@gated-at.bofh.it>
In reply to#1219840
This will give us the ability to set the pixel and HDMI state machine
clocks for the VC4 KMS driver, change the CPU frequency, and
potentially gate clocks in the future (once we also write a power
domain driver).  It also gives the uart an explicit clock reference,
so that we don't need to change the physical addresses of the old
fixed clk_bcm2835.c clocks for Raspberry Pi 2 port.

Two clocks get their frequencies updated as a result of this.  One is
uart's apb_pclk, which was previously accidentally grabbing the fixed
uart0_pclk due to the apb_pclk not having clk_register_clkdev()
called.  The uart doesn't seem to do anything with apb_pclk other than
make sure it's on, so that appears safe (also, as far as I can see,
the apb clock is actually the same as the VPU clock).  The other is
EMMC, which according to the docs was supposed to be in the 50-100Mhz
range, but it turns out the firmware needed to change to running it at
the 250Mhz core clock speed to avoid a bug in clock domain crossing.

Additionally, anything using BCM2835_CLOCK_VPU will now have a correct
clock rate if the user configures the boot-time core clock speed using
config.txt.

Signed-off-by: Eric Anholt <eric@anholt.net>
---
 arch/arm/boot/dts/bcm2835.dtsi | 52 +++++++++++++++++++++++-------------------
 1 file changed, 28 insertions(+), 24 deletions(-)

diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 301c73f..a6a55b7 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -1,4 +1,5 @@
 #include <dt-bindings/pinctrl/bcm2835.h>
+#include <dt-bindings/clock/bcm2835.h>
 #include "skeleton.dtsi"
 
 / {
@@ -21,6 +22,10 @@
 			compatible = "brcm,bcm2835-system-timer";
 			reg = <0x7e003000 0x1000>;
 			interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
+			/* This could be a reference to BCM2835_CLOCK_TIMER,
+			 * but we don't have the driver using the common clock
+			 * support yet.
+			 */
 			clock-frequency = <1000000>;
 		};
 
@@ -57,6 +62,17 @@
 			reg = <0x7e100000 0x28>;
 		};
 
+		clocks: cprman@7e101000 {
+			compatible = "brcm,bcm2835-cprman";
+			#clock-cells = <1>;
+			reg = <0x7e101000 0x2000>;
+
+			/* CPRMAN derives everything from the platform's
+			 * oscillator.
+			 */
+			clocks = <&clk_osc>;
+		};
+
 		rng@7e104000 {
 			compatible = "brcm,bcm2835-rng";
 			reg = <0x7e104000 0x10>;
@@ -96,7 +112,9 @@
 			compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
 			reg = <0x7e201000 0x1000>;
 			interrupts = <2 25>;
-			clock-frequency = <3000000>;
+			clocks = <&clocks BCM2835_CLOCK_UART>,
+				 <&clocks BCM2835_CLOCK_VPU>;
+			clock-names = "uartclk", "apb_pclk";
 			arm,primecell-periphid = <0x00241011>;
 		};
 
@@ -115,7 +133,7 @@
 			compatible = "brcm,bcm2835-spi";
 			reg = <0x7e204000 0x1000>;
 			interrupts = <2 22>;
-			clocks = <&clk_spi>;
+			clocks = <&clocks BCM2835_CLOCK_VPU>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -125,7 +143,7 @@
 			compatible = "brcm,bcm2835-i2c";
 			reg = <0x7e205000 0x1000>;
 			interrupts = <2 21>;
-			clocks = <&clk_i2c>;
+			clocks = <&clocks BCM2835_CLOCK_VPU>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -135,7 +153,7 @@
 			compatible = "brcm,bcm2835-sdhci";
 			reg = <0x7e300000 0x100>;
 			interrupts = <2 30>;
-			clocks = <&clk_mmc>;
+			clocks = <&clocks BCM2835_CLOCK_EMMC>;
 			status = "disabled";
 		};
 
@@ -143,7 +161,7 @@
 			compatible = "brcm,bcm2835-i2c";
 			reg = <0x7e804000 0x1000>;
 			interrupts = <2 21>;
-			clocks = <&clk_i2c>;
+			clocks = <&clocks BCM2835_CLOCK_VPU>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -165,28 +183,14 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		clk_mmc: clock@0 {
-			compatible = "fixed-clock";
-			reg = <0>;
-			#clock-cells = <0>;
-			clock-output-names = "mmc";
-			clock-frequency = <100000000>;
-		};
-
-		clk_i2c: clock@1 {
+		/* The oscillator is the root of the clock tree. */
+		clk_osc: clock@3 {
 			compatible = "fixed-clock";
-			reg = <1>;
+			reg = <3>;
 			#clock-cells = <0>;
-			clock-output-names = "i2c";
-			clock-frequency = <250000000>;
+			clock-output-names = "osc";
+			clock-frequency = <19200000>;
 		};
 
-		clk_spi: clock@2 {
-			compatible = "fixed-clock";
-			reg = <2>;
-			#clock-cells = <0>;
-			clock-output-names = "spi";
-			clock-frequency = <250000000>;
-		};
 	};
 };
-- 
2.1.4

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#1219843 — [PATCH 2/4] clk: bcm2835: Add binding docs for the new platform clock driver.

FromEric Anholt <eric@anholt.net>
Date2015-09-06 20:00 +0200
Subject[PATCH 2/4] clk: bcm2835: Add binding docs for the new platform clock driver.
Message-ID<q5Moq-5ST-19@gated-at.bofh.it>
In reply to#1219840
Previously we've only supported a few fixed clocks based on
assumptions about how the firmware sets up the clocks, but this
binding will let us control the actual (audio power domain) clock
manager.

Signed-off-by: Eric Anholt <eric@anholt.net>
---
 .../bindings/clock/brcm,bcm2835-cprman.txt         | 45 +++++++++++++++++++++
 include/dt-bindings/clock/bcm2835.h                | 47 ++++++++++++++++++++++
 2 files changed, 92 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
 create mode 100644 include/dt-bindings/clock/bcm2835.h

diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
new file mode 100644
index 0000000..e56a1df
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
@@ -0,0 +1,45 @@
+Broadcom BCM2835 CPRMAN clocks
+
+This binding uses the common clock binding:
+    Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+The CPRMAN clock controller generates clocks in the audio power domain
+of the BCM2835.  There is a level of PLLs deriving from an external
+oscillator, a level of PLL dividers that produce channels off of the
+few PLLs, and a level of mostly-generic clock generators sourcing from
+the PLL channels.  Most other hardware components source from the
+clock generators, but a few (like the ARM or HDMI) will source from
+the PLL dividers directly.
+
+Required properties:
+- compatible:	Should be "brcm,bcm2835-cprman"
+- #clock-cells:	Should be <1>. The permitted clock-specifier values can be
+		  found in include/dt-bindings/clock/bcm2835.h
+- reg:		Specifies base physical address and size of the registers
+- clocks:	The external oscillator clock phandle
+
+Example:
+
+	clk_osc: clock@3 {
+		compatible = "fixed-clock";
+		reg = <3>;
+		#clock-cells = <0>;
+		clock-output-names = "osc";
+		clock-frequency = <19200000>;
+	};
+
+	clocks: cprman@7e101000 {
+		compatible = "brcm,bcm2835-cprman";
+		#clock-cells = <1>;
+		reg = <0x7e101000 0x2000>;
+		clocks = <&clk_osc>;
+	};
+
+	i2c0: i2c@7e205000 {
+		compatible = "brcm,bcm2835-i2c";
+		reg = <0x7e205000 0x1000>;
+		interrupts = <2 21>;
+		clocks = <&clocks BCM2835_CLOCK_VPU>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
diff --git a/include/dt-bindings/clock/bcm2835.h b/include/dt-bindings/clock/bcm2835.h
new file mode 100644
index 0000000..d323efa
--- /dev/null
+++ b/include/dt-bindings/clock/bcm2835.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2015 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define BCM2835_PLLA			0
+#define BCM2835_PLLB			1
+#define BCM2835_PLLC			2
+#define BCM2835_PLLD			3
+#define BCM2835_PLLH			4
+
+#define BCM2835_PLLA_CORE		5
+#define BCM2835_PLLA_PER		6
+#define BCM2835_PLLB_ARM		7
+#define BCM2835_PLLC_CORE0		8
+#define BCM2835_PLLC_CORE1		9
+#define BCM2835_PLLC_CORE2		10
+#define BCM2835_PLLC_PER		11
+#define BCM2835_PLLD_CORE		12
+#define BCM2835_PLLD_PER		13
+#define BCM2835_PLLH_RCAL		14
+#define BCM2835_PLLH_AUX		15
+#define BCM2835_PLLH_PIX		16
+
+#define BCM2835_CLOCK_TIMER		17
+#define BCM2835_CLOCK_OTP		18
+#define BCM2835_CLOCK_UART		19
+#define BCM2835_CLOCK_VPU		20
+#define BCM2835_CLOCK_V3D		21
+#define BCM2835_CLOCK_ISP		22
+#define BCM2835_CLOCK_H264		23
+#define BCM2835_CLOCK_VEC		24
+#define BCM2835_CLOCK_HSM		25
+#define BCM2835_CLOCK_SDRAM		26
+#define BCM2835_CLOCK_TSENS		27
+#define BCM2835_CLOCK_EMMC		28
+#define BCM2835_CLOCK_PERI_IMAGE	29
+
+#define BCM2835_CLOCK_COUNT		30
-- 
2.1.4

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#1222400 — Re: [PATCH 3/4] clk: bcm2835: Add support for programming the audio domain clocks.

FromEric Anholt <eric@anholt.net>
Date2015-09-10 23:40 +0200
SubjectRe: [PATCH 3/4] clk: bcm2835: Add support for programming the audio domain clocks.
Message-ID<q7hJw-5u2-19@gated-at.bofh.it>
In reply to#1219840

[Multipart message — attachments visible in raw view] — view raw

Eric Anholt <eric@anholt.net> writes:

> This adds support for enabling, disabling, and setting the rate of the
> audio domain clocks.  It will be necessary for setting the pixel clock
> for HDMI in the VC4 driver and let us write a cpufreq driver.  It will
> also improve compatibility with user changes to the firmware's
> config.txt, since our previous fixed clocks are unaware of it.
>
> The firmware also has support for configuring the clocks through the
> mailbox channel, but the pixel clock setup by the firmware doesn't
> work, and it's Raspberry Pi specific anyway.  The only conflicts we
> should have with the firmware would be if we made firmware calls that
> result in clock management (like opening firmware V3D or ISP access,
> which we don't support in upstream), or on hardware over-thermal or
> under-voltage (when the firmware would rewrite PLLB to take the ARM
> out of overclock).  If that happens, our cached .recalc_rate() results
> would be incorrect, but that's no worse than our current state where
> we used fixed clocks.
>
> The existing fixed clocks in the code are left in place to provide
> backwards compatibility with old device tree files.
>
> Signed-off-by: Eric Anholt <eric@anholt.net>
> ---

> +	onecell->clk_num = BCM2835_CLOCK_COUNT;
> +	onecell->clks = kzalloc(sizeof(*onecell->clks), GFP_KERNEL);

Review of another clock driver I wrote pointed out that I missed the
multiply by BCM2835_CLOCK_COUNT here.  I'll send an updated version.

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