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Re: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe

Started byMark Brown <broonie@kernel.org>
First post2015-09-03 14:20 +0200
Last post2015-09-04 17:50 +0200
Articles 4 — 2 participants

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  Re: [LINUX RFC v2 1/4] spi: add support of two chip selects & data  stripe Mark Brown <broonie@kernel.org> - 2015-09-03 14:20 +0200
    Re: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe Martin Sperl <martin@sperl.org> - 2015-09-04 14:40 +0200
      Re: [LINUX RFC v2 1/4] spi: add support of two chip selects & data  stripe Mark Brown <broonie@kernel.org> - 2015-09-04 17:40 +0200
        Re: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe Martin Sperl <martin@sperl.org> - 2015-09-04 17:50 +0200

#1218213 — Re: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe

FromMark Brown <broonie@kernel.org>
Date2015-09-03 14:20 +0200
SubjectRe: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe
Message-ID<q4BEM-3hX-49@gated-at.bofh.it>

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On Wed, Aug 26, 2015 at 11:56:04AM +0530, Ranjit Waghmode wrote:

> To support dual parallel mode operation of ZynqMP GQSPI controller
> following API's are added inside the core:

As covered in SubmittingPatches please try to make each patch a single
change rather than having multiple separate changes in one commit.

> +	/* Controller may support more than one chip.
> +	 * This flag will enable that feature.
> +	 */
> +#define SPI_MASTER_BOTH_CS		BIT(8)		/* enable both chips */

This isn't saying that the controller supports more than one chip, it's
saying that the controller supports asserting more than one chip select
at once which isn't the same thing.  I'm also not entirely sure that
this makes sense as a separate feature to the data striping one - I'm
struggling to think of a way to use this sensibly separately to that.

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#1218894 — Re: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe

FromMartin Sperl <martin@sperl.org>
Date2015-09-04 14:40 +0200
SubjectRe: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe
Message-ID<q4YrE-292-9@gated-at.bofh.it>
In reply to#1218213
> On 03.09.2015, at 14:12, Mark Brown <broonie@kernel.org> wrote:
> 
> On Wed, Aug 26, 2015 at 11:56:04AM +0530, Ranjit Waghmode wrote:
> 
>> To support dual parallel mode operation of ZynqMP GQSPI controller
>> following API's are added inside the core:
> 
> As covered in SubmittingPatches please try to make each patch a single
> change rather than having multiple separate changes in one commit.
> 
>> +	/* Controller may support more than one chip.
>> +	 * This flag will enable that feature.
>> +	 */
>> +#define SPI_MASTER_BOTH_CS		BIT(8)		/* enable both chips */
> 
> This isn't saying that the controller supports more than one chip, it's
> saying that the controller supports asserting more than one chip select
> at once which isn't the same thing.  I'm also not entirely sure that
> this makes sense as a separate feature to the data striping one - I'm
> struggling to think of a way to use this sensibly separately to that.

Well - there is one use-case that I can think of:
fbtft has the requirement for some devices to control a GPIO to
differentiate between command and data getting transferred
- sort of 9 bit.

Right now it is done outside of spi in the fbtft driver itself wrapping
spi_sync().

Similarly a “hold” line on an eeprom or similar could get (de)asserted
without requiring holding a spi-bus-lock.

But then the current patch would not allow this kind of “generic”
use-case.

Martin


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#1219121

FromMark Brown <broonie@kernel.org>
Date2015-09-04 17:40 +0200
Message-ID<q51fP-6d7-7@gated-at.bofh.it>
In reply to#1218894

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On Fri, Sep 04, 2015 at 02:35:52PM +0200, Martin Sperl wrote:
> > On 03.09.2015, at 14:12, Mark Brown <broonie@kernel.org> wrote:

> > This isn't saying that the controller supports more than one chip, it's
> > saying that the controller supports asserting more than one chip select
> > at once which isn't the same thing.  I'm also not entirely sure that
> > this makes sense as a separate feature to the data striping one - I'm
> > struggling to think of a way to use this sensibly separately to that.

> Well - there is one use-case that I can think of:
> fbtft has the requirement for some devices to control a GPIO to
> differentiate between command and data getting transferred
> - sort of 9 bit.

That's another thing again, isn't it?  It's one device switching between
two different control interfaces at runtime rather than two devices
controlled in lockstep.

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#1219130 — Re: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe

FromMartin Sperl <martin@sperl.org>
Date2015-09-04 17:50 +0200
SubjectRe: [LINUX RFC v2 1/4] spi: add support of two chip selects & data stripe
Message-ID<q51pw-6oq-13@gated-at.bofh.it>
In reply to#1219121
> On 04.09.2015, at 17:37, Mark Brown <broonie@kernel.org> wrote:
> 
> On Fri, Sep 04, 2015 at 02:35:52PM +0200, Martin Sperl wrote:
>>> On 03.09.2015, at 14:12, Mark Brown <broonie@kernel.org> wrote:
> 
>>> This isn't saying that the controller supports more than one chip, it's
>>> saying that the controller supports asserting more than one chip select
>>> at once which isn't the same thing.  I'm also not entirely sure that
>>> this makes sense as a separate feature to the data striping one - I'm
>>> struggling to think of a way to use this sensibly separately to that.
> 
>> Well - there is one use-case that I can think of:
>> fbtft has the requirement for some devices to control a GPIO to
>> differentiate between command and data getting transferred
>> - sort of 9 bit.
> 
> That's another thing again, isn't it?  It's one device switching between
> two different control interfaces at runtime rather than two devices
> controlled in lockstep.

I agree, but there may be a solution that can handle both, so I wanted
to mention it.
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