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| Started by | Gabriel Fernandez <gabriel.fernandez@linaro.org> |
|---|---|
| First post | 2015-08-24 11:50 +0200 |
| Last post | 2015-08-24 11:50 +0200 |
| Articles | 1 — 1 participant |
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[PATCH v2 4/4] ARM: STi: DT: Add support for stih418 A9 pll Gabriel Fernandez <gabriel.fernandez@linaro.org> - 2015-08-24 11:50 +0200
| From | Gabriel Fernandez <gabriel.fernandez@linaro.org> |
|---|---|
| Date | 2015-08-24 11:50 +0200 |
| Subject | [PATCH v2 4/4] ARM: STi: DT: Add support for stih418 A9 pll |
| Message-ID | <q0Wy5-3WH-1@gated-at.bofh.it> |
Add support for new PLL-type for stih418 A9-PLL.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
---
arch/arm/boot/dts/stih418-clock.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi
index 148e177..ae6d997 100644
--- a/arch/arm/boot/dts/stih418-clock.dtsi
+++ b/arch/arm/boot/dts/stih418-clock.dtsi
@@ -44,7 +44,7 @@
clockgen_a9_pll: clockgen-a9-pll {
#clock-cells = <1>;
- compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32";
+ compatible = "st,stih418-plls-c28-a9", "st,clkgen-plls-c32";
clocks = <&clk_sysin>;
--
1.9.1
--
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