Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1210237 > unrolled thread

Re: [PATCH] [PATCH v4] mtd:spi-nor: Add Altera Quad SPI Driver

Back to article view | Back to linux.kernel

Contents

  Re: [PATCH] [PATCH v4] mtd:spi-nor: Add Altera Quad SPI Driver Viet Nga Dao <vndao@altera.com> - 2015-08-20 09:40 +0200
    Re: [PATCH] [PATCH v4] mtd:spi-nor: Add Altera Quad SPI Driver Viet Nga Dao <vndao@altera.com> - 2015-08-20 09:40 +0200
      Re: [PATCH] [PATCH v4] mtd:spi-nor: Add Altera Quad SPI Driver Marek Vasut <marex@denx.de> - 2015-08-20 10:10 +0200
        Re: [PATCH] [PATCH v4] mtd:spi-nor: Add Altera Quad SPI Driver Viet Nga Dao <vndao@altera.com> - 2015-08-20 10:10 +0200
          Re: [PATCH] [PATCH v4] mtd:spi-nor: Add Altera Quad SPI Driver Marek Vasut <marex@denx.de> - 2015-08-20 11:10 +0200

#1210237 — Re: [PATCH] [PATCH v4] mtd:spi-nor: Add Altera Quad SPI Driver

On Tue, Aug 18, 2015 at 2:55 PM, Viet Nga Dao <vndao@altera.com> wrote:
>
>
> -----Original Message-----
> From: marex@denx.de
> Sent: Tuesday, August 18, 2015 9:33 AM
> To: Brian Norris
> Cc: linux-mtd@lists.infradead.org; Viet Nga Dao; devicetree@vger.kernel.org; Rafa?? Mi??ecki; linux-kernel@vger.kernel.org; David Woodhouse; Graham Moore
> Subject: Re: [PATCH] [PATCH v4] mtd:spi-nor: Add Altera Quad SPI Driver
>
> On Tuesday, August 18, 2015 at 03:24:44 AM, Brian Norris wrote:
>> I'm not very helpful here, so hopefully Viet can be of more use:
>
> Yup :)
>
>> On Mon, Aug 17, 2015 at 07:53:23PM +0200, Marek Vasut wrote:
>> > On Monday, August 17, 2015 at 06:03:38 PM, Brian Norris wrote:
>> > Also, I cannot find any documentation for this IP block even if I
>> > search through Quartus/QSys, is there any proper documentation
>> > available anywhere?
>>
>> I never found proper documentation, but I didn't look too hard. I've
>> mostly been going off of Viet's comments and code.
>
> Me neither, and I looked through the altera stuff in fact. I'm trying to learn whether this is just an Soft IP, in which case it certainly can be fixed ; or if there is actually some chip shipping with this crap synthesised into actual silicon.
>
>> But FWIW, I did find some relevant info for the peculiar Altera EPCQ
>> flash here:
>>
>> https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/litera
>> ture/
>> hb/cfg/cfg_cf52012.pdf
>
> Altera EPCS/EPCQ flashes are just rebranded micron flashes, they just have different JEDEC >ID and are a bit more expensive.

You can find the document at here
(https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_embedded_ip.pdf)
 Chapter 42.Page 407.

For the soft IP issue, i've requested hardware engineer to come out
the solution. So in the mean way, our driver will NOT support Micron
flashes until hardware fix is completed.

Hence, i just submitted version 5 for this driver with eliminating
micron device support. Hope this version will get ACKed by you.

Thanks,
Viet Nga
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[toc] | [next] | [standalone]

#1210238

Hi,
>> On Tuesday, August 18, 2015 at 03:24:44 AM, Brian Norris wrote:
>>> I'm not very helpful here, so hopefully Viet can be of more use:
>>
>> Yup :)
>>
>>> On Mon, Aug 17, 2015 at 07:53:23PM +0200, Marek Vasut wrote:
>>> > On Monday, August 17, 2015 at 06:03:38 PM, Brian Norris wrote:
>>> > Also, I cannot find any documentation for this IP block even if I
>>> > search through Quartus/QSys, is there any proper documentation
>>> > available anywhere?
>>>
>>> I never found proper documentation, but I didn't look too hard. I've
>>> mostly been going off of Viet's comments and code.
>>
>> Me neither, and I looked through the altera stuff in fact. I'm trying to learn whether this is just an Soft IP, in which case it certainly can be fixed ; or if there is actually some chip shipping with this crap synthesised into actual silicon.
>>
>>> But FWIW, I did find some relevant info for the peculiar Altera EPCQ
>>> flash here:
>>>
>>> https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/litera
>>> ture/
>>> hb/cfg/cfg_cf52012.pdf
>>
>> Altera EPCS/EPCQ flashes are just rebranded micron flashes, they just have different JEDEC >ID and are a bit more expensive.
>
> You can find the document at here
> (https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_embedded_ip.pdf)
>  Chapter 42.Page 407.
>
> For the soft IP issue, i've requested hardware engineer to come out
> the solution. So in the mean way, our driver will NOT support Micron
> flashes until hardware fix is completed.
>
> Hence, i just submitted version 5 for this driver with eliminating
> micron device support. Hope this version will get ACKed by you.
>
> Thanks,
> Viet Nga
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[toc] | [prev] | [next] | [standalone]

#1210258

On Thursday, August 20, 2015 at 09:37:33 AM, Viet Nga Dao wrote:
> Hi,

Hi,

> >> On Tuesday, August 18, 2015 at 03:24:44 AM, Brian Norris wrote:
> >>> I'm not very helpful here, so hopefully Viet can be of more use:
> >> Yup :)
> >> 
> >>> On Mon, Aug 17, 2015 at 07:53:23PM +0200, Marek Vasut wrote:
> >>> > On Monday, August 17, 2015 at 06:03:38 PM, Brian Norris wrote:
> >>> > Also, I cannot find any documentation for this IP block even if I
> >>> > search through Quartus/QSys, is there any proper documentation
> >>> > available anywhere?
> >>> 
> >>> I never found proper documentation, but I didn't look too hard. I've
> >>> mostly been going off of Viet's comments and code.
> >> 
> >> Me neither, and I looked through the altera stuff in fact. I'm trying to
> >> learn whether this is just an Soft IP, in which case it certainly can
> >> be fixed ; or if there is actually some chip shipping with this crap
> >> synthesised into actual silicon.
> >> 
> >>> But FWIW, I did find some relevant info for the peculiar Altera EPCQ
> >>> flash here:
> >>> 
> >>> https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/litera
> >>> ture/
> >>> hb/cfg/cfg_cf52012.pdf
> >> 
> >> Altera EPCS/EPCQ flashes are just rebranded micron flashes, they just
> >> have different JEDEC >ID and are a bit more expensive.
> > 
> > You can find the document at here
> > (https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literatu
> > re/ug/ug_embedded_ip.pdf)
> > 
> >  Chapter 42.Page 407.
> > 
> > For the soft IP issue, i've requested hardware engineer to come out
> > the solution.

That's good :)

> > So in the mean way, our driver will NOT support Micron
> > flashes until hardware fix is completed.

This doesn't answer my question, so let me reiterate. Is this controller
only Soft IP (as in, FPGA core) or is this controller shipping in some
chip as Hard IP (as in, piece of silicon) ?

> > Hence, i just submitted version 5 for this driver with eliminating
> > micron device support. Hope this version will get ACKed by you.

We'll see.

Best regards,
Marek Vasut
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[toc] | [prev] | [next] | [standalone]

#1210259

On Thu, Aug 20, 2015 at 3:55 PM, Marek Vasut <marex@denx.de> wrote:
> On Thursday, August 20, 2015 at 09:37:33 AM, Viet Nga Dao wrote:
>> Hi,
>
> Hi,
>
>> >> On Tuesday, August 18, 2015 at 03:24:44 AM, Brian Norris wrote:
>> >>> I'm not very helpful here, so hopefully Viet can be of more use:
>> >> Yup :)
>> >>
>> >>> On Mon, Aug 17, 2015 at 07:53:23PM +0200, Marek Vasut wrote:
>> >>> > On Monday, August 17, 2015 at 06:03:38 PM, Brian Norris wrote:
>> >>> > Also, I cannot find any documentation for this IP block even if I
>> >>> > search through Quartus/QSys, is there any proper documentation
>> >>> > available anywhere?
>> >>>
>> >>> I never found proper documentation, but I didn't look too hard. I've
>> >>> mostly been going off of Viet's comments and code.
>> >>
>> >> Me neither, and I looked through the altera stuff in fact. I'm trying to
>> >> learn whether this is just an Soft IP, in which case it certainly can
>> >> be fixed ; or if there is actually some chip shipping with this crap
>> >> synthesised into actual silicon.
>> >>
>> >>> But FWIW, I did find some relevant info for the peculiar Altera EPCQ
>> >>> flash here:
>> >>>
>> >>> https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/litera
>> >>> ture/
>> >>> hb/cfg/cfg_cf52012.pdf
>> >>
>> >> Altera EPCS/EPCQ flashes are just rebranded micron flashes, they just
>> >> have different JEDEC >ID and are a bit more expensive.
>> >
>> > You can find the document at here
>> > (https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literatu
>> > re/ug/ug_embedded_ip.pdf)
>> >
>> >  Chapter 42.Page 407.
>> >
>> > For the soft IP issue, i've requested hardware engineer to come out
>> > the solution.
>
> That's good :)
>
>> > So in the mean way, our driver will NOT support Micron
>> > flashes until hardware fix is completed.
>
> This doesn't answer my question, so let me reiterate. Is this controller
> only Soft IP (as in, FPGA core) or is this controller shipping in some
> chip as Hard IP (as in, piece of silicon) ?
>

This is new soft IP.

>> > Hence, i just submitted version 5 for this driver with eliminating
>> > micron device support. Hope this version will get ACKed by you.
>
> We'll see.
>
> Best regards,
> Marek Vasut
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[toc] | [prev] | [next] | [standalone]

#1210315

On Thursday, August 20, 2015 at 10:06:29 AM, Viet Nga Dao wrote:
> On Thu, Aug 20, 2015 at 3:55 PM, Marek Vasut <marex@denx.de> wrote:
> > On Thursday, August 20, 2015 at 09:37:33 AM, Viet Nga Dao wrote:
> >> Hi,
> > 
> > Hi,
> > 
> >> >> On Tuesday, August 18, 2015 at 03:24:44 AM, Brian Norris wrote:
> >> >>> I'm not very helpful here, so hopefully Viet can be of more use:
> >> >> Yup :)
> >> >> 
> >> >>> On Mon, Aug 17, 2015 at 07:53:23PM +0200, Marek Vasut wrote:
> >> >>> > On Monday, August 17, 2015 at 06:03:38 PM, Brian Norris wrote:
> >> >>> > Also, I cannot find any documentation for this IP block even if I
> >> >>> > search through Quartus/QSys, is there any proper documentation
> >> >>> > available anywhere?
> >> >>> 
> >> >>> I never found proper documentation, but I didn't look too hard. I've
> >> >>> mostly been going off of Viet's comments and code.
> >> >> 
> >> >> Me neither, and I looked through the altera stuff in fact. I'm trying
> >> >> to learn whether this is just an Soft IP, in which case it certainly
> >> >> can be fixed ; or if there is actually some chip shipping with this
> >> >> crap synthesised into actual silicon.
> >> >> 
> >> >>> But FWIW, I did find some relevant info for the peculiar Altera EPCQ
> >> >>> flash here:
> >> >>> 
> >> >>> https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/lite
> >> >>> ra ture/
> >> >>> hb/cfg/cfg_cf52012.pdf
> >> >> 
> >> >> Altera EPCS/EPCQ flashes are just rebranded micron flashes, they just
> >> >> have different JEDEC >ID and are a bit more expensive.
> >> > 
> >> > You can find the document at here
> >> > (https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/liter
> >> > atu re/ug/ug_embedded_ip.pdf)
> >> > 
> >> >  Chapter 42.Page 407.
> >> > 
> >> > For the soft IP issue, i've requested hardware engineer to come out
> >> > the solution.
> > 
> > That's good :)
> > 
> >> > So in the mean way, our driver will NOT support Micron
> >> > flashes until hardware fix is completed.
> > 
> > This doesn't answer my question, so let me reiterate. Is this controller
> > only Soft IP (as in, FPGA core) or is this controller shipping in some
> > chip as Hard IP (as in, piece of silicon) ?
> 
> This is new soft IP.

I see, thanks !

Best regards,
Marek Vasut
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

[toc] | [prev] | [standalone]

Back to top | Article view | linux.kernel

csiph-web