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[PATCH v5 0/5] generic TEE subsystem

Started byJens Wiklander <jens.wiklander@linaro.org>
First post2015-08-19 10:50 +0200
Last post2015-08-19 10:50 +0200
Articles 11 — 4 participants

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  [PATCH v5 0/5] generic TEE subsystem Jens Wiklander <jens.wiklander@linaro.org> - 2015-08-19 10:50 +0200
    [PATCH v5 5/5] Documentation: tee subsystem and op-tee driver Jens Wiklander <jens.wiklander@linaro.org> - 2015-08-19 10:50 +0200
    [PATCH v5 1/5] arm/arm64: add smccc ARCH32 Jens Wiklander <jens.wiklander@linaro.org> - 2015-08-19 10:50 +0200
      Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32 Yury <yury.norov@gmail.com> - 2015-08-19 13:00 +0200
        Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32 Jens Wiklander <jens.wiklander@linaro.org> - 2015-08-20 09:30 +0200
      Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32 Will Deacon <will.deacon@arm.com> - 2015-08-19 19:00 +0200
        Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32 Jens Wiklander <jens.wiklander@linaro.org> - 2015-08-20 13:40 +0200
          Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32 Mark Rutland <mark.rutland@arm.com> - 2015-08-20 23:40 +0200
          Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32 Will Deacon <will.deacon@arm.com> - 2015-08-21 11:30 +0200
            Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32 Jens Wiklander <jens.wiklander@linaro.org> - 2015-08-21 13:50 +0200
    [PATCH v5 2/5] dt/bindings: add bindings for optee Jens Wiklander <jens.wiklander@linaro.org> - 2015-08-19 10:50 +0200

#1209707 — [PATCH v5 0/5] generic TEE subsystem

FromJens Wiklander <jens.wiklander@linaro.org>
Date2015-08-19 10:50 +0200
Subject[PATCH v5 0/5] generic TEE subsystem
Message-ID<pZ7eh-Nx-1@gated-at.bofh.it>
Hi,

This patch set introduces a generic TEE subsystem. The TEE subsystem will
contain drivers for various TEE implementations. A TEE (Trusted Execution
Environment) is a trusted OS running in some secure environment, for
example, TrustZone on ARM CPUs, or a separate secure co-processor etc.

Regarding use cases, TrustZone has traditionally been used for
offloading secure tasks to the secure world. Examples include: 
- Secure key handling where the OS may or may not have direct access to key
  material.
- E-commerce and payment technologies. Credentials, credit card numbers etc
  could be stored in a more secure environment.
- Trusted User Interface (TUI) to ensure that no-one can snoop PIN-codes
  etc.
- Secure boot to ensure that loaded binaries haven’t been tampered with.
  It’s not strictly needed for secure boot, but you could enhance security
  by leveraging a TEE during boot.
- Digital Rights Management (DRM), the studios provides content with
  different resolution depending on the security of the device. Higher
  security means higher resolution.

A TEE could also be used in existing and new technologies. For example IMA
(Integrity Measurement Architecture) which has been in the kernel for quite
a while. Today you can enhance security by using a TPM-chip to sign the IMA
measurement list. This is something that you also could do by leveraging a
TEE.

Another example could be in 2-factor authentication which is becoming
increasingly more important. FIDO (https://fidoalliance.org) for example
are using public key cryptography in their 2-factor authentication standard
(U2F). With FIDO, a private and public key pair will be generated for every
site you visit and the private key should never leave the local device.
This is an example where you could use secure storage in a TEE for the
private key.

Today you will find a quite a few different out of tree implementations of
TEE drivers which tends to fragment the TEE ecosystem and development. We
think it would be a good idea to have a generic TEE driver integrated in
the kernel which would serve as a base for several different TEE solutions,
no matter if they are on-chip like TrustZone or if they are on a separate
crypto co-processor.

To develop this TEE subsystem we have been using the open source TEE called
OP-TEE (https://github.com/OP-TEE/optee_os) and therefore this would be the
first TEE solution supported by this new subsystem. OP-TEE is a
GlobalPlatform compliant TEE, however this TEE subsystem is not limited to
only GlobalPlatform TEEs, instead we have tried to design it so that it
should work with other TEE solutions also.

"tee: generic TEE subsystem" brings in the generic TEE subsystem which
helps when writing a driver for a specific TEE, for example, OP-TEE.

"tee: add OP-TEE driver" is an OP-TEE driver which uses the subsystem to do
its work.

This patch set has been prepared in cooperation with Javier González who
proposed "Generic TrustZone Driver in Linux Kernel" patches 28 Nov 2014,
https://lwn.net/Articles/623380/ . We've since then changed the scope to
TEE instead of TrustZone.

We have discussed the design on tee-dev@lists.linaro.org (archive at
https://lists.linaro.org/pipermail/tee-dev/) with people from other
companies, including Valentin Manea <valentin.manea@huawei.com>,
Emmanuel MICHEL <emmanuel.michel@st.com>,
Jean-michel DELORME <jean-michel.delorme@st.com>,
and Joakim Bech <joakim.bech@linaro.org>. Our main concern has been to
agree on something that is generic enough to support many different
TEEs while still keeping the interface together.

v5:
* Replaced kref reference counting for the device with a size_t instead as
  the counter is always protected by a mutex

v4:
* Rebased on 4.1
* Redesigned the synchronization around entry exit of normal SMC
* Replaced rwsem on the driver instance with kref and completion since
  rwsem wasn't intended to be used in this way
* Expanded the TEE_IOCTL_PARAM_ATTR_TYPE_MASK to make room for
  future additional parameter types
* Documents TEE subsystem and OP-TEE driver
* Replaced TEE_IOC_CMD with TEE_IOC_OPEN_SESSION, TEE_IOC_INVOKE,
  TEE_IOC_CANCEL and TEE_IOC_CLOSE_SESSION
* DT bindings in a separate patch
* Assembly parts moved to arch/arm and arch/arm64 respectively, in a
  separate patch
* Redefined/clarified the meaning of OPTEE_SMC_SHM_CACHED
* Removed CMA usage to limit the scope of the patch set

v3:
* Rebased on 4.1-rc3 (dma_buf_export() API change)
* A couple of small sparse fixes
* Documents bindings for OP-TEE driver
* Updated MAINTAINERS

v2:
* Replaced the stubbed OP-TEE driver with a real OP-TEE driver
* Removed most APIs not needed by OP-TEE in current state
* Update Documentation/ioctl/ioctl-number.txt with correct path to tee.h
* Rename tee_shm_pool_alloc_cma() to tee_shm_pool_alloc()
* Moved tee.h into include/uapi/linux/
* Redefined tee.h IOCTL macros to be directly based on _IOR and friends
* Removed version info on the API to user space, a data blob which
  can contain an UUID is left for user space to be able to tell which
  protocol to use in TEE_IOC_CMD
* Changed user space exposed structures to only have types with __ prefix
* Dropped THIS_MODULE from tee_fops
* Reworked how the driver is registered and ref counted:
  - moved from using an embedded struct miscdevice to an embedded struct
    device.
  - uses an struct rw_semaphore as synchronization for driver detachment
  - uses alloc/register pattern from TPM

Thanks,
Jens

Jens Wiklander (5):
  arm/arm64: add smccc ARCH32
  dt/bindings: add bindings for optee
  tee: generic TEE subsystem
  tee: add OP-TEE driver
  Documentation: tee subsystem and op-tee driver

 Documentation/00-INDEX                             |   2 +
 Documentation/devicetree/bindings/optee/optee.txt  |  17 +
 .../devicetree/bindings/vendor-prefixes.txt        |   1 +
 Documentation/ioctl/ioctl-number.txt               |   1 +
 Documentation/tee.txt                              | 117 +++
 MAINTAINERS                                        |  14 +
 arch/arm/Kconfig                                   |   4 +
 arch/arm/kernel/Makefile                           |   2 +
 arch/arm/kernel/smccc-call.S                       |  26 +
 arch/arm/kernel/smccc.c                            |  17 +
 arch/arm64/Kconfig                                 |   4 +
 arch/arm64/kernel/Makefile                         |   1 +
 arch/arm64/kernel/smccc-call.S                     |  34 +
 arch/arm64/kernel/smccc.c                          |  17 +
 drivers/Kconfig                                    |   2 +
 drivers/Makefile                                   |   1 +
 drivers/tee/Kconfig                                |  18 +
 drivers/tee/Makefile                               |   4 +
 drivers/tee/optee/Kconfig                          |   8 +
 drivers/tee/optee/Makefile                         |   5 +
 drivers/tee/optee/call.c                           | 390 ++++++++++
 drivers/tee/optee/core.c                           | 453 +++++++++++
 drivers/tee/optee/optee_msg.h                      | 334 +++++++++
 drivers/tee/optee/optee_private.h                  | 129 ++++
 drivers/tee/optee/optee_smc.h                      | 466 ++++++++++++
 drivers/tee/optee/rpc.c                            | 248 ++++++
 drivers/tee/optee/supp.c                           | 212 ++++++
 drivers/tee/tee.c                                  | 834 +++++++++++++++++++++
 drivers/tee/tee_private.h                          |  80 ++
 drivers/tee/tee_shm.c                              | 324 ++++++++
 drivers/tee/tee_shm_pool.c                         | 133 ++++
 include/linux/arm-smccc.h                          |  79 ++
 include/linux/tee_drv.h                            | 306 ++++++++
 include/uapi/linux/tee.h                           | 376 ++++++++++
 34 files changed, 4659 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/optee/optee.txt
 create mode 100644 Documentation/tee.txt
 create mode 100644 arch/arm/kernel/smccc-call.S
 create mode 100644 arch/arm/kernel/smccc.c
 create mode 100644 arch/arm64/kernel/smccc-call.S
 create mode 100644 arch/arm64/kernel/smccc.c
 create mode 100644 drivers/tee/Kconfig
 create mode 100644 drivers/tee/Makefile
 create mode 100644 drivers/tee/optee/Kconfig
 create mode 100644 drivers/tee/optee/Makefile
 create mode 100644 drivers/tee/optee/call.c
 create mode 100644 drivers/tee/optee/core.c
 create mode 100644 drivers/tee/optee/optee_msg.h
 create mode 100644 drivers/tee/optee/optee_private.h
 create mode 100644 drivers/tee/optee/optee_smc.h
 create mode 100644 drivers/tee/optee/rpc.c
 create mode 100644 drivers/tee/optee/supp.c
 create mode 100644 drivers/tee/tee.c
 create mode 100644 drivers/tee/tee_private.h
 create mode 100644 drivers/tee/tee_shm.c
 create mode 100644 drivers/tee/tee_shm_pool.c
 create mode 100644 include/linux/arm-smccc.h
 create mode 100644 include/linux/tee_drv.h
 create mode 100644 include/uapi/linux/tee.h

-- 
1.9.1

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#1209708 — [PATCH v5 5/5] Documentation: tee subsystem and op-tee driver

FromJens Wiklander <jens.wiklander@linaro.org>
Date2015-08-19 10:50 +0200
Subject[PATCH v5 5/5] Documentation: tee subsystem and op-tee driver
Message-ID<pZ7ei-Nx-9@gated-at.bofh.it>
In reply to#1209707
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
---
 Documentation/00-INDEX |   2 +
 Documentation/tee.txt  | 117 +++++++++++++++++++++++++++++++++++++++++++++++++
 MAINTAINERS            |   1 +
 3 files changed, 120 insertions(+)
 create mode 100644 Documentation/tee.txt

diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX
index cd077ca..bd3f803 100644
--- a/Documentation/00-INDEX
+++ b/Documentation/00-INDEX
@@ -435,6 +435,8 @@ sysrq.txt
 	- info on the magic SysRq key.
 target/
 	- directory with info on generating TCM v4 fabric .ko modules
+tee.txt
+	- info on the TEE subsystem and drivers
 this_cpu_ops.txt
 	- List rationale behind and the way to use this_cpu operations.
 thermal/
diff --git a/Documentation/tee.txt b/Documentation/tee.txt
new file mode 100644
index 0000000..4ac91d2
--- /dev/null
+++ b/Documentation/tee.txt
@@ -0,0 +1,117 @@
+TEE subsystem
+This document describes the TEE subsystem in Linux
+
+A TEE (Trusted Execution Environment) is a trusted OS running in some
+secure environment, for example, TrustZone on ARM CPUs, or a separate
+secure co-processor etc. A TEE driver handles the details needed to
+communicate with the TEE.
+
+This subsystem deals with:
+
+- Registration of TEE drivers
+
+- Managing shared memory between Linux and the TEE
+
+- Providing a generic API to the TEE
+
+The TEE interface
+=================
+
+include/uapi/linux/tee.h defines the generic interface to a TEE.
+
+User space (the client) connects to the driver by opening /dev/tee[0-9]* or
+/dev/teepriv[0-9]*.
+
+- TEE_IOC_SHM_ALLOC allocates shared memory and returns a file descriptor which
+  user space can mmap. When user space doesn't need the file descriptor anymore
+  it should be closed. When shared memory isn't needed any longer it should be
+  unmapped with munmap() to allow the reuse of memory.
+
+- TEE_IOC_VERSION lets user space know which TEE this driver handles and
+  the its capabilities.
+
+- TEE_IOC_OPEN_SESSION opens a new session to a Trusted Application
+
+- TEE_IOC_INVOKE invokes a function in a Trusted Application
+
+- TEE_IOC_CANCEL may cancel an ongoing TEE_IOC_OPEN_SESSION or TEE_IOC_INVOKE
+
+- TEE_IOC_CLOSE_SESSION closes a session to a Trusted Application
+
+There are two classes of clients, normal clients and supplicants. The latter is
+a helper process for the TEE to access resources in Linux, for example file
+system access. A normal client opens /dev/tee[0-9]* and a supplicant opens
+/dev/teepriv[0-9].
+
+Much of the communication between clients and the TEE is opaque to the
+driver. The main job for the driver is to receive requests from the
+clients, forward them to the TEE and send back the results. In the case of
+supplicants the communication goes in the other direction, the TEE sends
+requests to the supplicant which then sends back the result.
+
+OP-TEE driver
+=============
+
+The OP-TEE driver handles OP-TEE [1] based TEEs. Currently it is only the ARM
+TrustZone based OP-TEE solution that is supported.
+
+Lowest level of communication with OP-TEE builds on ARM SMC Calling
+Convention (SMCCC) [2], which is the foundation for OP-TEE's SMC interface
+[3] used internally by the driver. Stacked on top of that is OP-TEE Message
+Protocol [4].
+
+OP-TEE SMC interface provides the basic functions required by SMCCC and some
+additional functions specific for OP-TEE. The most interesting functions are:
+
+- OPTEE_SMC_FUNCID_CALLS_UID (part of SMCCC) returns the version information
+  which is then returned by TEE_IOC_VERSION
+
+- OPTEE_SMC_CALL_GET_OS_UUID returns the particular OP-TEE implementation, used
+  to tell, for instance, a TrustZone OP-TEE apart from an OP-TEE running on a
+  separate secure co-processor.
+
+- OPTEE_SMC_CALL_WITH_ARG drives the OP-TEE message protocol
+
+- OPTEE_SMC_GET_SHM_CONFIG lets the driver and OP-TEE agree on which memory
+  range to used for shared memory between Linux and OP-TEE.
+
+The GlobalPlatform TEE Client API [5] is implemented on top of the generic
+TEE API.
+
+Picture of the relationship between the different components in the
+OP-TEE architecture.
+
+    User space                  Kernel                   Secure world
+    ~~~~~~~~~~                  ~~~~~~                   ~~~~~~~~~~~~
+ +--------+                                             +-------------+
+ | Client |                                             | Trusted     |
+ +--------+                                             | Application |
+    /\                                                  +-------------+
+    || +----------+                                           /\
+    || |tee-      |                                           ||
+    || |supplicant|                                           \/
+    || +----------+                                     +-------------+
+    \/      /\                                          | TEE Internal|
+ +-------+  ||                                          | API         |
+ + TEE   |  ||            +--------+--------+           +-------------+
+ | Client|  ||            | TEE    | OP-TEE |           | OP-TEE      |
+ | API   |  \/            | subsys | driver |           | Trusted OS  |
+ +-------+----------------+----+-------+----+-----------+-------------+
+ |      Generic TEE API        |       |     OP-TEE MSG               |
+ |      IOCTL (TEE_IOC_*)      |       |     SMCCC (OPTEE_SMC_CALL_*) |
+ +-----------------------------+       +------------------------------+
+
+RPC (Remote Procedure Call) are requests from secure world to kernel driver
+or tee-supplicant. An RPC is identified by a special range of SMCCC return
+values from OPTEE_SMC_CALL_WITH_ARG. RPC messages which are intended for the
+kernel are handled by the kernel driver. Other RPC messages will be forwarded to
+tee-supplicant without further involvement of the driver, except switching
+shared memory buffer representation.
+
+References:
+[1] https://github.com/OP-TEE/optee_os
+[2] http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
+[3] drivers/tee/optee/optee_smc.h
+[4] drivers/tee/optee/optee_msg.h
+[5] http://www.globalplatform.org/specificationsdevice.asp look for
+    "TEE Client API Specification v1.0" and click download.
diff --git a/MAINTAINERS b/MAINTAINERS
index 2df3f03..a48d718 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8646,6 +8646,7 @@ S:	Maintained
 F:	include/linux/tee_drv.h
 F:	include/uapi/linux/tee.h
 F:	drivers/tee/
+F:	Documentation/tee.txt
 
 THUNDERBOLT DRIVER
 M:	Andreas Noever <andreas.noever@gmail.com>
-- 
1.9.1

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#1209712 — [PATCH v5 1/5] arm/arm64: add smccc ARCH32

FromJens Wiklander <jens.wiklander@linaro.org>
Date2015-08-19 10:50 +0200
Subject[PATCH v5 1/5] arm/arm64: add smccc ARCH32
Message-ID<pZ7ei-Nx-21@gated-at.bofh.it>
In reply to#1209707
Adds helpers to do SMC based on ARM SMC Calling Convention.
CONFIG_HAVE_SMCCC is enabled for architectures that may support
the SMC instruction. It's the responsibility of the caller to
know if the SMC instruction is supported by the platform.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
---
 arch/arm/Kconfig               |  4 +++
 arch/arm/kernel/Makefile       |  2 ++
 arch/arm/kernel/smccc-call.S   | 26 ++++++++++++++
 arch/arm/kernel/smccc.c        | 17 +++++++++
 arch/arm64/Kconfig             |  4 +++
 arch/arm64/kernel/Makefile     |  1 +
 arch/arm64/kernel/smccc-call.S | 34 ++++++++++++++++++
 arch/arm64/kernel/smccc.c      | 17 +++++++++
 include/linux/arm-smccc.h      | 79 ++++++++++++++++++++++++++++++++++++++++++
 9 files changed, 184 insertions(+)
 create mode 100644 arch/arm/kernel/smccc-call.S
 create mode 100644 arch/arm/kernel/smccc.c
 create mode 100644 arch/arm64/kernel/smccc-call.S
 create mode 100644 arch/arm64/kernel/smccc.c
 create mode 100644 include/linux/arm-smccc.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 45df48b..75e4da3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -221,6 +221,9 @@ config NEED_RET_TO_USER
 config ARCH_MTD_XIP
 	bool
 
+config HAVE_SMCCC
+	bool
+
 config VECTORS_BASE
 	hex
 	default 0xffff0000 if MMU || CPU_HIGH_VECTOR
@@ -324,6 +327,7 @@ config ARCH_MULTIPLATFORM
 	select CLKSRC_OF
 	select COMMON_CLK
 	select GENERIC_CLOCKEVENTS
+	select HAVE_SMCCC if CPU_V7
 	select MIGHT_HAVE_PCI
 	select MULTI_IRQ_HANDLER
 	select SPARSE_IRQ
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 752725d..8cdd25b 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -90,4 +90,6 @@ obj-y				+= psci.o psci-call.o
 obj-$(CONFIG_SMP)		+= psci_smp.o
 endif
 
+obj-$(CONFIG_HAVE_SMCCC)	+= smccc-call.o smccc.o
+
 extra-y := $(head-y) vmlinux.lds
diff --git a/arch/arm/kernel/smccc-call.S b/arch/arm/kernel/smccc-call.S
new file mode 100644
index 0000000..05bc554
--- /dev/null
+++ b/arch/arm/kernel/smccc-call.S
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2015, Linaro Limited
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/linkage.h>
+
+#include <asm/opcodes-sec.h>
+
+/* void smccc_call32(struct smccc_param32 *param) */
+ENTRY(smccc_call32)
+	push	{r4-r8, lr}
+	mov	r8, r0
+	ldm	r8, {r0-r7}
+	__SMC(0)
+	stm	r8, {r0-r7}
+	pop	{r4-r8, pc}
+ENDPROC(smccc_call32)
diff --git a/arch/arm/kernel/smccc.c b/arch/arm/kernel/smccc.c
new file mode 100644
index 0000000..ba4039e
--- /dev/null
+++ b/arch/arm/kernel/smccc.c
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2015, Linaro Limited
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/export.h>
+#include <linux/arm-smccc.h>
+
+EXPORT_SYMBOL_GPL(smccc_call32);
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7796af4..b3ea778 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -83,6 +83,7 @@ config ARM64
 	select SPARSE_IRQ
 	select SYSCTL_EXCEPTION_TRACE
 	select HAVE_CONTEXT_TRACKING
+	select HAVE_SMCCC
 	help
 	  ARM 64-bit (AArch64) Linux support.
 
@@ -146,6 +147,9 @@ config KERNEL_MODE_NEON
 config FIX_EARLYCON_MEM
 	def_bool y
 
+config HAVE_SMCCC
+	bool
+
 config PGTABLE_LEVELS
 	int
 	default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 426d076..f7804f7 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -36,6 +36,7 @@ arm64-obj-$(CONFIG_EFI)			+= efi.o efi-stub.o efi-entry.o
 arm64-obj-$(CONFIG_PCI)			+= pci.o
 arm64-obj-$(CONFIG_ARMV8_DEPRECATED)	+= armv8_deprecated.o
 arm64-obj-$(CONFIG_ACPI)		+= acpi.o
+arm64-obj-$(CONFIG_HAVE_SMCCC)		+= smccc-call.o smccc.o
 
 obj-y					+= $(arm64-obj-y) vdso/
 obj-m					+= $(arm64-obj-m)
diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
new file mode 100644
index 0000000..3ce7fe8
--- /dev/null
+++ b/arch/arm64/kernel/smccc-call.S
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2015, Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License Version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/linkage.h>
+
+#define SMC_PARAM_W0_OFFS	0
+#define SMC_PARAM_W2_OFFS	8
+#define SMC_PARAM_W4_OFFS	16
+#define SMC_PARAM_W6_OFFS	24
+
+/* void smccc_call32(struct smccc_param32 *param) */
+ENTRY(smccc_call32)
+	stp	x28, x30, [sp, #-16]!
+	mov	x28, x0
+	ldp	w0, w1, [x28, #SMC_PARAM_W0_OFFS]
+	ldp	w2, w3, [x28, #SMC_PARAM_W2_OFFS]
+	ldp	w4, w5, [x28, #SMC_PARAM_W4_OFFS]
+	ldp	w6, w7, [x28, #SMC_PARAM_W6_OFFS]
+	smc	#0
+	stp	w0, w1, [x28, #SMC_PARAM_W0_OFFS]
+	stp	w2, w3, [x28, #SMC_PARAM_W2_OFFS]
+	ldp	x28, x30, [sp], #16
+	ret
+ENDPROC(smccc_call32)
diff --git a/arch/arm64/kernel/smccc.c b/arch/arm64/kernel/smccc.c
new file mode 100644
index 0000000..ba4039e
--- /dev/null
+++ b/arch/arm64/kernel/smccc.c
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2015, Linaro Limited
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <linux/export.h>
+#include <linux/arm-smccc.h>
+
+EXPORT_SYMBOL_GPL(smccc_call32);
diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
new file mode 100644
index 0000000..9b8d775
--- /dev/null
+++ b/include/linux/arm-smccc.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2015, Linaro Limited
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef __LINUX_ARM_SMCCC_H
+#define __LINUX_ARM_SMCCC_H
+
+#include <linux/types.h>
+
+/*
+ * This file provideds defines common defines for ARM SMC Calling
+ * Convention as specified in
+ * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
+ */
+
+#define SMCCC_SMC_32			(0 << 30)
+#define SMCCC_SMC_64			(1 << 30)
+#define SMCCC_FAST_CALL			(1 << 31)
+#define SMCCC_STD_CALL			(0 << 31)
+
+#define SMCCC_OWNER_MASK		0x3F
+#define SMCCC_OWNER_SHIFT		24
+
+#define SMCCC_FUNC_MASK			0xFFFF
+
+#define SMCCC_IS_FAST_CALL(smc_val)	((smc_val) & SMCCC_FAST_CALL)
+#define SMCCC_IS_64(smc_val)		((smc_val) & SMCCC_SMC_64)
+#define SMCCC_FUNC_NUM(smc_val)		((smc_val) & SMCCC_FUNC_MASK)
+#define SMCCC_OWNER_NUM(smc_val) \
+	(((smc_val) >> SMCCC_OWNER_SHIFT) & SMCCC_OWNER_MASK)
+
+#define SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
+			((type) | (calling_convention) | \
+			(((owner) & SMCCC_OWNER_MASK) << SMCCC_OWNER_SHIFT) | \
+			((func_num) & SMCCC_FUNC_MASK))
+
+#define SMCCC_OWNER_ARCH		0
+#define SMCCC_OWNER_CPU			1
+#define SMCCC_OWNER_SIP			2
+#define SMCCC_OWNER_OEM			3
+#define SMCCC_OWNER_STANDARD		4
+#define SMCCC_OWNER_TRUSTED_APP		48
+#define SMCCC_OWNER_TRUSTED_APP_END	49
+#define SMCCC_OWNER_TRUSTED_OS		50
+#define SMCCC_OWNER_TRUSTED_OS_END	63
+
+struct smccc_param32 {
+	u32 a0;
+	u32 a1;
+	u32 a2;
+	u32 a3;
+	u32 a4;
+	u32 a5;
+	u32 a6;
+	u32 a7;
+};
+
+/**
+ * smccc_call32() - make ARCH32 SMC calls
+ * @param: values to pass in registers 0 to 7
+ *
+ * This function is used to make SMC calls following SMC Calling Convention
+ * for ARCH32 calls. The content of the supplied param are copied to
+ * registers 0 to 7 prior to the SMC instruction. Values a0..a3 are updated
+ * with the content from register 0 to 3 on return from the SMC
+ * instruction.
+ */
+void smccc_call32(struct smccc_param32 *param);
+
+#endif /*__LINUX_ARM_SMCCC_H*/
-- 
1.9.1

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#1209771 — Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32

FromYury <yury.norov@gmail.com>
Date2015-08-19 13:00 +0200
SubjectRe: [PATCH v5 1/5] arm/arm64: add smccc ARCH32
Message-ID<pZ9g6-3EV-19@gated-at.bofh.it>
In reply to#1209712
On 19.08.2015 11:40, Jens Wiklander wrote:
 >
 > Adds helpers to do SMC based on ARM SMC Calling Convention.
 > CONFIG_HAVE_SMCCC is enabled for architectures that may support
 > the SMC instruction. It's the responsibility of the caller to
 > know if the SMC instruction is supported by the platform.
 >
 > Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
 > ---
 >  arch/arm/Kconfig               |  4 +++
 >  arch/arm/kernel/Makefile       |  2 ++
 >  arch/arm/kernel/smccc-call.S   | 26 ++++++++++++++
 >  arch/arm/kernel/smccc.c        | 17 +++++++++
 >  arch/arm64/Kconfig             |  4 +++
 >  arch/arm64/kernel/Makefile     |  1 +
 >  arch/arm64/kernel/smccc-call.S | 34 ++++++++++++++++++
 >  arch/arm64/kernel/smccc.c      | 17 +++++++++
 >  include/linux/arm-smccc.h      | 79 
++++++++++++++++++++++++++++++++++++++++++
 >  9 files changed, 184 insertions(+)
 >  create mode 100644 arch/arm/kernel/smccc-call.S
 >  create mode 100644 arch/arm/kernel/smccc.c
 >  create mode 100644 arch/arm64/kernel/smccc-call.S
 >  create mode 100644 arch/arm64/kernel/smccc.c
 >  create mode 100644 include/linux/arm-smccc.h
 >
 > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
 > index 45df48b..75e4da3 100644
 > --- a/arch/arm/Kconfig
 > +++ b/arch/arm/Kconfig
 > @@ -221,6 +221,9 @@ config NEED_RET_TO_USER
 >  config ARCH_MTD_XIP
 >  	bool
 >
 > +config HAVE_SMCCC
 > +	bool
 > +
 >  config VECTORS_BASE
 >  	hex
 >  	default 0xffff0000 if MMU || CPU_HIGH_VECTOR
 > @@ -324,6 +327,7 @@ config ARCH_MULTIPLATFORM
 >  	select CLKSRC_OF
 >  	select COMMON_CLK
 >  	select GENERIC_CLOCKEVENTS
 > +	select HAVE_SMCCC if CPU_V7
 >  	select MIGHT_HAVE_PCI
 >  	select MULTI_IRQ_HANDLER
 >  	select SPARSE_IRQ
 > diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
 > index 752725d..8cdd25b 100644
 > --- a/arch/arm/kernel/Makefile
 > +++ b/arch/arm/kernel/Makefile
 > @@ -90,4 +90,6 @@ obj-y				+= psci.o psci-call.o
 >  obj-$(CONFIG_SMP)		+= psci_smp.o
 >  endif
 >
 > +obj-$(CONFIG_HAVE_SMCCC)	+= smccc-call.o smccc.o
 > +
 >  extra-y := $(head-y) vmlinux.lds
 > diff --git a/arch/arm/kernel/smccc-call.S b/arch/arm/kernel/smccc-call.S
 > new file mode 100644
 > index 0000000..05bc554
 > --- /dev/null
 > +++ b/arch/arm/kernel/smccc-call.S
 > @@ -0,0 +1,26 @@
 > +/*
 > + * Copyright (c) 2015, Linaro Limited
 > + *
 > + * This software is licensed under the terms of the GNU General Public
 > + * License version 2, as published by the Free Software Foundation, and
 > + * may be copied, distributed, and modified under those terms.
 > + *
 > + * This program is distributed in the hope that it will be useful,
 > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 > + * GNU General Public License for more details.
 > + *
 > + */
 > +#include <linux/linkage.h>
 > +
 > +#include <asm/opcodes-sec.h>
 > +
 > +/* void smccc_call32(struct smccc_param32 *param) */
 > +ENTRY(smccc_call32)
 > +	push	{r4-r8, lr}
 > +	mov	r8, r0
 > +	ldm	r8, {r0-r7}
 > +	__SMC(0)
 > +	stm	r8, {r0-r7}
 > +	pop	{r4-r8, pc}
 > +ENDPROC(smccc_call32)
 > diff --git a/arch/arm/kernel/smccc.c b/arch/arm/kernel/smccc.c
 > new file mode 100644
 > index 0000000..ba4039e
 > --- /dev/null
 > +++ b/arch/arm/kernel/smccc.c
 > @@ -0,0 +1,17 @@
 > +/*
 > + * Copyright (c) 2015, Linaro Limited
 > + *
 > + * This software is licensed under the terms of the GNU General Public
 > + * License version 2, as published by the Free Software Foundation, and
 > + * may be copied, distributed, and modified under those terms.
 > + *
 > + * This program is distributed in the hope that it will be useful,
 > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 > + * GNU General Public License for more details.
 > + *
 > + */
 > +#include <linux/export.h>
 > +#include <linux/arm-smccc.h>
 > +
 > +EXPORT_SYMBOL_GPL(smccc_call32);
 > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
 > index 7796af4..b3ea778 100644
 > --- a/arch/arm64/Kconfig
 > +++ b/arch/arm64/Kconfig
 > @@ -83,6 +83,7 @@ config ARM64
 >  	select SPARSE_IRQ
 >  	select SYSCTL_EXCEPTION_TRACE
 >  	select HAVE_CONTEXT_TRACKING
 > +	select HAVE_SMCCC
 >  	help
 >  	  ARM 64-bit (AArch64) Linux support.
 >
 > @@ -146,6 +147,9 @@ config KERNEL_MODE_NEON
 >  config FIX_EARLYCON_MEM
 >  	def_bool y
 >
 > +config HAVE_SMCCC
 > +	bool
 > +
 >  config PGTABLE_LEVELS
 >  	int
 >  	default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
 > diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
 > index 426d076..f7804f7 100644
 > --- a/arch/arm64/kernel/Makefile
 > +++ b/arch/arm64/kernel/Makefile
 > @@ -36,6 +36,7 @@ arm64-obj-$(CONFIG_EFI)			+= efi.o efi-stub.o 
efi-entry.o
 >  arm64-obj-$(CONFIG_PCI)			+= pci.o
 >  arm64-obj-$(CONFIG_ARMV8_DEPRECATED)	+= armv8_deprecated.o
 >  arm64-obj-$(CONFIG_ACPI)		+= acpi.o
 > +arm64-obj-$(CONFIG_HAVE_SMCCC)		+= smccc-call.o smccc.o
 >
 >  obj-y					+= $(arm64-obj-y) vdso/
 >  obj-m					+= $(arm64-obj-m)
 > diff --git a/arch/arm64/kernel/smccc-call.S 
b/arch/arm64/kernel/smccc-call.S
 > new file mode 100644
 > index 0000000..3ce7fe8
 > --- /dev/null
 > +++ b/arch/arm64/kernel/smccc-call.S
 > @@ -0,0 +1,34 @@
 > +/*
 > + * Copyright (c) 2015, Linaro Limited
 > + *
 > + * This program is free software; you can redistribute it and/or modify
 > + * it under the terms of the GNU General Public License Version 2 as
 > + * published by the Free Software Foundation.
 > + *
 > + * This program is distributed in the hope that it will be useful,
 > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 > + * GNU General Public License for more details.
 > + *
 > + */
 > +#include <linux/linkage.h>
 > +
 > +#define SMC_PARAM_W0_OFFS	0
 > +#define SMC_PARAM_W2_OFFS	8
 > +#define SMC_PARAM_W4_OFFS	16
 > +#define SMC_PARAM_W6_OFFS	24
 > +
 > +/* void smccc_call32(struct smccc_param32 *param) */
 > +ENTRY(smccc_call32)
 > +	stp	x28, x30, [sp, #-16]!
 > +	mov	x28, x0
 > +	ldp	w0, w1, [x28, #SMC_PARAM_W0_OFFS]
 > +	ldp	w2, w3, [x28, #SMC_PARAM_W2_OFFS]
 > +	ldp	w4, w5, [x28, #SMC_PARAM_W4_OFFS]
 > +	ldp	w6, w7, [x28, #SMC_PARAM_W6_OFFS]
 > +	smc	#0
 > +	stp	w0, w1, [x28, #SMC_PARAM_W0_OFFS]
 > +	stp	w2, w3, [x28, #SMC_PARAM_W2_OFFS]
 > +	ldp	x28, x30, [sp], #16
 > +	ret
 > +ENDPROC(smccc_call32)
 > diff --git a/arch/arm64/kernel/smccc.c b/arch/arm64/kernel/smccc.c
 > new file mode 100644
 > index 0000000..ba4039e
 > --- /dev/null
 > +++ b/arch/arm64/kernel/smccc.c
 > @@ -0,0 +1,17 @@
 > +/*
 > + * Copyright (c) 2015, Linaro Limited
 > + *
 > + * This software is licensed under the terms of the GNU General Public
 > + * License version 2, as published by the Free Software Foundation, and
 > + * may be copied, distributed, and modified under those terms.
 > + *
 > + * This program is distributed in the hope that it will be useful,
 > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 > + * GNU General Public License for more details.
 > + *
 > + */
 > +#include <linux/export.h>
 > +#include <linux/arm-smccc.h>
 > +
 > +EXPORT_SYMBOL_GPL(smccc_call32);
 > diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h
 > new file mode 100644
 > index 0000000..9b8d775
 > --- /dev/null
 > +++ b/include/linux/arm-smccc.h
 > @@ -0,0 +1,79 @@
 > +/*
 > + * Copyright (c) 2015, Linaro Limited
 > + *
 > + * This software is licensed under the terms of the GNU General Public
 > + * License version 2, as published by the Free Software Foundation, and
 > + * may be copied, distributed, and modified under those terms.
 > + *
 > + * This program is distributed in the hope that it will be useful,
 > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 > + * GNU General Public License for more details.
 > + *
 > + */
 > +#ifndef __LINUX_ARM_SMCCC_H
 > +#define __LINUX_ARM_SMCCC_H
 > +
 > +#include <linux/types.h>
 > +
 > +/*
 > + * This file provideds defines common defines for ARM SMC Calling

typos here?

 > + * Convention as specified in
 > + * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
 > + */
 > +
 > +#define SMCCC_SMC_32			(0 << 30)

0 << 30 is just 0, and so meaningless.
It's better to introduce SMCCC_IS_32() macro instead.

 > +#define SMCCC_SMC_64			(1 << 30)
 > +#define SMCCC_FAST_CALL			(1 << 31)
 > +#define SMCCC_STD_CALL			(0 << 31)

The same

 > +
 > +#define SMCCC_OWNER_MASK		0x3F
 > +#define SMCCC_OWNER_SHIFT		24
 > +
 > +#define SMCCC_FUNC_MASK			0xFFFF
 > +
 > +#define SMCCC_IS_FAST_CALL(smc_val)	((smc_val) & SMCCC_FAST_CALL)
 > +#define SMCCC_IS_64(smc_val)		((smc_val) & SMCCC_SMC_64)
 > +#define SMCCC_FUNC_NUM(smc_val)		((smc_val) & SMCCC_FUNC_MASK)
 > +#define SMCCC_OWNER_NUM(smc_val) \
 > +	(((smc_val) >> SMCCC_OWNER_SHIFT) & SMCCC_OWNER_MASK)
 > +
 > +#define SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
 > +			((type) | (calling_convention) | \
 > +			(((owner) & SMCCC_OWNER_MASK) << SMCCC_OWNER_SHIFT) | \
 > +			((func_num) & SMCCC_FUNC_MASK))
 > +
 > +#define SMCCC_OWNER_ARCH		0
 > +#define SMCCC_OWNER_CPU			1
 > +#define SMCCC_OWNER_SIP			2
 > +#define SMCCC_OWNER_OEM			3
 > +#define SMCCC_OWNER_STANDARD		4
 > +#define SMCCC_OWNER_TRUSTED_APP		48
 > +#define SMCCC_OWNER_TRUSTED_APP_END	49
 > +#define SMCCC_OWNER_TRUSTED_OS		50
 > +#define SMCCC_OWNER_TRUSTED_OS_END	63
 > +
 > +struct smccc_param32 {
 > +	u32 a0;
 > +	u32 a1;
 > +	u32 a2;
 > +	u32 a3;
 > +	u32 a4;
 > +	u32 a5;
 > +	u32 a6;
 > +	u32 a7;
 > +};
 > +
 > +/**
 > + * smccc_call32() - make ARCH32 SMC calls
 > + * @param: values to pass in registers 0 to 7
 > + *
 > + * This function is used to make SMC calls following SMC Calling 
Convention
 > + * for ARCH32 calls. The content of the supplied param are copied to
 > + * registers 0 to 7 prior to the SMC instruction. Values a0..a3 are 
updated
 > + * with the content from register 0 to 3 on return from the SMC
 > + * instruction.
 > + */
 > +void smccc_call32(struct smccc_param32 *param);
 > +
 > +#endif /*__LINUX_ARM_SMCCC_H*/
 > --
 > 1.9.1
 >
 >
 > _______________________________________________
 > linux-arm-kernel mailing list
 > linux-arm-kernel@lists.infradead.org
 > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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#1210232 — Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32

FromJens Wiklander <jens.wiklander@linaro.org>
Date2015-08-20 09:30 +0200
SubjectRe: [PATCH v5 1/5] arm/arm64: add smccc ARCH32
Message-ID<pZssq-6sp-11@gated-at.bofh.it>
In reply to#1209771
On Wed, Aug 19, 2015 at 01:56:39PM +0300, Yury wrote:
[...]
> > +++ b/include/linux/arm-smccc.h
> > @@ -0,0 +1,79 @@
> > +/*
> > + * Copyright (c) 2015, Linaro Limited
> > + *
> > + * This software is licensed under the terms of the GNU General Public
> > + * License version 2, as published by the Free Software Foundation, and
> > + * may be copied, distributed, and modified under those terms.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + */
> > +#ifndef __LINUX_ARM_SMCCC_H
> > +#define __LINUX_ARM_SMCCC_H
> > +
> > +#include <linux/types.h>
> > +
> > +/*
> > + * This file provideds defines common defines for ARM SMC Calling
> 
> typos here?

Thanks

> 
> > + * Convention as specified in
> > + * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
> > + */
> > +
> > +#define SMCCC_SMC_32			(0 << 30)
> 
> 0 << 30 is just 0, and so meaningless.
> It's better to introduce SMCCC_IS_32() macro instead.

SMCCC_SMC_32 is used as an argument for SMCCC_CALL_VAL (example in
"[PATCH v5 4/5] tee: add OP-TEE driver" drivers/tee/optee/optee_smc.h).
Shifting 0 here is still 0 as you point out, but it connects it with the
other define SMCCC_SMC_64.

> 
> > +#define SMCCC_SMC_64			(1 << 30)
> > +#define SMCCC_FAST_CALL			(1 << 31)
> > +#define SMCCC_STD_CALL			(0 << 31)
> 
> The same
> 
> > +
> > +#define SMCCC_OWNER_MASK		0x3F
> > +#define SMCCC_OWNER_SHIFT		24
> > +
> > +#define SMCCC_FUNC_MASK			0xFFFF
> > +
> > +#define SMCCC_IS_FAST_CALL(smc_val)	((smc_val) & SMCCC_FAST_CALL)
> > +#define SMCCC_IS_64(smc_val)		((smc_val) & SMCCC_SMC_64)
> > +#define SMCCC_FUNC_NUM(smc_val)		((smc_val) & SMCCC_FUNC_MASK)
> > +#define SMCCC_OWNER_NUM(smc_val) \
> > +	(((smc_val) >> SMCCC_OWNER_SHIFT) & SMCCC_OWNER_MASK)
> > +
> > +#define SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
> > +			((type) | (calling_convention) | \
> > +			(((owner) & SMCCC_OWNER_MASK) << SMCCC_OWNER_SHIFT) | \
> > +			((func_num) & SMCCC_FUNC_MASK))
> > +
> > +#define SMCCC_OWNER_ARCH		0
> > +#define SMCCC_OWNER_CPU			1
> > +#define SMCCC_OWNER_SIP			2
> > +#define SMCCC_OWNER_OEM			3
> > +#define SMCCC_OWNER_STANDARD		4
> > +#define SMCCC_OWNER_TRUSTED_APP		48
> > +#define SMCCC_OWNER_TRUSTED_APP_END	49
> > +#define SMCCC_OWNER_TRUSTED_OS		50
> > +#define SMCCC_OWNER_TRUSTED_OS_END	63
> > +
> > +struct smccc_param32 {
> > +	u32 a0;
> > +	u32 a1;
> > +	u32 a2;
> > +	u32 a3;
> > +	u32 a4;
> > +	u32 a5;
> > +	u32 a6;
> > +	u32 a7;
> > +};
> > +
> > +/**
> > + * smccc_call32() - make ARCH32 SMC calls
> > + * @param: values to pass in registers 0 to 7
> > + *
> > + * This function is used to make SMC calls following SMC Calling
> Convention
> > + * for ARCH32 calls. The content of the supplied param are copied to
> > + * registers 0 to 7 prior to the SMC instruction. Values a0..a3
> are updated
> > + * with the content from register 0 to 3 on return from the SMC
> > + * instruction.
> > + */
> > +void smccc_call32(struct smccc_param32 *param);
> > +
> > +#endif /*__LINUX_ARM_SMCCC_H*/
> > --
> > 1.9.1
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

--
Thanks,
Jens
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#1209955 — Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32

FromWill Deacon <will.deacon@arm.com>
Date2015-08-19 19:00 +0200
SubjectRe: [PATCH v5 1/5] arm/arm64: add smccc ARCH32
Message-ID<pZeSt-3lt-1@gated-at.bofh.it>
In reply to#1209712
On Wed, Aug 19, 2015 at 09:40:25AM +0100, Jens Wiklander wrote:
> Adds helpers to do SMC based on ARM SMC Calling Convention.
> CONFIG_HAVE_SMCCC is enabled for architectures that may support
> the SMC instruction. It's the responsibility of the caller to
> know if the SMC instruction is supported by the platform.

[...]
> diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
> new file mode 100644
> index 0000000..3ce7fe8
> --- /dev/null
> +++ b/arch/arm64/kernel/smccc-call.S
> @@ -0,0 +1,34 @@
> +/*
> + * Copyright (c) 2015, Linaro Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License Version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +#include <linux/linkage.h>
> +
> +#define SMC_PARAM_W0_OFFS      0
> +#define SMC_PARAM_W2_OFFS      8
> +#define SMC_PARAM_W4_OFFS      16
> +#define SMC_PARAM_W6_OFFS      24
> +
> +/* void smccc_call32(struct smccc_param32 *param) */
> +ENTRY(smccc_call32)
> +       stp     x28, x30, [sp, #-16]!

Why are you saving lr?

> +       mov     x28, x0
> +       ldp     w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> +       ldp     w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> +       ldp     w4, w5, [x28, #SMC_PARAM_W4_OFFS]
> +       ldp     w6, w7, [x28, #SMC_PARAM_W6_OFFS]
> +       smc     #0
> +       stp     w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> +       stp     w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> +       ldp     x28, x30, [sp], #16
> +       ret
> +ENDPROC(smccc_call32)

Could we deal with this like we do for PSCI instead? (see
__invoke_psci_fn_smc). We could also then rename psci-call.S to fw-call.S
and stick this in there too.

Will
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#1210432 — Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32

FromJens Wiklander <jens.wiklander@linaro.org>
Date2015-08-20 13:40 +0200
SubjectRe: [PATCH v5 1/5] arm/arm64: add smccc ARCH32
Message-ID<pZwml-3AQ-5@gated-at.bofh.it>
In reply to#1209955
On Wed, Aug 19, 2015 at 05:50:09PM +0100, Will Deacon wrote:
> On Wed, Aug 19, 2015 at 09:40:25AM +0100, Jens Wiklander wrote:
> > Adds helpers to do SMC based on ARM SMC Calling Convention.
> > CONFIG_HAVE_SMCCC is enabled for architectures that may support
> > the SMC instruction. It's the responsibility of the caller to
> > know if the SMC instruction is supported by the platform.
> 
> [...]
> > diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
> > new file mode 100644
> > index 0000000..3ce7fe8
> > --- /dev/null
> > +++ b/arch/arm64/kernel/smccc-call.S
> > @@ -0,0 +1,34 @@
> > +/*
> > + * Copyright (c) 2015, Linaro Limited
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License Version 2 as
> > + * published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + */
> > +#include <linux/linkage.h>
> > +
> > +#define SMC_PARAM_W0_OFFS      0
> > +#define SMC_PARAM_W2_OFFS      8
> > +#define SMC_PARAM_W4_OFFS      16
> > +#define SMC_PARAM_W6_OFFS      24
> > +
> > +/* void smccc_call32(struct smccc_param32 *param) */
> > +ENTRY(smccc_call32)
> > +       stp     x28, x30, [sp, #-16]!
> 
> Why are you saving lr?

Agree, no point in saving lr, but I still need to decrease sp with 16 to
maintain correct alignment. I'll do it with an str instruction instead.

> 
> > +       mov     x28, x0
> > +       ldp     w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> > +       ldp     w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> > +       ldp     w4, w5, [x28, #SMC_PARAM_W4_OFFS]
> > +       ldp     w6, w7, [x28, #SMC_PARAM_W6_OFFS]
> > +       smc     #0
> > +       stp     w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> > +       stp     w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> > +       ldp     x28, x30, [sp], #16
> > +       ret
> > +ENDPROC(smccc_call32)
> 
> Could we deal with this like we do for PSCI instead? (see
> __invoke_psci_fn_smc). We could also then rename psci-call.S to fw-call.S
> and stick this in there too.

I assume you're referring to when to use "hvc" and "smc".

I would rather consider smccc_call32() a primitive function that a
driver may use if it's configured to do so, for instance via DT. When an
"hvc" should be used instead of an "smc" up to the driver to decide
based how it's configured.

When merging psci-call.S and smccc-call.S into fw-call.S, what should I
do about smccc.c? I need to export the smccc_call32 function somewhere
as it could be used from a loadable module.

--
Thanks,
Jens
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#1210745 — Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32

FromMark Rutland <mark.rutland@arm.com>
Date2015-08-20 23:40 +0200
SubjectRe: [PATCH v5 1/5] arm/arm64: add smccc ARCH32
Message-ID<pZFIZ-io-9@gated-at.bofh.it>
In reply to#1210432
On Thu, Aug 20, 2015 at 12:37:29PM +0100, Jens Wiklander wrote:
> On Wed, Aug 19, 2015 at 05:50:09PM +0100, Will Deacon wrote:
> > On Wed, Aug 19, 2015 at 09:40:25AM +0100, Jens Wiklander wrote:
> > > Adds helpers to do SMC based on ARM SMC Calling Convention.
> > > CONFIG_HAVE_SMCCC is enabled for architectures that may support
> > > the SMC instruction. It's the responsibility of the caller to
> > > know if the SMC instruction is supported by the platform.

[...]

> > > +       mov     x28, x0
> > > +       ldp     w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> > > +       ldp     w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> > > +       ldp     w4, w5, [x28, #SMC_PARAM_W4_OFFS]
> > > +       ldp     w6, w7, [x28, #SMC_PARAM_W6_OFFS]
> > > +       smc     #0
> > > +       stp     w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> > > +       stp     w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> > > +       ldp     x28, x30, [sp], #16
> > > +       ret
> > > +ENDPROC(smccc_call32)
> > 
> > Could we deal with this like we do for PSCI instead? (see
> > __invoke_psci_fn_smc). We could also then rename psci-call.S to fw-call.S
> > and stick this in there too.
> 
> I assume you're referring to when to use "hvc" and "smc".

I assume he's on about passing the values in registers rather than a struct.

From the looks of the SMC Calling Convention documentation, it's valid to have
return values in registers r0-r3, which necessitates the use of a struct (at
least for the return values).

Thanks,
Mark.

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#1211045 — Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32

FromWill Deacon <will.deacon@arm.com>
Date2015-08-21 11:30 +0200
SubjectRe: [PATCH v5 1/5] arm/arm64: add smccc ARCH32
Message-ID<pZQO9-7UZ-55@gated-at.bofh.it>
In reply to#1210432
On Thu, Aug 20, 2015 at 12:37:29PM +0100, Jens Wiklander wrote:
> On Wed, Aug 19, 2015 at 05:50:09PM +0100, Will Deacon wrote:
> > On Wed, Aug 19, 2015 at 09:40:25AM +0100, Jens Wiklander wrote:
> > > Adds helpers to do SMC based on ARM SMC Calling Convention.
> > > CONFIG_HAVE_SMCCC is enabled for architectures that may support
> > > the SMC instruction. It's the responsibility of the caller to
> > > know if the SMC instruction is supported by the platform.
> > 
> > [...]
> > > diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
> > > new file mode 100644
> > > index 0000000..3ce7fe8
> > > --- /dev/null
> > > +++ b/arch/arm64/kernel/smccc-call.S
> > > @@ -0,0 +1,34 @@
> > > +/*
> > > + * Copyright (c) 2015, Linaro Limited
> > > + *
> > > + * This program is free software; you can redistribute it and/or modify
> > > + * it under the terms of the GNU General Public License Version 2 as
> > > + * published by the Free Software Foundation.
> > > + *
> > > + * This program is distributed in the hope that it will be useful,
> > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > > + * GNU General Public License for more details.
> > > + *
> > > + */
> > > +#include <linux/linkage.h>
> > > +
> > > +#define SMC_PARAM_W0_OFFS      0
> > > +#define SMC_PARAM_W2_OFFS      8
> > > +#define SMC_PARAM_W4_OFFS      16
> > > +#define SMC_PARAM_W6_OFFS      24
> > > +
> > > +/* void smccc_call32(struct smccc_param32 *param) */
> > > +ENTRY(smccc_call32)
> > > +       stp     x28, x30, [sp, #-16]!
> > 
> > Why are you saving lr?
> 
> Agree, no point in saving lr, but I still need to decrease sp with 16 to
> maintain correct alignment. I'll do it with an str instruction instead.

That or pad out with xzr

> > 
> > > +       mov     x28, x0
> > > +       ldp     w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> > > +       ldp     w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> > > +       ldp     w4, w5, [x28, #SMC_PARAM_W4_OFFS]
> > > +       ldp     w6, w7, [x28, #SMC_PARAM_W6_OFFS]
> > > +       smc     #0
> > > +       stp     w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> > > +       stp     w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> > > +       ldp     x28, x30, [sp], #16
> > > +       ret
> > > +ENDPROC(smccc_call32)
> > 
> > Could we deal with this like we do for PSCI instead? (see
> > __invoke_psci_fn_smc). We could also then rename psci-call.S to fw-call.S
> > and stick this in there too.
> 
> I assume you're referring to when to use "hvc" and "smc".

No, I mean use a C prototype to avoid marshalling the parameters in assembly
like this. As Rutland pointed out, the return value is a bit messy, but
the arguments align nicely with the PCS afaict.

Will
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#1211121 — Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32

FromJens Wiklander <jens.wiklander@linaro.org>
Date2015-08-21 13:50 +0200
SubjectRe: [PATCH v5 1/5] arm/arm64: add smccc ARCH32
Message-ID<pZSZz-2x5-1@gated-at.bofh.it>
In reply to#1211045
On Fri, Aug 21, 2015 at 10:24:30AM +0100, Will Deacon wrote:
> On Thu, Aug 20, 2015 at 12:37:29PM +0100, Jens Wiklander wrote:
> > On Wed, Aug 19, 2015 at 05:50:09PM +0100, Will Deacon wrote:
> > > On Wed, Aug 19, 2015 at 09:40:25AM +0100, Jens Wiklander wrote:
> > > > Adds helpers to do SMC based on ARM SMC Calling Convention.
> > > > CONFIG_HAVE_SMCCC is enabled for architectures that may support
> > > > the SMC instruction. It's the responsibility of the caller to
> > > > know if the SMC instruction is supported by the platform.
> > > 
> > > [...]
> > > > diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
> > > > new file mode 100644
> > > > index 0000000..3ce7fe8
> > > > --- /dev/null
> > > > +++ b/arch/arm64/kernel/smccc-call.S
> > > > @@ -0,0 +1,34 @@
> > > > +/*
> > > > + * Copyright (c) 2015, Linaro Limited
> > > > + *
> > > > + * This program is free software; you can redistribute it and/or modify
> > > > + * it under the terms of the GNU General Public License Version 2 as
> > > > + * published by the Free Software Foundation.
> > > > + *
> > > > + * This program is distributed in the hope that it will be useful,
> > > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > > > + * GNU General Public License for more details.
> > > > + *
> > > > + */
> > > > +#include <linux/linkage.h>
> > > > +
> > > > +#define SMC_PARAM_W0_OFFS      0
> > > > +#define SMC_PARAM_W2_OFFS      8
> > > > +#define SMC_PARAM_W4_OFFS      16
> > > > +#define SMC_PARAM_W6_OFFS      24
> > > > +
> > > > +/* void smccc_call32(struct smccc_param32 *param) */
> > > > +ENTRY(smccc_call32)
> > > > +       stp     x28, x30, [sp, #-16]!
> > > 
> > > Why are you saving lr?
> > 
> > Agree, no point in saving lr, but I still need to decrease sp with 16 to
> > maintain correct alignment. I'll do it with an str instruction instead.
> 
> That or pad out with xzr
> 
> > > 
> > > > +       mov     x28, x0
> > > > +       ldp     w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> > > > +       ldp     w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> > > > +       ldp     w4, w5, [x28, #SMC_PARAM_W4_OFFS]
> > > > +       ldp     w6, w7, [x28, #SMC_PARAM_W6_OFFS]
> > > > +       smc     #0
> > > > +       stp     w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> > > > +       stp     w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> > > > +       ldp     x28, x30, [sp], #16
> > > > +       ret
> > > > +ENDPROC(smccc_call32)
> > > 
> > > Could we deal with this like we do for PSCI instead? (see
> > > __invoke_psci_fn_smc). We could also then rename psci-call.S to fw-call.S
> > > and stick this in there too.
> > 
> > I assume you're referring to when to use "hvc" and "smc".
> 
> No, I mean use a C prototype to avoid marshalling the parameters in assembly
> like this. As Rutland pointed out, the return value is a bit messy, but
> the arguments align nicely with the PCS afaict.

If possible I'd like the function to have the same prototype for both
arm and arm64. For arm it's not possible to supply more than 4
parameters. To fully support SMC Calling Convention we need to be able
to pass 8 parameters and have 4 return values. The OP-TEE driver in this
patch set depends on this. I don't see how we can avoid the marshalling
here.

We could have two versions of the SMCCC functions, one simplified which
only uses registers and one complete like this one with marshalling.

Thanks,
Jens
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#1209713 — [PATCH v5 2/5] dt/bindings: add bindings for optee

FromJens Wiklander <jens.wiklander@linaro.org>
Date2015-08-19 10:50 +0200
Subject[PATCH v5 2/5] dt/bindings: add bindings for optee
Message-ID<pZ7ei-Nx-27@gated-at.bofh.it>
In reply to#1209707
Introduces optee prefix and adds bindings for ARM TrustZone based OP-TEE
implementation.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
---
 Documentation/devicetree/bindings/optee/optee.txt     | 17 +++++++++++++++++
 Documentation/devicetree/bindings/vendor-prefixes.txt |  1 +
 2 files changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/optee/optee.txt

diff --git a/Documentation/devicetree/bindings/optee/optee.txt b/Documentation/devicetree/bindings/optee/optee.txt
new file mode 100644
index 0000000..4a6ff10
--- /dev/null
+++ b/Documentation/devicetree/bindings/optee/optee.txt
@@ -0,0 +1,17 @@
+OP-TEE Device Tree Bindings
+
+OP-TEE is a piece of software using hardware features to provide a Trusted
+Execution Environment. The security can be provided with ARM TrustZone, but
+also by virtualization or a separate chip. As there's no single OP-TEE
+vendor we're using "optee" as the first part of compatible property,
+indicating the OP-TEE protocol is used when communicating with the secure
+world.
+
+* OP-TEE based on ARM TrustZone required properties:
+
+- compatible="optee,optee-tz"
+
+Example:
+	optee {
+		compatible="optee,optee-tz";
+	};
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 8033919..17c2a7e 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -141,6 +141,7 @@ nvidia	NVIDIA
 nxp	NXP Semiconductors
 onnn	ON Semiconductor Corp.
 opencores	OpenCores.org
+optee	OP-TEE, Open Portable Trusted Execution Environment
 ortustech	Ortus Technology Co., Ltd.
 ovti	OmniVision Technologies
 panasonic	Panasonic Corporation
-- 
1.9.1

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