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| Started by | Jisheng Zhang <jszhang@marvell.com> |
|---|---|
| First post | 2015-08-17 13:40 +0200 |
| Last post | 2015-08-17 13:50 +0200 |
| Articles | 2 — 1 participant |
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[PATCH] mmc: sdhci: also set driver type for MMC_DDR52 Jisheng Zhang <jszhang@marvell.com> - 2015-08-17 13:40 +0200
Re: [PATCH] mmc: sdhci: also set driver type for MMC_DDR52 Jisheng Zhang <jszhang@marvell.com> - 2015-08-17 13:50 +0200
| From | Jisheng Zhang <jszhang@marvell.com> |
|---|---|
| Date | 2015-08-17 13:40 +0200 |
| Subject | [PATCH] mmc: sdhci: also set driver type for MMC_DDR52 |
| Message-ID | <pYqVI-64i-17@gated-at.bofh.it> |
commit 08f90f14aa93ad424c20bb176b52f329583e2183 ("mmc: sdhci: clarify
DDR timing mode between SD-UHS and eMMC") added MMC_DDR52 as eMMC's DDR
mode to be distinguished from SD-UHS, but it missed setting driver type
for MMC_DDR52 timing mode. This patches adds the missing driver type
setting.
Fixes: 79f7ae7c45a6("mmc: clarify DDR timing mode between SD-UHS and eMMC")
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
drivers/mmc/host/sdhci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 1dbe932..32f2a07 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1559,7 +1559,8 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
(ios->timing == MMC_TIMING_UHS_SDR25) ||
(ios->timing == MMC_TIMING_UHS_SDR50) ||
(ios->timing == MMC_TIMING_UHS_SDR104) ||
- (ios->timing == MMC_TIMING_UHS_DDR50))) {
+ (ios->timing == MMC_TIMING_UHS_DDR50) ||
+ (ios->timing == MMC_TIMING_MMC_DDR52))) {
u16 preset;
sdhci_enable_preset_value(host, true);
--
2.5.0
--
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| From | Jisheng Zhang <jszhang@marvell.com> |
|---|---|
| Date | 2015-08-17 13:50 +0200 |
| Message-ID | <pYr5p-6fG-7@gated-at.bofh.it> |
| In reply to | #1208542 |
On Mon, 17 Aug 2015 19:34:39 +0800
Jisheng Zhang <jszhang@marvell.com> wrote:
> commit 08f90f14aa93ad424c20bb176b52f329583e2183 ("mmc: sdhci: clarify
> DDR timing mode between SD-UHS and eMMC") added MMC_DDR52 as eMMC's DDR
> mode to be distinguished from SD-UHS, but it missed setting driver type
> for MMC_DDR52 timing mode. This patches adds the missing driver type
> setting.
Sorry, please ignore this one. I made a mistake. will send out new version
>
> Fixes: 79f7ae7c45a6("mmc: clarify DDR timing mode between SD-UHS and eMMC")
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> ---
> drivers/mmc/host/sdhci.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 1dbe932..32f2a07 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1559,7 +1559,8 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
> (ios->timing == MMC_TIMING_UHS_SDR25) ||
> (ios->timing == MMC_TIMING_UHS_SDR50) ||
> (ios->timing == MMC_TIMING_UHS_SDR104) ||
> - (ios->timing == MMC_TIMING_UHS_DDR50))) {
> + (ios->timing == MMC_TIMING_UHS_DDR50) ||
> + (ios->timing == MMC_TIMING_MMC_DDR52))) {
> u16 preset;
>
> sdhci_enable_preset_value(host, true);
--
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