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Groups > linux.kernel > #1207511 > unrolled thread

[PATCH] acpi, apei, arm64: APEI initial support for aarch64.

Started byfu.wei@linaro.org
First post2015-08-14 14:40 +0200
Last post2015-08-18 11:30 +0200
Articles 8 — 4 participants

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  [PATCH] acpi, apei, arm64: APEI initial support for aarch64. fu.wei@linaro.org - 2015-08-14 14:40 +0200
    Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64. Fu Wei <fu.wei@linaro.org> - 2015-08-14 14:40 +0200
      Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64. "Zhang, Jonathan Zhixiong" <zjzhang@codeaurora.org> - 2015-08-14 20:30 +0200
        Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64. Fu Wei <fu.wei@linaro.org> - 2015-08-15 08:50 +0200
    Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64. Will Deacon <will.deacon@arm.com> - 2015-08-17 12:10 +0200
      Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64. "Zhang, Jonathan Zhixiong" <zjzhang@codeaurora.org> - 2015-08-18 01:20 +0200
        Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64. Will Deacon <will.deacon@arm.com> - 2015-08-18 10:40 +0200
          Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64. Fu Wei <fu.wei@linaro.org> - 2015-08-18 11:30 +0200

#1207511 — [PATCH] acpi, apei, arm64: APEI initial support for aarch64.

Fromfu.wei@linaro.org
Date2015-08-14 14:40 +0200
Subject[PATCH] acpi, apei, arm64: APEI initial support for aarch64.
Message-ID<pXmr7-28w-3@gated-at.bofh.it>
From: Tomasz Nowicki <tomasz.nowicki@linaro.org>

This commit provides APEI arch-specific bits for aarch64

Changelog:
  Fu Wei:
    Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
    Delete arch/arm64/kernel/apei.c.
    Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff".

Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
Signed-off-by: Fu Wei <fu.wei@linaro.org>
---
 arch/arm64/Kconfig            |  1 +
 arch/arm64/include/asm/acpi.h | 11 +++++++++++
 arch/arm64/kernel/acpi.c      |  4 ++++
 3 files changed, 16 insertions(+)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 318175f..6144c9d 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -3,6 +3,7 @@ config ARM64
 	select ACPI_CCA_REQUIRED if ACPI
 	select ACPI_GENERIC_GSI if ACPI
 	select ACPI_REDUCED_HARDWARE_ONLY if ACPI
+	select HAVE_ACPI_APEI if ACPI
 	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
 	select ARCH_HAS_ELF_RANDOMIZE
 	select ARCH_HAS_GCOV_PROFILE_ALL
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index a17b623..ced6e25 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -22,6 +22,7 @@
 #ifdef CONFIG_ACPI_APEI
 #include <linux/efi.h>
 #include <asm/pgtable.h>
+#include <asm/tlbflush.h>
 #endif
 
 /* Macros for consistency checks of the GICC subtable of MADT */
@@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t;
 extern int acpi_disabled;
 extern int acpi_noirq;
 extern int acpi_pci_disabled;
+#ifdef CONFIG_ACPI_APEI
+extern int acpi_disable_cmcff;
+#endif
 
 static inline void disable_acpi(void)
 {
@@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void)
 static inline void arch_fix_phys_package_id(int num, u32 slot) { }
 void __init acpi_init_cpus(void);
 
+#ifdef CONFIG_ACPI_APEI
+static inline void arch_apei_flush_tlb_one(unsigned long addr)
+{
+	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
+}
+#endif
+
 #else
 static inline void acpi_init_cpus(void) { }
 #endif /* CONFIG_ACPI */
diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index 19de753..bd1be9a 100644
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
@@ -36,6 +36,10 @@ EXPORT_SYMBOL(acpi_disabled);
 int acpi_pci_disabled = 1;	/* skip ACPI PCI scan and IRQ initialization */
 EXPORT_SYMBOL(acpi_pci_disabled);
 
+#ifdef CONFIG_ACPI_APEI
+int acpi_disable_cmcff;
+#endif
+
 static bool param_acpi_off __initdata;
 static bool param_acpi_force __initdata;
 
-- 
1.9.1

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#1207516

FromFu Wei <fu.wei@linaro.org>
Date2015-08-14 14:40 +0200
Message-ID<pXmr7-28w-9@gated-at.bofh.it>
In reply to#1207511
Hi all,

This patch depends on https://lkml.org/lkml/2015/8/8/169
[PATCH V11 4/5] arm64: apei: implement arch_apei_get_mem_attributes(),
which has been in the "next" branch of
git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi.git

FYI
Thanks

On 14 August 2015 at 20:35,  <fu.wei@linaro.org> wrote:
> From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>
> This commit provides APEI arch-specific bits for aarch64
>
> Changelog:
>   Fu Wei:
>     Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
>     Delete arch/arm64/kernel/apei.c.
>     Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff".
>
> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> Signed-off-by: Fu Wei <fu.wei@linaro.org>
> ---
>  arch/arm64/Kconfig            |  1 +
>  arch/arm64/include/asm/acpi.h | 11 +++++++++++
>  arch/arm64/kernel/acpi.c      |  4 ++++
>  3 files changed, 16 insertions(+)
>
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 318175f..6144c9d 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -3,6 +3,7 @@ config ARM64
>         select ACPI_CCA_REQUIRED if ACPI
>         select ACPI_GENERIC_GSI if ACPI
>         select ACPI_REDUCED_HARDWARE_ONLY if ACPI
> +       select HAVE_ACPI_APEI if ACPI
>         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
>         select ARCH_HAS_ELF_RANDOMIZE
>         select ARCH_HAS_GCOV_PROFILE_ALL
> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
> index a17b623..ced6e25 100644
> --- a/arch/arm64/include/asm/acpi.h
> +++ b/arch/arm64/include/asm/acpi.h
> @@ -22,6 +22,7 @@
>  #ifdef CONFIG_ACPI_APEI
>  #include <linux/efi.h>
>  #include <asm/pgtable.h>
> +#include <asm/tlbflush.h>
>  #endif
>
>  /* Macros for consistency checks of the GICC subtable of MADT */
> @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t;
>  extern int acpi_disabled;
>  extern int acpi_noirq;
>  extern int acpi_pci_disabled;
> +#ifdef CONFIG_ACPI_APEI
> +extern int acpi_disable_cmcff;
> +#endif
>
>  static inline void disable_acpi(void)
>  {
> @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void)
>  static inline void arch_fix_phys_package_id(int num, u32 slot) { }
>  void __init acpi_init_cpus(void);
>
> +#ifdef CONFIG_ACPI_APEI
> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
> +{
> +       flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
> +}
> +#endif
> +
>  #else
>  static inline void acpi_init_cpus(void) { }
>  #endif /* CONFIG_ACPI */
> diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
> index 19de753..bd1be9a 100644
> --- a/arch/arm64/kernel/acpi.c
> +++ b/arch/arm64/kernel/acpi.c
> @@ -36,6 +36,10 @@ EXPORT_SYMBOL(acpi_disabled);
>  int acpi_pci_disabled = 1;     /* skip ACPI PCI scan and IRQ initialization */
>  EXPORT_SYMBOL(acpi_pci_disabled);
>
> +#ifdef CONFIG_ACPI_APEI
> +int acpi_disable_cmcff;
> +#endif
> +
>  static bool param_acpi_off __initdata;
>  static bool param_acpi_force __initdata;
>
> --
> 1.9.1
>



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat Software (Beijing) Co.,Ltd.Shanghai Branch
Ph: +86 21 61221326(direct)
Ph: +86 186 2020 4684 (mobile)
Room 1512, Regus One Corporate Avenue,Level 15,
One Corporate Avenue,222 Hubin Road,Huangpu District,
Shanghai,China 200021
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#1207835

From"Zhang, Jonathan Zhixiong" <zjzhang@codeaurora.org>
Date2015-08-14 20:30 +0200
Message-ID<pXrTR-1Dj-55@gated-at.bofh.it>
In reply to#1207516
On 8/14/2015 5:39 AM, Fu Wei wrote:
> Hi all,
>
> This patch depends on https://lkml.org/lkml/2015/8/8/169
> [PATCH V11 4/5] arm64: apei: implement arch_apei_get_mem_attributes(),
> which has been in the "next" branch of
> git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi.git
>
> FYI
> Thanks
>
> On 14 August 2015 at 20:35,  <fu.wei@linaro.org> wrote:
>> From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>>
>> This commit provides APEI arch-specific bits for aarch64
>>
>> Changelog:
>>    Fu Wei:
>>      Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
>>      Delete arch/arm64/kernel/apei.c.
>>      Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff".
>>
>> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> Signed-off-by: Fu Wei <fu.wei@linaro.org>
>> ---
>>   arch/arm64/Kconfig            |  1 +
>>   arch/arm64/include/asm/acpi.h | 11 +++++++++++
>>   arch/arm64/kernel/acpi.c      |  4 ++++
>>   3 files changed, 16 insertions(+)
>>
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 318175f..6144c9d 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -3,6 +3,7 @@ config ARM64
>>          select ACPI_CCA_REQUIRED if ACPI
>>          select ACPI_GENERIC_GSI if ACPI
>>          select ACPI_REDUCED_HARDWARE_ONLY if ACPI
>> +       select HAVE_ACPI_APEI if ACPI
>>          select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
>>          select ARCH_HAS_ELF_RANDOMIZE
>>          select ARCH_HAS_GCOV_PROFILE_ALL
>> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
>> index a17b623..ced6e25 100644
>> --- a/arch/arm64/include/asm/acpi.h
>> +++ b/arch/arm64/include/asm/acpi.h
>> @@ -22,6 +22,7 @@
>>   #ifdef CONFIG_ACPI_APEI
>>   #include <linux/efi.h>
>>   #include <asm/pgtable.h>
>> +#include <asm/tlbflush.h>
>>   #endif
>>
>>   /* Macros for consistency checks of the GICC subtable of MADT */
>> @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t;
>>   extern int acpi_disabled;
>>   extern int acpi_noirq;
>>   extern int acpi_pci_disabled;
>> +#ifdef CONFIG_ACPI_APEI
>> +extern int acpi_disable_cmcff;
>> +#endif
>>
>>   static inline void disable_acpi(void)
>>   {
>> @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void)
>>   static inline void arch_fix_phys_package_id(int num, u32 slot) { }
>>   void __init acpi_init_cpus(void);
>>
>> +#ifdef CONFIG_ACPI_APEI
>> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
>> +{
>> +       flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
>> +}
>> +#endif
>> +
>>   #else
>>   static inline void acpi_init_cpus(void) { }
>>   #endif /* CONFIG_ACPI */
>> diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
>> index 19de753..bd1be9a 100644
>> --- a/arch/arm64/kernel/acpi.c
>> +++ b/arch/arm64/kernel/acpi.c
>> @@ -36,6 +36,10 @@ EXPORT_SYMBOL(acpi_disabled);
>>   int acpi_pci_disabled = 1;     /* skip ACPI PCI scan and IRQ initialization */
>>   EXPORT_SYMBOL(acpi_pci_disabled);
>>
>> +#ifdef CONFIG_ACPI_APEI
>> +int acpi_disable_cmcff;
>> +#endif
>> +
>>   static bool param_acpi_off __initdata;
>>   static bool param_acpi_force __initdata;
>>
>> --
>> 1.9.1
>>
>
>
>
I tested this patch on an arm64 platform, the APEI functionalities
work as expected.
   Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>

-- 
Jonathan (Zhixiong) Zhang
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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#1208025

FromFu Wei <fu.wei@linaro.org>
Date2015-08-15 08:50 +0200
Message-ID<pXDrX-1XO-7@gated-at.bofh.it>
In reply to#1207835
Hi all
Add Tomasz Nowicki <tn@semihalf.com> in the loop

On 15 August 2015 at 02:27, Zhang, Jonathan Zhixiong
<zjzhang@codeaurora.org> wrote:
>
> On 8/14/2015 5:39 AM, Fu Wei wrote:
>>
>> Hi all,
>>
>> This patch depends on https://lkml.org/lkml/2015/8/8/169
>> [PATCH V11 4/5] arm64: apei: implement arch_apei_get_mem_attributes(),
>> which has been in the "next" branch of
>> git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi.git
>>
>> FYI
>> Thanks
>>
>> On 14 August 2015 at 20:35,  <fu.wei@linaro.org> wrote:
>>>
>>> From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>>>
>>> This commit provides APEI arch-specific bits for aarch64
>>>
>>> Changelog:
>>>    Fu Wei:
>>>      Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
>>>      Delete arch/arm64/kernel/apei.c.
>>>      Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff".
>>>
>>> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>>> Signed-off-by: Fu Wei <fu.wei@linaro.org>
>>> ---
>>>   arch/arm64/Kconfig            |  1 +
>>>   arch/arm64/include/asm/acpi.h | 11 +++++++++++
>>>   arch/arm64/kernel/acpi.c      |  4 ++++
>>>   3 files changed, 16 insertions(+)
>>>
>>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>>> index 318175f..6144c9d 100644
>>> --- a/arch/arm64/Kconfig
>>> +++ b/arch/arm64/Kconfig
>>> @@ -3,6 +3,7 @@ config ARM64
>>>          select ACPI_CCA_REQUIRED if ACPI
>>>          select ACPI_GENERIC_GSI if ACPI
>>>          select ACPI_REDUCED_HARDWARE_ONLY if ACPI
>>> +       select HAVE_ACPI_APEI if ACPI
>>>          select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
>>>          select ARCH_HAS_ELF_RANDOMIZE
>>>          select ARCH_HAS_GCOV_PROFILE_ALL
>>> diff --git a/arch/arm64/include/asm/acpi.h
>>> b/arch/arm64/include/asm/acpi.h
>>> index a17b623..ced6e25 100644
>>> --- a/arch/arm64/include/asm/acpi.h
>>> +++ b/arch/arm64/include/asm/acpi.h
>>> @@ -22,6 +22,7 @@
>>>   #ifdef CONFIG_ACPI_APEI
>>>   #include <linux/efi.h>
>>>   #include <asm/pgtable.h>
>>> +#include <asm/tlbflush.h>
>>>   #endif
>>>
>>>   /* Macros for consistency checks of the GICC subtable of MADT */
>>> @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t;
>>>   extern int acpi_disabled;
>>>   extern int acpi_noirq;
>>>   extern int acpi_pci_disabled;
>>> +#ifdef CONFIG_ACPI_APEI
>>> +extern int acpi_disable_cmcff;
>>> +#endif
>>>
>>>   static inline void disable_acpi(void)
>>>   {
>>> @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void)
>>>   static inline void arch_fix_phys_package_id(int num, u32 slot) { }
>>>   void __init acpi_init_cpus(void);
>>>
>>> +#ifdef CONFIG_ACPI_APEI
>>> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
>>> +{
>>> +       flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
>>> +}
>>> +#endif
>>> +
>>>   #else
>>>   static inline void acpi_init_cpus(void) { }
>>>   #endif /* CONFIG_ACPI */
>>> diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
>>> index 19de753..bd1be9a 100644
>>> --- a/arch/arm64/kernel/acpi.c
>>> +++ b/arch/arm64/kernel/acpi.c
>>> @@ -36,6 +36,10 @@ EXPORT_SYMBOL(acpi_disabled);
>>>   int acpi_pci_disabled = 1;     /* skip ACPI PCI scan and IRQ
>>> initialization */
>>>   EXPORT_SYMBOL(acpi_pci_disabled);
>>>
>>> +#ifdef CONFIG_ACPI_APEI
>>> +int acpi_disable_cmcff;
>>> +#endif
>>> +
>>>   static bool param_acpi_off __initdata;
>>>   static bool param_acpi_force __initdata;
>>>
>>> --
>>> 1.9.1
>>>
>>
>>
>>
> I tested this patch on an arm64 platform, the APEI functionalities
> work as expected.
>   Tested-by: Jonathan (Zhixiong) Zhang <zjzhang@codeaurora.org>
>
> --
> Jonathan (Zhixiong) Zhang
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat Software (Beijing) Co.,Ltd.Shanghai Branch
Ph: +86 21 61221326(direct)
Ph: +86 186 2020 4684 (mobile)
Room 1512, Regus One Corporate Avenue,Level 15,
One Corporate Avenue,222 Hubin Road,Huangpu District,
Shanghai,China 200021
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
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#1208512

FromWill Deacon <will.deacon@arm.com>
Date2015-08-17 12:10 +0200
Message-ID<pYpwC-4aD-15@gated-at.bofh.it>
In reply to#1207511
On Fri, Aug 14, 2015 at 01:35:53PM +0100, fu.wei@linaro.org wrote:
> From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> 
> This commit provides APEI arch-specific bits for aarch64
> 
> Changelog:
>   Fu Wei:
>     Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
>     Delete arch/arm64/kernel/apei.c.
>     Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff".
> 
> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
> Signed-off-by: Fu Wei <fu.wei@linaro.org>
> ---
>  arch/arm64/Kconfig            |  1 +
>  arch/arm64/include/asm/acpi.h | 11 +++++++++++
>  arch/arm64/kernel/acpi.c      |  4 ++++
>  3 files changed, 16 insertions(+)
> 
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 318175f..6144c9d 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -3,6 +3,7 @@ config ARM64
>  	select ACPI_CCA_REQUIRED if ACPI
>  	select ACPI_GENERIC_GSI if ACPI
>  	select ACPI_REDUCED_HARDWARE_ONLY if ACPI
> +	select HAVE_ACPI_APEI if ACPI
>  	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
>  	select ARCH_HAS_ELF_RANDOMIZE
>  	select ARCH_HAS_GCOV_PROFILE_ALL
> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
> index a17b623..ced6e25 100644
> --- a/arch/arm64/include/asm/acpi.h
> +++ b/arch/arm64/include/asm/acpi.h
> @@ -22,6 +22,7 @@
>  #ifdef CONFIG_ACPI_APEI
>  #include <linux/efi.h>
>  #include <asm/pgtable.h>
> +#include <asm/tlbflush.h>
>  #endif
>  
>  /* Macros for consistency checks of the GICC subtable of MADT */
> @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t;
>  extern int acpi_disabled;
>  extern int acpi_noirq;
>  extern int acpi_pci_disabled;
> +#ifdef CONFIG_ACPI_APEI
> +extern int acpi_disable_cmcff;
> +#endif
>  
>  static inline void disable_acpi(void)
>  {
> @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void)
>  static inline void arch_fix_phys_package_id(int num, u32 slot) { }
>  void __init acpi_init_cpus(void);
>  
> +#ifdef CONFIG_ACPI_APEI
> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
> +{
> +	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
> +}
> +#endif

Looking at the callers of this function, I suspect we could downgrade it
to a local CPU invalidation if we wanted. However, this isn't a hot-path
so it's fine to stay like it is for now.

Will
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#1208943

From"Zhang, Jonathan Zhixiong" <zjzhang@codeaurora.org>
Date2015-08-18 01:20 +0200
Message-ID<pYBR8-4YO-7@gated-at.bofh.it>
In reply to#1208512

On 8/17/2015 3:01 AM, Will Deacon wrote:
> On Fri, Aug 14, 2015 at 01:35:53PM +0100, fu.wei@linaro.org wrote:
>> From: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>>
>> This commit provides APEI arch-specific bits for aarch64
>>
>> Changelog:
>>    Fu Wei:
>>      Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h.
>>      Delete arch/arm64/kernel/apei.c.
>>      Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff".
>>
>> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> Signed-off-by: Fu Wei <fu.wei@linaro.org>
>> ---
>>   arch/arm64/Kconfig            |  1 +
>>   arch/arm64/include/asm/acpi.h | 11 +++++++++++
>>   arch/arm64/kernel/acpi.c      |  4 ++++
>>   3 files changed, 16 insertions(+)
>>
>> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
>> index 318175f..6144c9d 100644
>> --- a/arch/arm64/Kconfig
>> +++ b/arch/arm64/Kconfig
>> @@ -3,6 +3,7 @@ config ARM64
>>   	select ACPI_CCA_REQUIRED if ACPI
>>   	select ACPI_GENERIC_GSI if ACPI
>>   	select ACPI_REDUCED_HARDWARE_ONLY if ACPI
>> +	select HAVE_ACPI_APEI if ACPI
>>   	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
>>   	select ARCH_HAS_ELF_RANDOMIZE
>>   	select ARCH_HAS_GCOV_PROFILE_ALL
>> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
>> index a17b623..ced6e25 100644
>> --- a/arch/arm64/include/asm/acpi.h
>> +++ b/arch/arm64/include/asm/acpi.h
>> @@ -22,6 +22,7 @@
>>   #ifdef CONFIG_ACPI_APEI
>>   #include <linux/efi.h>
>>   #include <asm/pgtable.h>
>> +#include <asm/tlbflush.h>
>>   #endif
>>
>>   /* Macros for consistency checks of the GICC subtable of MADT */
>> @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t;
>>   extern int acpi_disabled;
>>   extern int acpi_noirq;
>>   extern int acpi_pci_disabled;
>> +#ifdef CONFIG_ACPI_APEI
>> +extern int acpi_disable_cmcff;
>> +#endif
>>
>>   static inline void disable_acpi(void)
>>   {
>> @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void)
>>   static inline void arch_fix_phys_package_id(int num, u32 slot) { }
>>   void __init acpi_init_cpus(void);
>>
>> +#ifdef CONFIG_ACPI_APEI
>> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
>> +{
>> +	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
>> +}
>> +#endif
>
> Looking at the callers of this function, I suspect we could downgrade it
> to a local CPU invalidation if we wanted. However, this isn't a hot-path
> so it's fine to stay like it is for now.
I suppose if we run "tlbi vae1" instead of "tlbi vae1is", it will be
more efficient without side effect, since both ghes_ioremap_pfn_irq()
and ghes_iounmap_irq() happen in same atomic context. However, today
arch/arm64/include/asm/tlbflush.h does not have a function tailored for
such performance optimization. Does it make sense to add a parameter to
flush_tlb_kernel_range() to allow caller to make a choice?
   static inline void flush_tlb_kernel_range(unsigned long start,
	unsigned long end, bool local)
There are only two others callers of flush_tlb_kernel_range().
>
> Will
>

-- 
Jonathan (Zhixiong) Zhang
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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#1209123

FromWill Deacon <will.deacon@arm.com>
Date2015-08-18 10:40 +0200
Message-ID<pYKB4-Rg-13@gated-at.bofh.it>
In reply to#1208943
On Tue, Aug 18, 2015 at 12:19:13AM +0100, Zhang, Jonathan Zhixiong wrote:
> On 8/17/2015 3:01 AM, Will Deacon wrote:
> > On Fri, Aug 14, 2015 at 01:35:53PM +0100, fu.wei@linaro.org wrote:
> >> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
> >> index a17b623..ced6e25 100644
> >> --- a/arch/arm64/include/asm/acpi.h
> >> +++ b/arch/arm64/include/asm/acpi.h
> >> @@ -22,6 +22,7 @@
> >>   #ifdef CONFIG_ACPI_APEI
> >>   #include <linux/efi.h>
> >>   #include <asm/pgtable.h>
> >> +#include <asm/tlbflush.h>
> >>   #endif
> >>
> >>   /* Macros for consistency checks of the GICC subtable of MADT */
> >> @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t;
> >>   extern int acpi_disabled;
> >>   extern int acpi_noirq;
> >>   extern int acpi_pci_disabled;
> >> +#ifdef CONFIG_ACPI_APEI
> >> +extern int acpi_disable_cmcff;
> >> +#endif
> >>
> >>   static inline void disable_acpi(void)
> >>   {
> >> @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void)
> >>   static inline void arch_fix_phys_package_id(int num, u32 slot) { }
> >>   void __init acpi_init_cpus(void);
> >>
> >> +#ifdef CONFIG_ACPI_APEI
> >> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
> >> +{
> >> +	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
> >> +}
> >> +#endif
> >
> > Looking at the callers of this function, I suspect we could downgrade it
> > to a local CPU invalidation if we wanted. However, this isn't a hot-path
> > so it's fine to stay like it is for now.
> I suppose if we run "tlbi vae1" instead of "tlbi vae1is", it will be
> more efficient without side effect, since both ghes_ioremap_pfn_irq()
> and ghes_iounmap_irq() happen in same atomic context. However, today
> arch/arm64/include/asm/tlbflush.h does not have a function tailored for
> such performance optimization. Does it make sense to add a parameter to
> flush_tlb_kernel_range() to allow caller to make a choice?
>    static inline void flush_tlb_kernel_range(unsigned long start,
> 	unsigned long end, bool local)
> There are only two others callers of flush_tlb_kernel_range().

I've already got some patches to add things like local_flush_tlb_all,
which I'll post after the merge window (I'm currently rewriting a bunch
of the switch_mm code to try to reduce the TLBI traffic).

If this isn't a hotpath (I don't think it is), then it's probably not
worth making the optimisation without a system to benchmark it on.

Will
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#1209151

FromFu Wei <fu.wei@linaro.org>
Date2015-08-18 11:30 +0200
Message-ID<pYLns-223-11@gated-at.bofh.it>
In reply to#1209123
Hi

On 18 August 2015 at 16:31, Will Deacon <will.deacon@arm.com> wrote:
> On Tue, Aug 18, 2015 at 12:19:13AM +0100, Zhang, Jonathan Zhixiong wrote:
>> On 8/17/2015 3:01 AM, Will Deacon wrote:
>> > On Fri, Aug 14, 2015 at 01:35:53PM +0100, fu.wei@linaro.org wrote:
>> >> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
>> >> index a17b623..ced6e25 100644
>> >> --- a/arch/arm64/include/asm/acpi.h
>> >> +++ b/arch/arm64/include/asm/acpi.h
>> >> @@ -22,6 +22,7 @@
>> >>   #ifdef CONFIG_ACPI_APEI
>> >>   #include <linux/efi.h>
>> >>   #include <asm/pgtable.h>
>> >> +#include <asm/tlbflush.h>
>> >>   #endif
>> >>
>> >>   /* Macros for consistency checks of the GICC subtable of MADT */
>> >> @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t;
>> >>   extern int acpi_disabled;
>> >>   extern int acpi_noirq;
>> >>   extern int acpi_pci_disabled;
>> >> +#ifdef CONFIG_ACPI_APEI
>> >> +extern int acpi_disable_cmcff;
>> >> +#endif
>> >>
>> >>   static inline void disable_acpi(void)
>> >>   {
>> >> @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void)
>> >>   static inline void arch_fix_phys_package_id(int num, u32 slot) { }
>> >>   void __init acpi_init_cpus(void);
>> >>
>> >> +#ifdef CONFIG_ACPI_APEI
>> >> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
>> >> +{
>> >> +  flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
>> >> +}
>> >> +#endif
>> >
>> > Looking at the callers of this function, I suspect we could downgrade it
>> > to a local CPU invalidation if we wanted. However, this isn't a hot-path
>> > so it's fine to stay like it is for now.
>> I suppose if we run "tlbi vae1" instead of "tlbi vae1is", it will be
>> more efficient without side effect, since both ghes_ioremap_pfn_irq()
>> and ghes_iounmap_irq() happen in same atomic context. However, today
>> arch/arm64/include/asm/tlbflush.h does not have a function tailored for
>> such performance optimization. Does it make sense to add a parameter to
>> flush_tlb_kernel_range() to allow caller to make a choice?
>>    static inline void flush_tlb_kernel_range(unsigned long start,
>>       unsigned long end, bool local)
>> There are only two others callers of flush_tlb_kernel_range().
>
> I've already got some patches to add things like local_flush_tlb_all,
> which I'll post after the merge window (I'm currently rewriting a bunch
> of the switch_mm code to try to reduce the TLBI traffic).

If I understand correctly, these patches add new  functions, instead
of changing the existent one.
I thinks this way is better.

If we have new patch for optimizing TLB flushing, we can make a new
patchset for this in the future.
Because this patch is only for enabling APEI on aarch64.

>
> If this isn't a hotpath (I don't think it is), then it's probably not
> worth making the optimisation without a system to benchmark it on.

agree.

But please let me know if you have any suggestion on this patch.
is this patch OK for you?

>
> Will



-- 
Best regards,

Fu Wei
Software Engineer
Red Hat Software (Beijing) Co.,Ltd.Shanghai Branch
Ph: +86 21 61221326(direct)
Ph: +86 186 2020 4684 (mobile)
Room 1512, Regus One Corporate Avenue,Level 15,
One Corporate Avenue,222 Hubin Road,Huangpu District,
Shanghai,China 200021
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