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| Started by | Joachim Eastwood <manabian@gmail.com> |
|---|---|
| First post | 2015-08-13 23:00 +0200 |
| Last post | 2015-08-13 23:00 +0200 |
| Articles | 1 — 1 participant |
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Re: [PATCH V3 0/5] clk: support clocks which requires parent clock on during operation Joachim Eastwood <manabian@gmail.com> - 2015-08-13 23:00 +0200
| From | Joachim Eastwood <manabian@gmail.com> |
|---|---|
| Date | 2015-08-13 23:00 +0200 |
| Subject | Re: [PATCH V3 0/5] clk: support clocks which requires parent clock on during operation |
| Message-ID | <pX7Lt-6dP-19@gated-at.bofh.it> |
Hi Dong, On 28 July 2015 at 15:19, Dong Aisheng <aisheng.dong@freescale.com> wrote: > This patch series adds support in clock framework for clocks which operations > requires its parent clock is on. > > Such clock type is initially met on Freescale i.MX7D platform that all clocks > operations, including enable/disable, rate change and re-parent, requires its > parent clock on. No sure if any other SoC has the similar clock type. Just noticed this patch set. One of clock-controller blocks (CCU) on lpc18xx has a similar requirement. The CCU is clock fanout block with gates and the gate registers can not be accessed if the base (parent) clock for the gate is not running. Doing so causes the cpu to wedge. The workaround I have locally is to check in the is_enabled gate op if the parent is running or not. This works fine, but I am all for a more generic solution in the clk framework. I'll see if I can find the time to test your patch set. Thanks for working on this. regards, Joachim Eastwood -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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