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| Started by | Leilk Liu <leilk.liu@mediatek.com> |
|---|---|
| First post | 2015-08-07 09:30 +0200 |
| Last post | 2015-08-13 05:40 +0200 |
| Articles | 3 — 3 participants |
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[PATCH v5 3/3] arm64: dts: Add spi bus dts Leilk Liu <leilk.liu@mediatek.com> - 2015-08-07 09:30 +0200
Re: [PATCH v5 3/3] arm64: dts: Add spi bus dts Daniel Kurtz <djkurtz@chromium.org> - 2015-08-11 14:40 +0200
Re: [PATCH v5 3/3] arm64: dts: Add spi bus dts lei liu <leilk.liu@mediatek.com> - 2015-08-13 05:40 +0200
| From | Leilk Liu <leilk.liu@mediatek.com> |
|---|---|
| Date | 2015-08-07 09:30 +0200 |
| Subject | [PATCH v5 3/3] arm64: dts: Add spi bus dts |
| Message-ID | <pUKgi-10c-25@gated-at.bofh.it> |
This patch adds MT8173 spi bus controllers into device tree.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
---
Change in this patch:
1. "pad-select" is a vendor property, so change it to "mediatek,pad-select".
2. modify the property of clocks and clock-names.
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index d18ee42..066bd6a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -220,6 +220,15 @@
bias-disable;
};
};
+
+ spi_pins_a: spi0 {
+ pins_spi {
+ pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
+ <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
+ <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
+ <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
+ };
+ };
};
scpsys: scpsys@10006000 {
@@ -365,6 +374,20 @@
status = "disabled";
};
+ spi: spi@1100a000 {
+ compatible = "mediatek,mt8173-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x1100a000 0 0x1000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>;
+ clock-names = "spi-clk", "parent-clk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_pins_a>;
+ mediatek,pad-select = <0>;
+ status = "disabled";
+ };
+
i2c3: i2c3@11010000 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x11010000 0 0x70>,
--
1.8.1.1.dirty
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| From | Daniel Kurtz <djkurtz@chromium.org> |
|---|---|
| Date | 2015-08-11 14:40 +0200 |
| Message-ID | <pWh0t-5br-9@gated-at.bofh.it> |
| In reply to | #1202361 |
On Fri, Aug 7, 2015 at 3:19 PM, Leilk Liu <leilk.liu@mediatek.com> wrote:
> This patch adds MT8173 spi bus controllers into device tree.
>
> Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
> ---
> Change in this patch:
> 1. "pad-select" is a vendor property, so change it to "mediatek,pad-select".
> 2. modify the property of clocks and clock-names.
> ---
> arch/arm64/boot/dts/mediatek/mt8173.dtsi | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index d18ee42..066bd6a 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -220,6 +220,15 @@
> bias-disable;
> };
> };
> +
> + spi_pins_a: spi0 {
> + pins_spi {
> + pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
> + <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
> + <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
> + <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
> + };
> + };
> };
>
> scpsys: scpsys@10006000 {
> @@ -365,6 +374,20 @@
> status = "disabled";
> };
>
> + spi: spi@1100a000 {
> + compatible = "mediatek,mt8173-spi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0 0x1100a000 0 0x1000>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>;
> + clock-names = "spi-clk", "parent-clk";
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi_pins_a>;
> + mediatek,pad-select = <0>;
The pinctl and pad-select fields are board specific.
Please move to mt8173-evb.dtsi, along with status = "okay";
> + status = "disabled";
> + };
> +
> i2c3: i2c3@11010000 {
> compatible = "mediatek,mt8173-i2c";
> reg = <0 0x11010000 0 0x70>,
> --
> 1.8.1.1.dirty
>
> --
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| From | lei liu <leilk.liu@mediatek.com> |
|---|---|
| Date | 2015-08-13 05:40 +0200 |
| Message-ID | <pWRwZ-87V-3@gated-at.bofh.it> |
| In reply to | #1205105 |
> > + spi: spi@1100a000 {
> > + compatible = "mediatek,mt8173-spi";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0 0x1100a000 0 0x1000>;
> > + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
> > + clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>;
> > + clock-names = "spi-clk", "parent-clk";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spi_pins_a>;
> > + mediatek,pad-select = <0>;
>
> The pinctl and pad-select fields are board specific.
> Please move to mt8173-evb.dtsi, along with status = "okay";
>
OK, I will fix it.
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