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| Started by | Grygorii Strashko <grygorii.strashko@ti.com> |
|---|---|
| First post | 2015-08-12 19:50 +0200 |
| Last post | 2015-08-14 12:50 +0200 |
| Articles | 9 — 3 participants |
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[PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE Grygorii Strashko <grygorii.strashko@ti.com> - 2015-08-12 19:50 +0200
Re: [PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE Sudeep Holla <sudeep.holla@arm.com> - 2015-08-13 11:00 +0200
Re: [PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE Grygorii Strashko <grygorii.strashko@ti.com> - 2015-08-13 12:00 +0200
Re: [PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE Sudeep Holla <sudeep.holla@arm.com> - 2015-08-13 12:40 +0200
Re: [PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE Marc Zyngier <marc.zyngier@arm.com> - 2015-08-13 12:10 +0200
Re: [PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE Grygorii Strashko <grygorii.strashko@ti.com> - 2015-08-13 12:40 +0200
Re: [PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE Grygorii Strashko <grygorii.strashko@ti.com> - 2015-08-13 15:00 +0200
Re: [PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE Grygorii Strashko <grygorii.strashko@ti.com> - 2015-08-14 12:30 +0200
Re: [PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE Marc Zyngier <marc.zyngier@arm.com> - 2015-08-14 12:50 +0200
| From | Grygorii Strashko <grygorii.strashko@ti.com> |
|---|---|
| Date | 2015-08-12 19:50 +0200 |
| Subject | [PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE |
| Message-ID | <pWIk2-2ZP-19@gated-at.bofh.it> |
The irqchip_set_wake_parent should not fail if IRQ chip
specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
configuration can't be propagated properly through IRQ
domains hierarchy.
In case of TI OMAP DRA7 the issue reproduced with following
configuration:
ARM GIC<-OMAP wakeupgen<-TI CBAR<-GPIO<-GPIO pcf857x<-gpio_key
gpio_key is wakeup source
Failure is reproduced during suspend/resume to RAM:
suspend:
- gpio_keys_suspend
enable_irq_wake
+ pcf857x_irq_set_wake
+ omap_gpio_wake_enable
+ TI CBAR irq_chip_set_wake_parent
+ OMAP wakeupgen has no .irq_set_wake()
and -ENOSYS will be returned
resume:
- gpio_keys_resume
+ disable_irq_wake
+ irq_set_irq_wake
+ WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
Fixes: 08b55e2a9208 ('genirq: Add irqchip_set_wake_parent')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
---
kernel/irq/chip.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
index 6de638b..bdb1b9d 100644
--- a/kernel/irq/chip.c
+++ b/kernel/irq/chip.c
@@ -1024,6 +1024,10 @@ int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
{
data = data->parent_data;
+
+ if (irq_data_get_irq_chip(data)->flags & IRQCHIP_SKIP_SET_WAKE)
+ return 0;
+
if (data->chip->irq_set_wake)
return data->chip->irq_set_wake(data, on);
--
2.5.0
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| From | Sudeep Holla <sudeep.holla@arm.com> |
|---|---|
| Date | 2015-08-13 11:00 +0200 |
| Message-ID | <pWWwG-6LA-19@gated-at.bofh.it> |
| In reply to | #1206299 |
On 12/08/15 18:45, Grygorii Strashko wrote:
> The irqchip_set_wake_parent should not fail if IRQ chip
> specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
> configuration can't be propagated properly through IRQ
> domains hierarchy.
>
> In case of TI OMAP DRA7 the issue reproduced with following
> configuration:
> ARM GIC<-OMAP wakeupgen<-TI CBAR<-GPIO<-GPIO pcf857x<-gpio_key
>
> gpio_key is wakeup source
>
> Failure is reproduced during suspend/resume to RAM:
> suspend:
> - gpio_keys_suspend
> enable_irq_wake
> + pcf857x_irq_set_wake
> + omap_gpio_wake_enable
> + TI CBAR irq_chip_set_wake_parent
> + OMAP wakeupgen has no .irq_set_wake()
> and -ENOSYS will be returned
>
> resume:
> - gpio_keys_resume
> + disable_irq_wake
> + irq_set_irq_wake
> + WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
>
> Fixes: 08b55e2a9208 ('genirq: Add irqchip_set_wake_parent')
> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
> ---
> kernel/irq/chip.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
> index 6de638b..bdb1b9d 100644
> --- a/kernel/irq/chip.c
> +++ b/kernel/irq/chip.c
> @@ -1024,6 +1024,10 @@ int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
> int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
> {
> data = data->parent_data;
> +
> + if (irq_data_get_irq_chip(data)->flags & IRQCHIP_SKIP_SET_WAKE)
> + return 0;
> +
[Nit] I think the irq core can access data->chip directly. Either way,
it's better to be consistent, the statement following doesn't use helper
function.
Otherwise looks good to me.
Regards,
Sudeep
> if (data->chip->irq_set_wake)
> return data->chip->irq_set_wake(data, on);
>
>
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| From | Grygorii Strashko <grygorii.strashko@ti.com> |
|---|---|
| Date | 2015-08-13 12:00 +0200 |
| Message-ID | <pWXsK-87z-21@gated-at.bofh.it> |
| In reply to | #1206618 |
On 08/13/2015 11:54 AM, Sudeep Holla wrote:
>
>
> On 12/08/15 18:45, Grygorii Strashko wrote:
>> The irqchip_set_wake_parent should not fail if IRQ chip
>> specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
>> configuration can't be propagated properly through IRQ
>> domains hierarchy.
>>
>> In case of TI OMAP DRA7 the issue reproduced with following
>> configuration:
>> ARM GIC<-OMAP wakeupgen<-TI CBAR<-GPIO<-GPIO pcf857x<-gpio_key
>>
>> gpio_key is wakeup source
>>
>> Failure is reproduced during suspend/resume to RAM:
>> suspend:
>> - gpio_keys_suspend
>> enable_irq_wake
>> + pcf857x_irq_set_wake
>> + omap_gpio_wake_enable
>> + TI CBAR irq_chip_set_wake_parent
>> + OMAP wakeupgen has no .irq_set_wake()
>> and -ENOSYS will be returned
>>
>> resume:
>> - gpio_keys_resume
>> + disable_irq_wake
>> + irq_set_irq_wake
>> + WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
>>
>> Fixes: 08b55e2a9208 ('genirq: Add irqchip_set_wake_parent')
>> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
>> ---
>> kernel/irq/chip.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
>> index 6de638b..bdb1b9d 100644
>> --- a/kernel/irq/chip.c
>> +++ b/kernel/irq/chip.c
>> @@ -1024,6 +1024,10 @@ int irq_chip_set_vcpu_affinity_parent(struct
>> irq_data *data, void *vcpu_info)
>> int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
>> {
>> data = data->parent_data;
>> +
>> + if (irq_data_get_irq_chip(data)->flags & IRQCHIP_SKIP_SET_WAKE)
>> + return 0;
>> +
>
> [Nit] I think the irq core can access data->chip directly. Either way,
> it's better to be consistent, the statement following doesn't use helper
> function.
thanks. I'll change it to:
if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
return 0;
>
> Otherwise looks good to me.
Does it means that I can add your Reviewed-by: with above change?
>
>> if (data->chip->irq_set_wake)
>> return data->chip->irq_set_wake(data, on);
>>
>>
--
regards,
-grygorii
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| From | Sudeep Holla <sudeep.holla@arm.com> |
|---|---|
| Date | 2015-08-13 12:40 +0200 |
| Message-ID | <pWY5s-Gv-19@gated-at.bofh.it> |
| In reply to | #1206668 |
On 13/08/15 10:51, Grygorii Strashko wrote:
> On 08/13/2015 11:54 AM, Sudeep Holla wrote:
>>
>>
>> On 12/08/15 18:45, Grygorii Strashko wrote:
[...]
>>> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
>>> index 6de638b..bdb1b9d 100644
>>> --- a/kernel/irq/chip.c
>>> +++ b/kernel/irq/chip.c
>>> @@ -1024,6 +1024,10 @@ int irq_chip_set_vcpu_affinity_parent(struct
>>> irq_data *data, void *vcpu_info)
>>> int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
>>> {
>>> data = data->parent_data;
>>> +
>>> + if (irq_data_get_irq_chip(data)->flags & IRQCHIP_SKIP_SET_WAKE)
>>> + return 0;
>>> +
>>
>> [Nit] I think the irq core can access data->chip directly. Either way,
>> it's better to be consistent, the statement following doesn't use helper
>> function.
>
> thanks. I'll change it to:
> if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
> return 0;
>
>>
>> Otherwise looks good to me.
>
> Does it means that I can add your Reviewed-by: with above change?
>
Yes you can.
Regards,
Sudeep
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| From | Marc Zyngier <marc.zyngier@arm.com> |
|---|---|
| Date | 2015-08-13 12:10 +0200 |
| Message-ID | <pWXCs-7m-85@gated-at.bofh.it> |
| In reply to | #1206299 |
On 12/08/15 18:45, Grygorii Strashko wrote:
> The irqchip_set_wake_parent should not fail if IRQ chip
> specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
> configuration can't be propagated properly through IRQ
> domains hierarchy.
>
> In case of TI OMAP DRA7 the issue reproduced with following
> configuration:
> ARM GIC<-OMAP wakeupgen<-TI CBAR<-GPIO<-GPIO pcf857x<-gpio_key
>
> gpio_key is wakeup source
>
> Failure is reproduced during suspend/resume to RAM:
> suspend:
> - gpio_keys_suspend
> enable_irq_wake
> + pcf857x_irq_set_wake
> + omap_gpio_wake_enable
> + TI CBAR irq_chip_set_wake_parent
> + OMAP wakeupgen has no .irq_set_wake()
Most importantly, wakeupgen has IRQCHIP_SKIP_SET_WAKE set.
> and -ENOSYS will be returned
>
> resume:
> - gpio_keys_resume
> + disable_irq_wake
> + irq_set_irq_wake
> + WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
>
> Fixes: 08b55e2a9208 ('genirq: Add irqchip_set_wake_parent')
> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
> ---
> kernel/irq/chip.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
> index 6de638b..bdb1b9d 100644
> --- a/kernel/irq/chip.c
> +++ b/kernel/irq/chip.c
> @@ -1024,6 +1024,10 @@ int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
> int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
> {
> data = data->parent_data;
> +
> + if (irq_data_get_irq_chip(data)->flags & IRQCHIP_SKIP_SET_WAKE)
> + return 0;
> +
> if (data->chip->irq_set_wake)
> return data->chip->irq_set_wake(data, on);
>
>
We have a more general issue with chip flags, and how they combine
within a stack of irqchips.
What if you remove the irq_chip_set_wake_parent from the crossbar
driver, and instead set IRQCHIP_SKIP_SET_WAKE?
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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| From | Grygorii Strashko <grygorii.strashko@ti.com> |
|---|---|
| Date | 2015-08-13 12:40 +0200 |
| Message-ID | <pWY5s-Gv-37@gated-at.bofh.it> |
| In reply to | #1206676 |
On 08/13/2015 01:01 PM, Marc Zyngier wrote:
> On 12/08/15 18:45, Grygorii Strashko wrote:
>> The irqchip_set_wake_parent should not fail if IRQ chip
>> specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
>> configuration can't be propagated properly through IRQ
>> domains hierarchy.
>>
>> In case of TI OMAP DRA7 the issue reproduced with following
>> configuration:
>> ARM GIC<-OMAP wakeupgen<-TI CBAR<-GPIO<-GPIO pcf857x<-gpio_key
>>
>> gpio_key is wakeup source
>>
>> Failure is reproduced during suspend/resume to RAM:
>> suspend:
>> - gpio_keys_suspend
>> enable_irq_wake
>> + pcf857x_irq_set_wake
>> + omap_gpio_wake_enable
>> + TI CBAR irq_chip_set_wake_parent
>> + OMAP wakeupgen has no .irq_set_wake()
>
> Most importantly, wakeupgen has IRQCHIP_SKIP_SET_WAKE set.
>
>> and -ENOSYS will be returned
>>
>> resume:
>> - gpio_keys_resume
>> + disable_irq_wake
>> + irq_set_irq_wake
>> + WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
>>
>> Fixes: 08b55e2a9208 ('genirq: Add irqchip_set_wake_parent')
>> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
>> ---
>> kernel/irq/chip.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
>> index 6de638b..bdb1b9d 100644
>> --- a/kernel/irq/chip.c
>> +++ b/kernel/irq/chip.c
>> @@ -1024,6 +1024,10 @@ int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
>> int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
>> {
>> data = data->parent_data;
>> +
>> + if (irq_data_get_irq_chip(data)->flags & IRQCHIP_SKIP_SET_WAKE)
>> + return 0;
>> +
>> if (data->chip->irq_set_wake)
>> return data->chip->irq_set_wake(data, on);
>>
>>
>
> We have a more general issue with chip flags, and how they combine
> within a stack of irqchips.
Indeed. Problem looks similar to IRQCHIP_MASK_ON_SUSPEND flag usage.
>
> What if you remove the irq_chip_set_wake_parent from the crossbar
> driver, and instead set IRQCHIP_SKIP_SET_WAKE?
I've thought about this and it should work for me.
One question - what if crossbar will be not the last one in
IRQ domains hierarchy?
--
regards,
-grygorii
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| From | Grygorii Strashko <grygorii.strashko@ti.com> |
|---|---|
| Date | 2015-08-13 15:00 +0200 |
| Message-ID | <pX0gV-3L0-5@gated-at.bofh.it> |
| In reply to | #1206696 |
On 08/13/2015 01:31 PM, Grygorii Strashko wrote:
> On 08/13/2015 01:01 PM, Marc Zyngier wrote:
>> On 12/08/15 18:45, Grygorii Strashko wrote:
>>> The irqchip_set_wake_parent should not fail if IRQ chip
>>> specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
>>> configuration can't be propagated properly through IRQ
>>> domains hierarchy.
>>>
>>> In case of TI OMAP DRA7 the issue reproduced with following
>>> configuration:
>>> ARM GIC<-OMAP wakeupgen<-TI CBAR<-GPIO<-GPIO pcf857x<-gpio_key
>>>
>>> gpio_key is wakeup source
>>>
>>> Failure is reproduced during suspend/resume to RAM:
>>> suspend:
>>> - gpio_keys_suspend
>>> enable_irq_wake
>>> + pcf857x_irq_set_wake
>>> + omap_gpio_wake_enable
>>> + TI CBAR irq_chip_set_wake_parent
>>> + OMAP wakeupgen has no .irq_set_wake()
>>
>> Most importantly, wakeupgen has IRQCHIP_SKIP_SET_WAKE set.
>>
>>> and -ENOSYS will be returned
>>>
>>> resume:
>>> - gpio_keys_resume
>>> + disable_irq_wake
>>> + irq_set_irq_wake
>>> + WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
>>>
>>> Fixes: 08b55e2a9208 ('genirq: Add irqchip_set_wake_parent')
>>> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
>>> ---
>>> kernel/irq/chip.c | 4 ++++
>>> 1 file changed, 4 insertions(+)
>>>
>>> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
>>> index 6de638b..bdb1b9d 100644
>>> --- a/kernel/irq/chip.c
>>> +++ b/kernel/irq/chip.c
>>> @@ -1024,6 +1024,10 @@ int irq_chip_set_vcpu_affinity_parent(struct
>>> irq_data *data, void *vcpu_info)
>>> int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
>>> {
>>> data = data->parent_data;
>>> +
>>> + if (irq_data_get_irq_chip(data)->flags & IRQCHIP_SKIP_SET_WAKE)
>>> + return 0;
>>> +
>>> if (data->chip->irq_set_wake)
>>> return data->chip->irq_set_wake(data, on);
>>>
>>>
>>
>> We have a more general issue with chip flags, and how they combine
>> within a stack of irqchips.
>
> Indeed. Problem looks similar to IRQCHIP_MASK_ON_SUSPEND flag usage.
>
>>
>> What if you remove the irq_chip_set_wake_parent from the crossbar
>> driver, and instead set IRQCHIP_SKIP_SET_WAKE?
>
> I've thought about this and it should work for me.
> One question - what if crossbar will be not the last one in
> IRQ domains hierarchy?
>
I can confirm, if I revert this patch, add IRQCHIP_SKIP_SET_WAKE to
the crossbar and remove irq_chip_set_wake_parent wakeups still works.
What do you prefer me to do: add additional patch for the crossbar,
drop/keep this patch?
--
regards,
-grygorii
--
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| From | Grygorii Strashko <grygorii.strashko@ti.com> |
|---|---|
| Date | 2015-08-14 12:30 +0200 |
| Message-ID | <pXkpk-7IY-13@gated-at.bofh.it> |
| In reply to | #1206793 |
On 08/13/2015 03:58 PM, Grygorii Strashko wrote:
> On 08/13/2015 01:31 PM, Grygorii Strashko wrote:
>> On 08/13/2015 01:01 PM, Marc Zyngier wrote:
>>> On 12/08/15 18:45, Grygorii Strashko wrote:
>>>> The irqchip_set_wake_parent should not fail if IRQ chip
>>>> specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
>>>> configuration can't be propagated properly through IRQ
>>>> domains hierarchy.
>>>>
>>>> In case of TI OMAP DRA7 the issue reproduced with following
>>>> configuration:
>>>> ARM GIC<-OMAP wakeupgen<-TI CBAR<-GPIO<-GPIO pcf857x<-gpio_key
>>>>
>>>> gpio_key is wakeup source
>>>>
>>>> Failure is reproduced during suspend/resume to RAM:
>>>> suspend:
>>>> - gpio_keys_suspend
>>>> enable_irq_wake
>>>> + pcf857x_irq_set_wake
>>>> + omap_gpio_wake_enable
>>>> + TI CBAR irq_chip_set_wake_parent
>>>> + OMAP wakeupgen has no .irq_set_wake()
>>>
>>> Most importantly, wakeupgen has IRQCHIP_SKIP_SET_WAKE set.
>>>
>>>> and -ENOSYS will be returned
>>>>
>>>> resume:
>>>> - gpio_keys_resume
>>>> + disable_irq_wake
>>>> + irq_set_irq_wake
>>>> + WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
>>>>
>>>> Fixes: 08b55e2a9208 ('genirq: Add irqchip_set_wake_parent')
>>>> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
>>>> ---
>>>> kernel/irq/chip.c | 4 ++++
>>>> 1 file changed, 4 insertions(+)
>>>>
>>>> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
>>>> index 6de638b..bdb1b9d 100644
>>>> --- a/kernel/irq/chip.c
>>>> +++ b/kernel/irq/chip.c
>>>> @@ -1024,6 +1024,10 @@ int irq_chip_set_vcpu_affinity_parent(struct
>>>> irq_data *data, void *vcpu_info)
>>>> int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
>>>> {
>>>> data = data->parent_data;
>>>> +
>>>> + if (irq_data_get_irq_chip(data)->flags & IRQCHIP_SKIP_SET_WAKE)
>>>> + return 0;
>>>> +
>>>> if (data->chip->irq_set_wake)
>>>> return data->chip->irq_set_wake(data, on);
>>>>
>>>>
>>>
>>> We have a more general issue with chip flags, and how they combine
>>> within a stack of irqchips.
>>
>> Indeed. Problem looks similar to IRQCHIP_MASK_ON_SUSPEND flag usage.
>>
>>>
>>> What if you remove the irq_chip_set_wake_parent from the crossbar
>>> driver, and instead set IRQCHIP_SKIP_SET_WAKE?
>>
>> I've thought about this and it should work for me.
>> One question - what if crossbar will be not the last one in
>> IRQ domains hierarchy?
>>
>
> I can confirm, if I revert this patch, add IRQCHIP_SKIP_SET_WAKE to
> the crossbar and remove irq_chip_set_wake_parent wakeups still works.
> What do you prefer me to do: add additional patch for the crossbar,
> drop/keep this patch?
>
OK. There are two possibilities to fix set_wake functionality for TI OMAPs
where below HW configurations are used:
OMAP4/5: GIC <- OMAP wakeupgen
DRA7: GIC <- OMAP wakeupgen <- TI CBAR
1) ensure that IRQCHIP_SKIP_SET_WAKE flag is set only for GIC and
use irq_chip_set_wake_parent() in both wakeupgen and crossbar
[this patch is required]
2) ensure that IRQCHIP_SKIP_SET_WAKE flag is set and drop
.irq_set_wake()/irq_chip_set_wake_parent() for all IRQ chips
in IRQ domains hierarchy.
[this patch can be dropped]
I'm going to select approach 2 and re-send.
--
regards,
-grygorii
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| From | Marc Zyngier <marc.zyngier@arm.com> |
|---|---|
| Date | 2015-08-14 12:50 +0200 |
| Message-ID | <pXkIF-85C-7@gated-at.bofh.it> |
| In reply to | #1207484 |
On 14/08/15 11:18, Grygorii Strashko wrote:
> On 08/13/2015 03:58 PM, Grygorii Strashko wrote:
>> On 08/13/2015 01:31 PM, Grygorii Strashko wrote:
>>> On 08/13/2015 01:01 PM, Marc Zyngier wrote:
>>>> On 12/08/15 18:45, Grygorii Strashko wrote:
>>>>> The irqchip_set_wake_parent should not fail if IRQ chip
>>>>> specifies IRQCHIP_SKIP_SET_WAKE. Otherwise, IRQ wakeup
>>>>> configuration can't be propagated properly through IRQ
>>>>> domains hierarchy.
>>>>>
>>>>> In case of TI OMAP DRA7 the issue reproduced with following
>>>>> configuration:
>>>>> ARM GIC<-OMAP wakeupgen<-TI CBAR<-GPIO<-GPIO pcf857x<-gpio_key
>>>>>
>>>>> gpio_key is wakeup source
>>>>>
>>>>> Failure is reproduced during suspend/resume to RAM:
>>>>> suspend:
>>>>> - gpio_keys_suspend
>>>>> enable_irq_wake
>>>>> + pcf857x_irq_set_wake
>>>>> + omap_gpio_wake_enable
>>>>> + TI CBAR irq_chip_set_wake_parent
>>>>> + OMAP wakeupgen has no .irq_set_wake()
>>>>
>>>> Most importantly, wakeupgen has IRQCHIP_SKIP_SET_WAKE set.
>>>>
>>>>> and -ENOSYS will be returned
>>>>>
>>>>> resume:
>>>>> - gpio_keys_resume
>>>>> + disable_irq_wake
>>>>> + irq_set_irq_wake
>>>>> + WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
>>>>>
>>>>> Fixes: 08b55e2a9208 ('genirq: Add irqchip_set_wake_parent')
>>>>> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
>>>>> ---
>>>>> kernel/irq/chip.c | 4 ++++
>>>>> 1 file changed, 4 insertions(+)
>>>>>
>>>>> diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
>>>>> index 6de638b..bdb1b9d 100644
>>>>> --- a/kernel/irq/chip.c
>>>>> +++ b/kernel/irq/chip.c
>>>>> @@ -1024,6 +1024,10 @@ int irq_chip_set_vcpu_affinity_parent(struct
>>>>> irq_data *data, void *vcpu_info)
>>>>> int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
>>>>> {
>>>>> data = data->parent_data;
>>>>> +
>>>>> + if (irq_data_get_irq_chip(data)->flags & IRQCHIP_SKIP_SET_WAKE)
>>>>> + return 0;
>>>>> +
>>>>> if (data->chip->irq_set_wake)
>>>>> return data->chip->irq_set_wake(data, on);
>>>>>
>>>>>
>>>>
>>>> We have a more general issue with chip flags, and how they combine
>>>> within a stack of irqchips.
>>>
>>> Indeed. Problem looks similar to IRQCHIP_MASK_ON_SUSPEND flag usage.
>>>
>>>>
>>>> What if you remove the irq_chip_set_wake_parent from the crossbar
>>>> driver, and instead set IRQCHIP_SKIP_SET_WAKE?
>>>
>>> I've thought about this and it should work for me.
>>> One question - what if crossbar will be not the last one in
>>> IRQ domains hierarchy?
>>>
>>
>> I can confirm, if I revert this patch, add IRQCHIP_SKIP_SET_WAKE to
>> the crossbar and remove irq_chip_set_wake_parent wakeups still works.
>> What do you prefer me to do: add additional patch for the crossbar,
>> drop/keep this patch?
>>
>
> OK. There are two possibilities to fix set_wake functionality for TI OMAPs
> where below HW configurations are used:
> OMAP4/5: GIC <- OMAP wakeupgen
> DRA7: GIC <- OMAP wakeupgen <- TI CBAR
>
>
> 1) ensure that IRQCHIP_SKIP_SET_WAKE flag is set only for GIC and
> use irq_chip_set_wake_parent() in both wakeupgen and crossbar
> [this patch is required]
>
> 2) ensure that IRQCHIP_SKIP_SET_WAKE flag is set and drop
> .irq_set_wake()/irq_chip_set_wake_parent() for all IRQ chips
> in IRQ domains hierarchy.
> [this patch can be dropped]
>
> I'm going to select approach 2 and re-send.
Yeah, I'd like to go for the minimal approach for now, and work out what
exactly are the propagation semantics (I had something at some point,
need to find what I did with those patches...).
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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