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Re: [PATCH 3/3] serial: 8250: omap: restore registers on shutdown

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  Re: [PATCH 3/3] serial: 8250: omap: restore registers on shutdown Peter Hurley <peter@hurleysoftware.com> - 2015-08-06 14:30 +0200
    Re: [PATCH 3/3] serial: 8250: omap: restore registers on shutdown Sebastian Andrzej Siewior <bigeasy@linutronix.de> - 2015-08-06 14:40 +0200
      Re: [PATCH 3/3] serial: 8250: omap: restore registers on shutdown Sebastian Andrzej Siewior <bigeasy@linutronix.de> - 2015-08-06 16:00 +0200
        Re: [PATCH 3/3] serial: 8250: omap: restore registers on shutdown Peter Hurley <peter@hurleysoftware.com> - 2015-08-06 20:30 +0200
          Re: [PATCH 3/3] serial: 8250: omap: restore registers on shutdown Charles Manning <cdhmanning@gmail.com> - 2015-08-07 02:50 +0200

#1201697 — Re: [PATCH 3/3] serial: 8250: omap: restore registers on shutdown

Hi Sebastian,

On 08/04/2015 07:58 AM, Sebastian Andrzej Siewior wrote:
> On 08/03/2015 09:32 PM, Peter Hurley wrote:
> 
>>> You mean a function in 8250-dma API which does what I did just here
>>> with the wait_event() and the wake_up in the callback? That way I could
>>> move the termios_wait into the dma struct instead of keeping in the
>>> omap specific part. I am also not sure if OMAP is the only one that may
>>> hang here or the other people just didn't notice it yet.
>>
>> Exactly; and we need to fix DMA wrt x_char anyway.
>>
>> Going back to the dmaengine api, I think something like this might work
>> (as a first approximation):
>>
>> 	dma_sync_wait(dma->txchan, dma->tx_cookie);
>> 	dmaengine_pause(dma->txchan);
>>
>> 	/* remainder of set_termios */
>>
>> 	dmaengine_resume(dma->txchan);
>>
>> We could require 8250 core dma to support pause/resume.
> 
> I would prefer the waitqueue approach.
> You can't do this while holding the port lock. The lock is taken with
> irqs off so may not see the transfer completing.
> Why do you pause the channel? It may not work without an active
> descriptor and a start without "resume" should work. Also you must
> ensure that DMA's complete callback does not start another transfer if
> there is something queued up (that is why I had the tx_running dance).
> I am not sure if a transfer that is active and then paused will not
> trigger the hang bug if we change the termios in between.

I'll look at/test this this weekend, ok?

Regards,
Peter Hurley

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#1201706

On 08/06/2015 02:27 PM, Peter Hurley wrote:
> Hi Sebastian,

Hi Peter,

> On 08/04/2015 07:58 AM, Sebastian Andrzej Siewior wrote:
>> On 08/03/2015 09:32 PM, Peter Hurley wrote:
>>
>>>> You mean a function in 8250-dma API which does what I did just here
>>>> with the wait_event() and the wake_up in the callback? That way I could
>>>> move the termios_wait into the dma struct instead of keeping in the
>>>> omap specific part. I am also not sure if OMAP is the only one that may
>>>> hang here or the other people just didn't notice it yet.
>>>
>>> Exactly; and we need to fix DMA wrt x_char anyway.
>>>
>>> Going back to the dmaengine api, I think something like this might work
>>> (as a first approximation):
>>>
>>> 	dma_sync_wait(dma->txchan, dma->tx_cookie);
>>> 	dmaengine_pause(dma->txchan);
>>>
>>> 	/* remainder of set_termios */
>>>
>>> 	dmaengine_resume(dma->txchan);
>>>
>>> We could require 8250 core dma to support pause/resume.
>>
>> I would prefer the waitqueue approach.
>> You can't do this while holding the port lock. The lock is taken with
>> irqs off so may not see the transfer completing.
>> Why do you pause the channel? It may not work without an active
>> descriptor and a start without "resume" should work. Also you must
>> ensure that DMA's complete callback does not start another transfer if
>> there is something queued up (that is why I had the tx_running dance).
>> I am not sure if a transfer that is active and then paused will not
>> trigger the hang bug if we change the termios in between.
> 
> I'll look at/test this this weekend, ok?

Sure. I'm currently re-spinning the patches so have everything in
proper pieces. While at it I will take a look at x_char.

> Regards,
> Peter Hurley
> 
Sebastian
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#1201753

On 08/06/2015 02:31 PM, Sebastian Andrzej Siewior wrote:

Hi Peter,

>> I'll look at/test this this weekend, ok?
> 
> Sure. I'm currently re-spinning the patches so have everything in
> proper pieces. While at it I will take a look at x_char.

So now that I actually look at it. If I read this right, we never send
the x_char if the TX-DMA never fails to do its job. The comment above
uart_send_xchar() says it is high priority. What do you suggest, wait
until the transfer completes, send the x_char _or_ pause the transfer
send that byte and then send the byte?
In both cases we have to wait until for the FIFO-empty interrupt to
make sure we don't overrun that TX-FIFO.

I *think* waiting until the transfer completes would be simpler but it
is not necessarily high priority.

>> Regards,
>> Peter Hurley

Sebastian
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#1201964

On 08/06/2015 09:59 AM, Sebastian Andrzej Siewior wrote:
> On 08/06/2015 02:31 PM, Sebastian Andrzej Siewior wrote:
> 
> Hi Peter,
> 
>>> I'll look at/test this this weekend, ok?
>>
>> Sure. I'm currently re-spinning the patches so have everything in
>> proper pieces. While at it I will take a look at x_char.
> 
> So now that I actually look at it. If I read this right, we never send
> the x_char if the TX-DMA never fails to do its job.

That's what I saw too; almost all the dma drivers are broken wrt x_char.
The amba-pl011 driver gets it right.

> The comment above uart_send_xchar() says it is high priority.

'High' priority is meant relative to previously written data which has
not yet been sent.

> What do you suggest, wait
> until the transfer completes, send the x_char _or_ pause the transfer
> send that byte and then send the byte?

'Better' would be sending the x_char when the current dma transfer
completes. However, it will probably have /some/ impact on what line
rates software flow control can be used. Worst case @ 115Kbaud is 35ms
delay in sending.

'Best' would be pausing the dma and sending the byte. However, I'm not
even sure if this is possible on OMAP; the TRM is woefully under-documented
in that regard.

> In both cases we have to wait until for the FIFO-empty interrupt to
> make sure we don't overrun that TX-FIFO.
> 
> I *think* waiting until the transfer completes would be simpler but it
> is not necessarily high priority.

I agree; this is what we should do first because someone might want it
for backports.

Regards,
Peter Hurley
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#1202179

On Fri, Aug 7, 2015 at 6:22 AM, Peter Hurley <peter@hurleysoftware.com> wrote:
> I agree; this is what we should do first because someone might want it
> for backports.

Got an idea how far this can be ported back?

I'm being hampered by severe performance issues on a
beagleboneblack-like device (am335x) running on 3.18 kernel.

I have a 1Mbaud link that is getting packets of about 22 bytes @800 Hz
and old omap-serial is keeping up, but killing the CPU.

I'm considering backporting 8250_omap as a get out of jail.

Opinions appreciated.

Thanks.
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