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| Started by | Liviu Dudau <Liviu.Dudau@arm.com> |
|---|---|
| First post | 2015-08-03 13:30 +0200 |
| Last post | 2015-08-03 14:50 +0200 |
| Articles | 5 — 3 participants |
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Re: [PATCH v6 6/8] arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno Liviu Dudau <Liviu.Dudau@arm.com> - 2015-08-03 13:30 +0200
Re: [PATCH v6 6/8] arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno Sudeep Holla <sudeep.holla@arm.com> - 2015-08-03 13:50 +0200
Re: [PATCH v6 6/8] arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno Liviu Dudau <Liviu.Dudau@arm.com> - 2015-08-03 14:50 +0200
Re: [PATCH v6 6/8] arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno "Jon Medhurst (Tixy)" <tixy@linaro.org> - 2015-08-03 13:50 +0200
Re: [PATCH v6 6/8] arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno Sudeep Holla <sudeep.holla@arm.com> - 2015-08-03 14:50 +0200
| From | Liviu Dudau <Liviu.Dudau@arm.com> |
|---|---|
| Date | 2015-08-03 13:30 +0200 |
| Subject | Re: [PATCH v6 6/8] arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno |
| Message-ID | <pTm6n-1Bo-35@gated-at.bofh.it> |
On Fri, Jul 31, 2015 at 06:43:09PM +0100, Sudeep Holla wrote:
> This patch adds support for the MHU mailbox peripheral used on Juno by
> application processors to communicate with remote SCP handling most of
> the CPU/system power management. It also adds the SRAM reserving the
> shared memory and SCPI message protocol using that shared memory.
>
> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
> Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
> ---
> arch/arm64/boot/dts/arm/juno-base.dtsi | 54 ++++++++++++++++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> index e3ee96036eca..c624208edef6 100644
> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> @@ -17,6 +17,18 @@
> };
> };
>
> + mailbox: mhu@2b1f0000 {
> + compatible = "arm,mhu", "arm,primecell";
> + reg = <0x0 0x2b1f0000 0x0 0x1000>;
> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "mhu_lpri_rx",
> + "mhu_hpri_rx";
> + #mbox-cells = <1>;
> + clocks = <&soc_refclk100mhz>;
> + clock-names = "apb_pclk";
> + };
> +
> gic: interrupt-controller@2c010000 {
> compatible = "arm,gic-400", "arm,cortex-a15-gic";
> reg = <0x0 0x2c010000 0 0x1000>,
> @@ -44,6 +56,48 @@
> <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> };
>
> + sram: sram@2e000000 {
> + compatible = "arm,juno-sram-ns", "mmio-sram";
> + reg = <0x0 0x2e000000 0x0 0x8000>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x0 0x2e000000 0x8000>;
> +
> + cpu_scp_lpri: scp-shmem@0 {
> + compatible = "arm,juno-scp-shmem";
> + reg = <0x0 0x200>;
> + };
> +
> + cpu_scp_hpri: scp-shmem@200 {
> + compatible = "arm,juno-scp-shmem";
> + reg = <0x200 0x200>;
> + };
> + };
> +
> + scpi {
> + compatible = "arm,scpi";
> + mboxes = <&mailbox 1>;
> + shmem = <&cpu_scp_hpri>;
> +
> + clocks {
> + compatible = "arm,scpi-clocks";
> +
> + scpi_dvfs: scpi_clocks@0 {
> + compatible = "arm,scpi-dvfs-clocks";
> + #clock-cells = <1>;
> + clock-indices = <0>, <1>, <2>;
> + clock-output-names = "atlclk", "aplclk","gpuclk";
> + };
> + scpi_clk: scpi_clocks@3 {
> + compatible = "arm,scpi-variable-clocks";
> + #clock-cells = <1>;
> + clock-indices = <3>, <4>;
> + clock-output-names = "pxlclk0", "pxlclk1";
> + };
> + };
> + };
> +
Sorry for noticing this after the ACK, is there any reason why the scpi node is not inside
the juno-clocks.dtsi file?
Best regards,
Liviu
> /include/ "juno-clocks.dtsi"
>
> dma@7ff00000 {
> --
> 1.9.1
>
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
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| From | Sudeep Holla <sudeep.holla@arm.com> |
|---|---|
| Date | 2015-08-03 13:50 +0200 |
| Subject | Re: [PATCH v6 6/8] arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno |
| Message-ID | <pTmpH-1Yc-11@gated-at.bofh.it> |
| In reply to | #1198758 |
On 03/08/15 12:23, Liviu Dudau wrote:
> On Fri, Jul 31, 2015 at 06:43:09PM +0100, Sudeep Holla wrote:
>> This patch adds support for the MHU mailbox peripheral used on Juno by
>> application processors to communicate with remote SCP handling most of
>> the CPU/system power management. It also adds the SRAM reserving the
>> shared memory and SCPI message protocol using that shared memory.
>>
>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
>> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
>> Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
>> ---
>> arch/arm64/boot/dts/arm/juno-base.dtsi | 54 ++++++++++++++++++++++++++++++++++
>> 1 file changed, 54 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
>> index e3ee96036eca..c624208edef6 100644
>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
>> @@ -17,6 +17,18 @@
>> };
>> };
>>
>> + mailbox: mhu@2b1f0000 {
>> + compatible = "arm,mhu", "arm,primecell";
>> + reg = <0x0 0x2b1f0000 0x0 0x1000>;
>> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "mhu_lpri_rx",
>> + "mhu_hpri_rx";
>> + #mbox-cells = <1>;
>> + clocks = <&soc_refclk100mhz>;
>> + clock-names = "apb_pclk";
>> + };
>> +
>> gic: interrupt-controller@2c010000 {
>> compatible = "arm,gic-400", "arm,cortex-a15-gic";
>> reg = <0x0 0x2c010000 0 0x1000>,
>> @@ -44,6 +56,48 @@
>> <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
>> };
>>
>> + sram: sram@2e000000 {
>> + compatible = "arm,juno-sram-ns", "mmio-sram";
>> + reg = <0x0 0x2e000000 0x0 0x8000>;
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0 0x0 0x2e000000 0x8000>;
>> +
>> + cpu_scp_lpri: scp-shmem@0 {
>> + compatible = "arm,juno-scp-shmem";
>> + reg = <0x0 0x200>;
>> + };
>> +
>> + cpu_scp_hpri: scp-shmem@200 {
>> + compatible = "arm,juno-scp-shmem";
>> + reg = <0x200 0x200>;
>> + };
>> + };
>> +
>> + scpi {
>> + compatible = "arm,scpi";
>> + mboxes = <&mailbox 1>;
>> + shmem = <&cpu_scp_hpri>;
>> +
>> + clocks {
>> + compatible = "arm,scpi-clocks";
>> +
>> + scpi_dvfs: scpi_clocks@0 {
>> + compatible = "arm,scpi-dvfs-clocks";
>> + #clock-cells = <1>;
>> + clock-indices = <0>, <1>, <2>;
>> + clock-output-names = "atlclk", "aplclk","gpuclk";
>> + };
>> + scpi_clk: scpi_clocks@3 {
>> + compatible = "arm,scpi-variable-clocks";
>> + #clock-cells = <1>;
>> + clock-indices = <3>, <4>;
>> + clock-output-names = "pxlclk0", "pxlclk1";
>> + };
>> + };
>> + };
>> +
>
> Sorry for noticing this after the ACK, is there any reason why the scpi node is not inside
> the juno-clocks.dtsi file?
>
Yes, scpi node will have other nodes like sensors/hwmon. So the whole
scpi node can't sit in juno-clocks. Ideally the clocks belongs to
juno-clocks, but I got troubles with the way the DTSI are includes and
could not keep scpi node in base and just update clocks in
juno-clocks.dtsi. It needs some rework the way include file are used.
It's in my todo and I will look at that when I get time.
Regards,
Sudeep
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| From | Liviu Dudau <Liviu.Dudau@arm.com> |
|---|---|
| Date | 2015-08-03 14:50 +0200 |
| Message-ID | <pTnlM-3kJ-27@gated-at.bofh.it> |
| In reply to | #1198771 |
On Mon, Aug 03, 2015 at 12:44:39PM +0100, Sudeep Holla wrote:
>
>
> On 03/08/15 12:23, Liviu Dudau wrote:
> > On Fri, Jul 31, 2015 at 06:43:09PM +0100, Sudeep Holla wrote:
> >> This patch adds support for the MHU mailbox peripheral used on Juno by
> >> application processors to communicate with remote SCP handling most of
> >> the CPU/system power management. It also adds the SRAM reserving the
> >> shared memory and SCPI message protocol using that shared memory.
> >>
> >> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> >> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
> >> Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
> >> ---
> >> arch/arm64/boot/dts/arm/juno-base.dtsi | 54 ++++++++++++++++++++++++++++++++++
> >> 1 file changed, 54 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> >> index e3ee96036eca..c624208edef6 100644
> >> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> >> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> >> @@ -17,6 +17,18 @@
> >> };
> >> };
> >>
> >> + mailbox: mhu@2b1f0000 {
> >> + compatible = "arm,mhu", "arm,primecell";
> >> + reg = <0x0 0x2b1f0000 0x0 0x1000>;
> >> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
> >> + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> >> + interrupt-names = "mhu_lpri_rx",
> >> + "mhu_hpri_rx";
> >> + #mbox-cells = <1>;
> >> + clocks = <&soc_refclk100mhz>;
> >> + clock-names = "apb_pclk";
> >> + };
> >> +
> >> gic: interrupt-controller@2c010000 {
> >> compatible = "arm,gic-400", "arm,cortex-a15-gic";
> >> reg = <0x0 0x2c010000 0 0x1000>,
> >> @@ -44,6 +56,48 @@
> >> <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> >> };
> >>
> >> + sram: sram@2e000000 {
> >> + compatible = "arm,juno-sram-ns", "mmio-sram";
> >> + reg = <0x0 0x2e000000 0x0 0x8000>;
> >> +
> >> + #address-cells = <1>;
> >> + #size-cells = <1>;
> >> + ranges = <0 0x0 0x2e000000 0x8000>;
> >> +
> >> + cpu_scp_lpri: scp-shmem@0 {
> >> + compatible = "arm,juno-scp-shmem";
> >> + reg = <0x0 0x200>;
> >> + };
> >> +
> >> + cpu_scp_hpri: scp-shmem@200 {
> >> + compatible = "arm,juno-scp-shmem";
> >> + reg = <0x200 0x200>;
> >> + };
> >> + };
> >> +
> >> + scpi {
> >> + compatible = "arm,scpi";
> >> + mboxes = <&mailbox 1>;
> >> + shmem = <&cpu_scp_hpri>;
> >> +
> >> + clocks {
> >> + compatible = "arm,scpi-clocks";
> >> +
> >> + scpi_dvfs: scpi_clocks@0 {
> >> + compatible = "arm,scpi-dvfs-clocks";
> >> + #clock-cells = <1>;
> >> + clock-indices = <0>, <1>, <2>;
> >> + clock-output-names = "atlclk", "aplclk","gpuclk";
> >> + };
> >> + scpi_clk: scpi_clocks@3 {
> >> + compatible = "arm,scpi-variable-clocks";
> >> + #clock-cells = <1>;
> >> + clock-indices = <3>, <4>;
> >> + clock-output-names = "pxlclk0", "pxlclk1";
> >> + };
> >> + };
> >> + };
> >> +
> >
> > Sorry for noticing this after the ACK, is there any reason why the scpi node is not inside
> > the juno-clocks.dtsi file?
> >
>
> Yes, scpi node will have other nodes like sensors/hwmon. So the whole
> scpi node can't sit in juno-clocks. Ideally the clocks belongs to
> juno-clocks, but I got troubles with the way the DTSI are includes and
> could not keep scpi node in base and just update clocks in
> juno-clocks.dtsi. It needs some rework the way include file are used.
> It's in my todo and I will look at that when I get time.
OK, it makes sense. I haven't had a chance to go through Punit's series yet,
I've missed the fact that thermal is going to be attached to this node as well.
Best regards,
Liviu
>
> Regards,
> Sudeep
>
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
--
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| From | "Jon Medhurst (Tixy)" <tixy@linaro.org> |
|---|---|
| Date | 2015-08-03 13:50 +0200 |
| Message-ID | <pTmpI-1Yc-23@gated-at.bofh.it> |
| In reply to | #1198758 |
On Mon, 2015-08-03 at 12:23 +0100, Liviu Dudau wrote:
> On Fri, Jul 31, 2015 at 06:43:09PM +0100, Sudeep Holla wrote:
> > This patch adds support for the MHU mailbox peripheral used on Juno by
> > application processors to communicate with remote SCP handling most of
> > the CPU/system power management. It also adds the SRAM reserving the
> > shared memory and SCPI message protocol using that shared memory.
> >
> > Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> > Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
> > Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
> > ---
> > arch/arm64/boot/dts/arm/juno-base.dtsi | 54 ++++++++++++++++++++++++++++++++++
> > 1 file changed, 54 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> > index e3ee96036eca..c624208edef6 100644
> > --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> > +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
[...]
> > + scpi {
> > + compatible = "arm,scpi";
> > + mboxes = <&mailbox 1>;
> > + shmem = <&cpu_scp_hpri>;
> > +
> > + clocks {
> > + compatible = "arm,scpi-clocks";
> > +
> > + scpi_dvfs: scpi_clocks@0 {
> > + compatible = "arm,scpi-dvfs-clocks";
> > + #clock-cells = <1>;
> > + clock-indices = <0>, <1>, <2>;
> > + clock-output-names = "atlclk", "aplclk","gpuclk";
> > + };
> > + scpi_clk: scpi_clocks@3 {
> > + compatible = "arm,scpi-variable-clocks";
> > + #clock-cells = <1>;
> > + clock-indices = <3>, <4>;
> > + clock-output-names = "pxlclk0", "pxlclk1";
> > + };
> > + };
> > + };
> > +
>
> Sorry for noticing this after the ACK, is there any reason why the scpi node is not inside
> the juno-clocks.dtsi file?
Because SCPI is not just about clocks? Just happens that these first
patches are but there's thermal sensors and other things as well.
--
Tixy
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| From | Sudeep Holla <sudeep.holla@arm.com> |
|---|---|
| Date | 2015-08-03 14:50 +0200 |
| Subject | Re: [PATCH v6 6/8] arm64: dts: add SRAM, MHU mailbox and SCPI support on Juno |
| Message-ID | <pTnlM-3kJ-35@gated-at.bofh.it> |
| In reply to | #1198775 |
On 03/08/15 12:46, Jon Medhurst (Tixy) wrote:
> On Mon, 2015-08-03 at 12:23 +0100, Liviu Dudau wrote:
>> On Fri, Jul 31, 2015 at 06:43:09PM +0100, Sudeep Holla wrote:
>>> This patch adds support for the MHU mailbox peripheral used on Juno by
>>> application processors to communicate with remote SCP handling most of
>>> the CPU/system power management. It also adds the SRAM reserving the
>>> shared memory and SCPI message protocol using that shared memory.
>>>
>>> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
>>> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
>>> Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
>>> ---
>>> arch/arm64/boot/dts/arm/juno-base.dtsi | 54 ++++++++++++++++++++++++++++++++++
>>> 1 file changed, 54 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>> index e3ee96036eca..c624208edef6 100644
>>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> [...]
>>> + scpi {
>>> + compatible = "arm,scpi";
>>> + mboxes = <&mailbox 1>;
>>> + shmem = <&cpu_scp_hpri>;
>>> +
>>> + clocks {
>>> + compatible = "arm,scpi-clocks";
>>> +
>>> + scpi_dvfs: scpi_clocks@0 {
>>> + compatible = "arm,scpi-dvfs-clocks";
>>> + #clock-cells = <1>;
>>> + clock-indices = <0>, <1>, <2>;
>>> + clock-output-names = "atlclk", "aplclk","gpuclk";
>>> + };
>>> + scpi_clk: scpi_clocks@3 {
>>> + compatible = "arm,scpi-variable-clocks";
>>> + #clock-cells = <1>;
>>> + clock-indices = <3>, <4>;
>>> + clock-output-names = "pxlclk0", "pxlclk1";
>>> + };
>>> + };
>>> + };
>>> +
>>
>> Sorry for noticing this after the ACK, is there any reason why the scpi node is not inside
>> the juno-clocks.dtsi file?
>
> Because SCPI is not just about clocks? Just happens that these first
> patches are but there's thermal sensors and other things as well.
>
I think we cross posted. Anyways I completely agree with you.
However I wanted the clock nodes to be put in juno-clock.dtsi but got
into horrible issue with the way we include headers. It may need some
reworking to get that working.
The idea was:
/* in juno-base.dtsi */
SCPI: scpi {
compatible = "arm,scpi";
mboxes = <&mailbox 1>;
shmem = <&cpu_scp_hpri>;
...
};
/* in juno-clock.dtsi */
&SCPI {
clocks {
compatible = "arm,scpi-clocks";
scpi_dvfs: scpi_clocks@0 {
compatible = "arm,scpi-dvfs-clocks";
#clock-cells = <1>;
clock-indices = <0>, <1>, <2>;
clock-output-names = "atlclk","aplclk","gpuclk";
};
};
I will look at that when I get some time. There are many DTS files
already using something similar.
Regards,
Sudeep
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