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[PATCH] clk: pxa: pxa3xx: fix CKEN register access

Started byRobert Jarzmik <robert.jarzmik@free.fr>
First post2015-08-03 22:10 +0200
Last post2015-08-04 21:20 +0200
Articles 7 — 2 participants

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  [PATCH] clk: pxa: pxa3xx: fix CKEN register access Robert Jarzmik <robert.jarzmik@free.fr> - 2015-08-03 22:10 +0200
    Re: [PATCH] clk: pxa: pxa3xx: fix CKEN register access Stephen Boyd <sboyd@codeaurora.org> - 2015-08-04 02:50 +0200
      Re: [PATCH] clk: pxa: pxa3xx: fix CKEN register access Robert Jarzmik <robert.jarzmik@free.fr> - 2015-08-04 08:30 +0200
        Re: [PATCH] clk: pxa: pxa3xx: fix CKEN register access Stephen Boyd <sboyd@codeaurora.org> - 2015-08-04 20:00 +0200
          Re: [PATCH] clk: pxa: pxa3xx: fix CKEN register access Robert Jarzmik <robert.jarzmik@free.fr> - 2015-08-04 20:40 +0200
            Re: [PATCH] clk: pxa: pxa3xx: fix CKEN register access Stephen Boyd <sboyd@codeaurora.org> - 2015-08-04 21:10 +0200
              Re: [PATCH] clk: pxa: pxa3xx: fix CKEN register access Robert Jarzmik <robert.jarzmik@free.fr> - 2015-08-04 21:20 +0200

#1199234 — [PATCH] clk: pxa: pxa3xx: fix CKEN register access

FromRobert Jarzmik <robert.jarzmik@free.fr>
Date2015-08-03 22:10 +0200
Subject[PATCH] clk: pxa: pxa3xx: fix CKEN register access
Message-ID<pTudz-4Zd-3@gated-at.bofh.it>
Clocks 0 to 31 are on CKENA, and not CKENB. The clock register names
were inadequately inverted. As a consequence, all clock operations were
happening on CKENB, because almost all but 2 clocks are on CKENA.

As the clocks were activated by the bootloader in the former tests, it
escaped the testing that the wrong clock gate was manipulated. The error
was revealed by changing the pxa3xx-and driver to a module, where tupon
unloading the wrong clock was disabled in CKENB.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
---
 drivers/clk/pxa/clk-pxa3xx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/pxa/clk-pxa3xx.c b/drivers/clk/pxa/clk-pxa3xx.c
index c677b9ab5367..4af4eed5f89f 100644
--- a/drivers/clk/pxa/clk-pxa3xx.c
+++ b/drivers/clk/pxa/clk-pxa3xx.c
@@ -126,7 +126,7 @@ PARENTS(pxa3xx_ac97_bus) = { "ring_osc_60mhz", "ac97" };
 PARENTS(pxa3xx_sbus) = { "ring_osc_60mhz", "system_bus" };
 PARENTS(pxa3xx_smemcbus) = { "ring_osc_60mhz", "smemc" };
 
-#define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? &CKENA : &CKENB)
+#define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? &CKENB : &CKENA)
 #define PXA3XX_CKEN(dev_id, con_id, parents, mult_lp, div_lp, mult_hp,	\
 		    div_hp, bit, is_lp, flags)				\
 	PXA_CKEN(dev_id, con_id, bit, parents, mult_lp, div_lp,		\
-- 
2.1.4

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#1199343

FromStephen Boyd <sboyd@codeaurora.org>
Date2015-08-04 02:50 +0200
Message-ID<pTyAy-2Qy-9@gated-at.bofh.it>
In reply to#1199234
On 08/03/2015 12:58 PM, Robert Jarzmik wrote:
> Clocks 0 to 31 are on CKENA, and not CKENB. The clock register names
> were inadequately inverted. As a consequence, all clock operations were
> happening on CKENB, because almost all but 2 clocks are on CKENA.
>
> As the clocks were activated by the bootloader in the former tests, it
> escaped the testing that the wrong clock gate was manipulated. The error
> was revealed by changing the pxa3xx-and driver to a module, where tupon
> unloading the wrong clock was disabled in CKENB.
>
> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
> ---

Did you want a fixes tag to send this back to stable?

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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#1199442

FromRobert Jarzmik <robert.jarzmik@free.fr>
Date2015-08-04 08:30 +0200
Message-ID<pTDTA-2iq-11@gated-at.bofh.it>
In reply to#1199343
Stephen Boyd <sboyd@codeaurora.org> writes:

> On 08/03/2015 12:58 PM, Robert Jarzmik wrote:
>> Clocks 0 to 31 are on CKENA, and not CKENB. The clock register names
>> were inadequately inverted. As a consequence, all clock operations were
>> happening on CKENB, because almost all but 2 clocks are on CKENA.
>>
>> As the clocks were activated by the bootloader in the former tests, it
>> escaped the testing that the wrong clock gate was manipulated. The error
>> was revealed by changing the pxa3xx-and driver to a module, where tupon
>> unloading the wrong clock was disabled in CKENB.
>>
>> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
>> ---
>
> Did you want a fixes tag to send this back to stable?
Ah yes, good point, v2 on its way.

Stephen and Mike, do you think this can still get in -rc6 ?

Cheers.

-- 
Robert
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#1200192

FromStephen Boyd <sboyd@codeaurora.org>
Date2015-08-04 20:00 +0200
Message-ID<pTOFk-SZ-15@gated-at.bofh.it>
In reply to#1199442
On 08/03/2015 11:22 PM, Robert Jarzmik wrote:
> Stephen Boyd <sboyd@codeaurora.org> writes:
>
>> On 08/03/2015 12:58 PM, Robert Jarzmik wrote:
>>> Clocks 0 to 31 are on CKENA, and not CKENB. The clock register names
>>> were inadequately inverted. As a consequence, all clock operations were
>>> happening on CKENB, because almost all but 2 clocks are on CKENA.
>>>
>>> As the clocks were activated by the bootloader in the former tests, it
>>> escaped the testing that the wrong clock gate was manipulated. The error
>>> was revealed by changing the pxa3xx-and driver to a module, where tupon
>>> unloading the wrong clock was disabled in CKENB.
>>>
>>> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
>>> ---
>> Did you want a fixes tag to send this back to stable?
> Ah yes, good point, v2 on its way.
>
> Stephen and Mike, do you think this can still get in -rc6 ?
>

It's not a new regression for v4.2 so we'll leave it to v4.3. I'll apply 
it to clk-next.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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#1200223

FromRobert Jarzmik <robert.jarzmik@free.fr>
Date2015-08-04 20:40 +0200
Message-ID<pTPi2-1RC-7@gated-at.bofh.it>
In reply to#1200192
Stephen Boyd <sboyd@codeaurora.org> writes:

> On 08/03/2015 11:22 PM, Robert Jarzmik wrote:
>> Stephen Boyd <sboyd@codeaurora.org> writes:
>>
>>> On 08/03/2015 12:58 PM, Robert Jarzmik wrote:
>>>> Clocks 0 to 31 are on CKENA, and not CKENB. The clock register names
>>>> were inadequately inverted. As a consequence, all clock operations were
>>>> happening on CKENB, because almost all but 2 clocks are on CKENA.
>>>>
>>>> As the clocks were activated by the bootloader in the former tests, it
>>>> escaped the testing that the wrong clock gate was manipulated. The error
>>>> was revealed by changing the pxa3xx-and driver to a module, where tupon
>>>> unloading the wrong clock was disabled in CKENB.
>>>>
>>>> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
>>>> ---
>>> Did you want a fixes tag to send this back to stable?
>> Ah yes, good point, v2 on its way.
>>
>> Stephen and Mike, do you think this can still get in -rc6 ?
>>
>
> It's not a new regression for v4.2 so we'll leave it to v4.3. I'll apply it to
> clk-next.
Euh how so, not "new" ?

The clock switch for pxa architecture happens just now, on v4.2, see [1]. So the
regression wasn't here on v4.1, but is introduced in v4.2

I know I'm terribly late, but isn't it still possible to have it in v4.2 ?

-- 
Robert

[1] Commit triggering the error
commit 7448adca9361
Merge: e3abcb25d2ae 64227114c676
Author: Arnd Bergmann <arnd@arndb.de>
Date:   Fri May 15 17:40:15 2015 +0200

    Merge tag 'pxa-for-4.2' of https://github.com/rjarzmik/linux into next/soc
    
    Merge "pxa changes for v4.2 cycle" from Robert Jarzmik:
    
    The main and only feature is the conversion of all pxa variants to clock
    framework. This encompasses pxa25x, pxa27x and pxa3xx, for all boards.
    
    This should be a disruptive cycle in the normally quiet pxa history, as
    the change can break any platform, and the test were performed on only 4
    boards (lubbock, zylonite, mioa701, cm-x300).
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#1200234

FromStephen Boyd <sboyd@codeaurora.org>
Date2015-08-04 21:10 +0200
Message-ID<pTPL3-2Fi-3@gated-at.bofh.it>
In reply to#1200223
On 08/04/2015 11:33 AM, Robert Jarzmik wrote:
> Stephen Boyd <sboyd@codeaurora.org> writes:
>
>> On 08/03/2015 11:22 PM, Robert Jarzmik wrote:
>>> Stephen Boyd <sboyd@codeaurora.org> writes:
>>>
>>>> On 08/03/2015 12:58 PM, Robert Jarzmik wrote:
>>>>> Clocks 0 to 31 are on CKENA, and not CKENB. The clock register names
>>>>> were inadequately inverted. As a consequence, all clock operations were
>>>>> happening on CKENB, because almost all but 2 clocks are on CKENA.
>>>>>
>>>>> As the clocks were activated by the bootloader in the former tests, it
>>>>> escaped the testing that the wrong clock gate was manipulated. The error
>>>>> was revealed by changing the pxa3xx-and driver to a module, where tupon
>>>>> unloading the wrong clock was disabled in CKENB.
>>>>>
>>>>> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
>>>>> ---
>>>> Did you want a fixes tag to send this back to stable?
>>> Ah yes, good point, v2 on its way.
>>>
>>> Stephen and Mike, do you think this can still get in -rc6 ?
>>>
>> It's not a new regression for v4.2 so we'll leave it to v4.3. I'll apply it to
>> clk-next.
> Euh how so, not "new" ?
>
> The clock switch for pxa architecture happens just now, on v4.2, see [1]. So the
> regression wasn't here on v4.1, but is introduced in v4.2
>
> I know I'm terribly late, but isn't it still possible to have it in v4.2 ?
>

Ah ok. I wasn't aware that we switched on CCF for PXA this time around. 
Did the commit text mean to mention the pxa3xx-nand driver? I can fix 
that up when applying.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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#1200236

FromRobert Jarzmik <robert.jarzmik@free.fr>
Date2015-08-04 21:20 +0200
Message-ID<pTPUJ-2Rg-1@gated-at.bofh.it>
In reply to#1200234
Stephen Boyd <sboyd@codeaurora.org> writes:

> On 08/04/2015 11:33 AM, Robert Jarzmik wrote:
>> Stephen Boyd <sboyd@codeaurora.org> writes:
>>
>>> On 08/03/2015 11:22 PM, Robert Jarzmik wrote:
>>>> Stephen Boyd <sboyd@codeaurora.org> writes:
>>>>
>>>>> On 08/03/2015 12:58 PM, Robert Jarzmik wrote:
>>>>>> Clocks 0 to 31 are on CKENA, and not CKENB. The clock register names
>>>>>> were inadequately inverted. As a consequence, all clock operations were
>>>>>> happening on CKENB, because almost all but 2 clocks are on CKENA.
>>>>>>
>>>>>> As the clocks were activated by the bootloader in the former tests, it
>>>>>> escaped the testing that the wrong clock gate was manipulated. The error
>>>>>> was revealed by changing the pxa3xx-and driver to a module, where tupon
>>>>>> unloading the wrong clock was disabled in CKENB.
>>>>>>
>>>>>> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
>>>>>> ---
>>>>> Did you want a fixes tag to send this back to stable?
>>>> Ah yes, good point, v2 on its way.
>>>>
>>>> Stephen and Mike, do you think this can still get in -rc6 ?
>>>>
>>> It's not a new regression for v4.2 so we'll leave it to v4.3. I'll apply it to
>>> clk-next.
>> Euh how so, not "new" ?
>>
>> The clock switch for pxa architecture happens just now, on v4.2, see [1]. So the
>> regression wasn't here on v4.1, but is introduced in v4.2
>>
>> I know I'm terribly late, but isn't it still possible to have it in v4.2 ?
>>
>
> Ah ok. I wasn't aware that we switched on CCF for PXA this time around. Did the
> commit text mean to mention the pxa3xx-nand driver? I can fix that up when
> applying.
Oh yes please, it's indeed pxa3xx-nand driver.

Thanks.

-- 
Robert
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