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[PATCH 1/2] pinctrl: baytrail: Drop FSF mailing address

Started byMika Westerberg <mika.westerberg@linux.intel.com>
First post2015-08-04 14:10 +0200
Last post2015-08-13 14:30 +0200
Articles 4 — 2 participants

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  [PATCH 1/2] pinctrl: baytrail: Drop FSF mailing address Mika Westerberg <mika.westerberg@linux.intel.com> - 2015-08-04 14:10 +0200
    [PATCH 2/2] pinctrl: baytrail: Serialize all register access Mika Westerberg <mika.westerberg@linux.intel.com> - 2015-08-04 14:10 +0200
      Re: [PATCH 2/2] pinctrl: baytrail: Serialize all register access Linus Walleij <linus.walleij@linaro.org> - 2015-08-13 14:30 +0200
    Re: [PATCH 1/2] pinctrl: baytrail: Drop FSF mailing address Linus Walleij <linus.walleij@linaro.org> - 2015-08-13 14:30 +0200

#1199733 — [PATCH 1/2] pinctrl: baytrail: Drop FSF mailing address

FromMika Westerberg <mika.westerberg@linux.intel.com>
Date2015-08-04 14:10 +0200
Subject[PATCH 1/2] pinctrl: baytrail: Drop FSF mailing address
Message-ID<pTJcE-1D3-47@gated-at.bofh.it>
The FSF address is already mentioned in the COPYING file. No need to
duplicate that information to individual files.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/pinctrl/intel/pinctrl-baytrail.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 2062c224e32f..4b82381c9a57 100644
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -12,11 +12,6 @@
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- *
  */
 
 #include <linux/kernel.h>
-- 
2.4.6

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#1199737 — [PATCH 2/2] pinctrl: baytrail: Serialize all register access

FromMika Westerberg <mika.westerberg@linux.intel.com>
Date2015-08-04 14:10 +0200
Subject[PATCH 2/2] pinctrl: baytrail: Serialize all register access
Message-ID<pTJcE-1D3-51@gated-at.bofh.it>
In reply to#1199733
There is a hardware issue in Intel Baytrail where concurrent GPIO register
access might result reads of 0xffffffff and writes might get dropped
completely.

Prevent this from happening by taking the serializing lock in all places
where it is possible that more than one thread might be accessing the
hardware concurrently.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
 drivers/pinctrl/intel/pinctrl-baytrail.c | 21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 4b82381c9a57..f80a1bee6981 100644
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -196,6 +196,9 @@ static int byt_gpio_request(struct gpio_chip *chip, unsigned offset)
 	struct byt_gpio *vg = to_byt_gpio(chip);
 	void __iomem *reg = byt_gpio_reg(chip, offset, BYT_CONF0_REG);
 	u32 value, gpio_mux;
+	unsigned long flags;
+
+	spin_lock_irqsave(&vg->lock, flags);
 
 	/*
 	 * In most cases, func pin mux 000 means GPIO function.
@@ -209,18 +212,16 @@ static int byt_gpio_request(struct gpio_chip *chip, unsigned offset)
 	value = readl(reg) & BYT_PIN_MUX;
 	gpio_mux = byt_get_gpio_mux(vg, offset);
 	if (WARN_ON(gpio_mux != value)) {
-		unsigned long flags;
-
-		spin_lock_irqsave(&vg->lock, flags);
 		value = readl(reg) & ~BYT_PIN_MUX;
 		value |= gpio_mux;
 		writel(value, reg);
-		spin_unlock_irqrestore(&vg->lock, flags);
 
 		dev_warn(&vg->pdev->dev,
 			 "pin %u forcibly re-configured as GPIO\n", offset);
 	}
 
+	spin_unlock_irqrestore(&vg->lock, flags);
+
 	pm_runtime_get(&vg->pdev->dev);
 
 	return 0;
@@ -272,7 +273,15 @@ static int byt_irq_type(struct irq_data *d, unsigned type)
 static int byt_gpio_get(struct gpio_chip *chip, unsigned offset)
 {
 	void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG);
-	return readl(reg) & BYT_LEVEL;
+	struct byt_gpio *vg = to_byt_gpio(chip);
+	unsigned long flags;
+	u32 val;
+
+	spin_lock_irqsave(&vg->lock, flags);
+	val = readl(reg);
+	spin_unlock_irqrestore(&vg->lock, flags);
+
+	return val & BYT_LEVEL;
 }
 
 static void byt_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
@@ -445,8 +454,10 @@ static void byt_irq_ack(struct irq_data *d)
 	unsigned offset = irqd_to_hwirq(d);
 	void __iomem *reg;
 
+	spin_lock(&vg->lock);
 	reg = byt_gpio_reg(&vg->chip, offset, BYT_INT_STAT_REG);
 	writel(BIT(offset % 32), reg);
+	spin_unlock(&vg->lock);
 }
 
 static void byt_irq_unmask(struct irq_data *d)
-- 
2.4.6

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#1206775 — Re: [PATCH 2/2] pinctrl: baytrail: Serialize all register access

FromLinus Walleij <linus.walleij@linaro.org>
Date2015-08-13 14:30 +0200
SubjectRe: [PATCH 2/2] pinctrl: baytrail: Serialize all register access
Message-ID<pWZNV-3cO-41@gated-at.bofh.it>
In reply to#1199737
On Tue, Aug 4, 2015 at 2:03 PM, Mika Westerberg
<mika.westerberg@linux.intel.com> wrote:

> There is a hardware issue in Intel Baytrail where concurrent GPIO register
> access might result reads of 0xffffffff and writes might get dropped
> completely.
>
> Prevent this from happening by taking the serializing lock in all places
> where it is possible that more than one thread might be accessing the
> hardware concurrently.
>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>

Patch applied.

Same comment here about the fastpath and the RT raw spinlocks.

Yours,
Linus Walleij
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#1206776

FromLinus Walleij <linus.walleij@linaro.org>
Date2015-08-13 14:30 +0200
Message-ID<pWZNV-3cO-45@gated-at.bofh.it>
In reply to#1199733
On Tue, Aug 4, 2015 at 2:03 PM, Mika Westerberg
<mika.westerberg@linux.intel.com> wrote:

> The FSF address is already mentioned in the COPYING file. No need to
> duplicate that information to individual files.
>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>

Patch applied.

Yours,
Linus Walleij
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