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| Started by | Viresh Kumar <viresh.kumar@linaro.org> |
|---|---|
| First post | 2015-08-01 12:50 +0200 |
| Last post | 2015-08-01 12:50 +0200 |
| Articles | 1 — 1 participant |
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Re: [PATCH v3 2/5] ARM: dts: Exynos4x12: add CPU OPP and regulator supply property Viresh Kumar <viresh.kumar@linaro.org> - 2015-08-01 12:50 +0200
| From | Viresh Kumar <viresh.kumar@linaro.org> |
|---|---|
| Date | 2015-08-01 12:50 +0200 |
| Subject | Re: [PATCH v3 2/5] ARM: dts: Exynos4x12: add CPU OPP and regulator supply property |
| Message-ID | <pSCwx-2hq-3@gated-at.bofh.it> |
On 31-07-15, 20:49, Bartlomiej Zolnierkiewicz wrote:
> For Exynos4x12 platforms, add CPU operating points (using
> opp-v2 bindings) and CPU regulator supply properties for
> migrating from Exynos specific cpufreq driver to using
> generic cpufreq driver.
>
> Based on the earlier work by Thomas Abraham.
>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Doug Anderson <dianders@chromium.org>
> Cc: Andreas Faerber <afaerber@suse.de>
> Cc: Thomas Abraham <thomas.ab@samsung.com>
> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> ---
> arch/arm/boot/dts/exynos4212.dtsi | 81 ++++++++++++++++++++++++
> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 4 ++
> arch/arm/boot/dts/exynos4412-origen.dts | 4 ++
> arch/arm/boot/dts/exynos4412-trats2.dts | 4 ++
> arch/arm/boot/dts/exynos4412.dtsi | 83 +++++++++++++++++++++++++
> 5 files changed, 176 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
> index d9c8efee..5389011 100644
> --- a/arch/arm/boot/dts/exynos4212.dtsi
> +++ b/arch/arm/boot/dts/exynos4212.dtsi
> @@ -30,6 +30,9 @@
> device_type = "cpu";
> compatible = "arm,cortex-a9";
> reg = <0xA00>;
> + clocks = <&clock CLK_ARM_CLK>;
> + clock-names = "cpu";
> + operating-points-v2 = <&cpu0_opp_table>;
> cooling-min-level = <13>;
> cooling-max-level = <7>;
> #cooling-cells = <2>; /* min followed by max */
> @@ -39,6 +42,84 @@
> device_type = "cpu";
> compatible = "arm,cortex-a9";
> reg = <0xA01>;
> + operating-points-v2 = <&cpu0_opp_table>;
> + };
> + };
> +
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp00 {
> + opp-hz = /bits/ 64 <200000000>;
> + opp-microvolt = <900000>;
> + clock-latency-ns = <200000>;
> + };
> + opp01 {
> + opp-hz = /bits/ 64 <300000000>;
> + opp-microvolt = <900000>;
> + clock-latency-ns = <200000>;
> + };
> + opp02 {
> + opp-hz = /bits/ 64 <400000000>;
> + opp-microvolt = <925000>;
> + clock-latency-ns = <200000>;
> + };
> + opp03 {
> + opp-hz = /bits/ 64 <500000000>;
> + opp-microvolt = <950000>;
> + clock-latency-ns = <200000>;
> + };
> + opp04 {
> + opp-hz = /bits/ 64 <600000000>;
> + opp-microvolt = <975000>;
> + clock-latency-ns = <200000>;
> + };
> + opp05 {
> + opp-hz = /bits/ 64 <700000000>;
> + opp-microvolt = <987500>;
> + clock-latency-ns = <200000>;
> + };
> + opp06 {
> + opp-hz = /bits/ 64 <800000000>;
> + opp-microvolt = <1000000>;
> + clock-latency-ns = <200000>;
> + };
> + opp07 {
> + opp-hz = /bits/ 64 <900000000>;
> + opp-microvolt = <1037500>;
> + clock-latency-ns = <200000>;
> + };
> + opp08 {
> + opp-hz = /bits/ 64 <1000000000>;
> + opp-microvolt = <1087500>;
> + clock-latency-ns = <200000>;
> + };
> + opp09 {
> + opp-hz = /bits/ 64 <1100000000>;
> + opp-microvolt = <1137500>;
> + clock-latency-ns = <200000>;
> + };
> + opp10 {
> + opp-hz = /bits/ 64 <1200000000>;
> + opp-microvolt = <1187500>;
> + clock-latency-ns = <200000>;
> + };
> + opp11 {
> + opp-hz = /bits/ 64 <1300000000>;
> + opp-microvolt = <1250000>;
> + clock-latency-ns = <200000>;
> + };
> + opp12 {
> + opp-hz = /bits/ 64 <1400000000>;
> + opp-microvolt = <1287500>;
> + clock-latency-ns = <200000>;
> + };
> + opp13 {
> + opp-hz = /bits/ 64 <1500000000>;
> + opp-microvolt = <1350000>;
> + clock-latency-ns = <200000>;
> + turbo-mode;
> };
> };
> };
I'm lovin' it :)
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
--
viresh
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