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| Started by | Vikas Shivappa <vikas.shivappa@intel.com> |
|---|---|
| First post | 2015-07-29 00:10 +0200 |
| Last post | 2015-07-29 00:10 +0200 |
| Articles | 1 — 1 participant |
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Re: [PATCH 6/9] x86/intel_rdt: Add support for cache bit mask management Vikas Shivappa <vikas.shivappa@intel.com> - 2015-07-29 00:10 +0200
| From | Vikas Shivappa <vikas.shivappa@intel.com> |
|---|---|
| Date | 2015-07-29 00:10 +0200 |
| Subject | Re: [PATCH 6/9] x86/intel_rdt: Add support for cache bit mask management |
| Message-ID | <pRleq-5sl-3@gated-at.bofh.it> |
On Tue, 28 Jul 2015, Peter Zijlstra wrote:
> On Wed, Jul 01, 2015 at 03:21:07PM -0700, Vikas Shivappa wrote:
>> +static inline bool cbm_is_contiguous(unsigned long var)
>> +{
>> + unsigned long maxcbm = MAX_CBM_LENGTH;
>> + unsigned long first_bit, zero_bit;
>> +
>> + if (!var)
>> + return false;
>> +
>> + first_bit = find_next_bit(&var, maxcbm, 0);
>
> We actually have: find_first_bit().
will fix
Thanks,
Vikas
>
>> + zero_bit = find_next_zero_bit(&var, maxcbm, first_bit);
>> +
>> + if (find_next_bit(&var, maxcbm, zero_bit) < maxcbm)
>> + return false;
>> +
>> + return true;
>> +}
>
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