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[PATCH 3/6] ASoC: fsl_ssi: enable AC'97 asymmetric rates

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  [PATCH 3/6] ASoC: fsl_ssi: enable AC'97 asymmetric rates "Maciej S. Szmigiero" <mail@maciej.szmigiero.name> - 2015-07-30 16:40 +0200
    Re: [PATCH 3/6] ASoC: fsl_ssi: enable AC'97 asymmetric rates Markus Pargmann <mpa@pengutronix.de> - 2015-08-02 20:50 +0200

#1196082 — [PATCH 3/6] ASoC: fsl_ssi: enable AC'97 asymmetric rates

AC'97 bus can support asymmetric playback/capture rates
so enable them in this case in fsl_ssi driver.

Signed-off-by: Maciej Szmigiero <mail@maciej.szmigiero.name>
---
 sound/soc/fsl/fsl_ssi.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index a83b900..7f4f0b9 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -1377,7 +1377,9 @@ static int fsl_ssi_probe(struct platform_device *pdev)
 
 	/* Are the RX and the TX clocks locked? */
 	if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) {
-		ssi_private->cpu_dai_drv.symmetric_rates = 1;
+		if (!fsl_ssi_is_ac97(ssi_private))
+			ssi_private->cpu_dai_drv.symmetric_rates = 1;
+
 		ssi_private->cpu_dai_drv.symmetric_channels = 1;
 		ssi_private->cpu_dai_drv.symmetric_samplebits = 1;
 	}

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#1198276

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Hi,

On Fri, Jul 31, 2015 at 04:38:20PM +0200, Maciej S. Szmigiero wrote:
> Hi Markus,
> 
> Thanks for looking into the changes.
> 
> On 31.07.2015 07:53, Markus Pargmann wrote:
> > On Fri, Jul 31, 2015 at 07:27:19AM +0200, Markus Pargmann wrote:
> >> Hi,
> >>
> >> On Thu, Jul 30, 2015 at 04:34:19PM +0200, Maciej S. Szmigiero wrote:
> >>> AC'97 bus can support asymmetric playback/capture rates
> >>> so enable them in this case in fsl_ssi driver.
> >>>
> >>> Signed-off-by: Maciej Szmigiero <mail@maciej.szmigiero.name>
> >>> ---
> >>>  sound/soc/fsl/fsl_ssi.c |    4 +++-
> >>>  1 files changed, 3 insertions(+), 1 deletions(-)
> >>>
> >>> diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
> >>> index a83b900..7f4f0b9 100644
> >>> --- a/sound/soc/fsl/fsl_ssi.c
> >>> +++ b/sound/soc/fsl/fsl_ssi.c
> >>> @@ -1377,7 +1377,9 @@ static int fsl_ssi_probe(struct platform_device *pdev)
> >>>  
> >>>  	/* Are the RX and the TX clocks locked? */
> >>>  	if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) {
> >>> -		ssi_private->cpu_dai_drv.symmetric_rates = 1;
> >>> +		if (!fsl_ssi_is_ac97(ssi_private))
> >>> +			ssi_private->cpu_dai_drv.symmetric_rates = 1;
> >>> +
> >>
> >> Why don't you use the DT property that is parsed here to enable
> >> asymmetric rates?
> 
> Because in the AC'97 mode the driver supports only one channel config and one sample format
> anyway the remaining settings controlled by this property don't do anything.
> 
> Since it should be safe to enable asymmetric rates with any AC'97 CODEC I think it is good
> to do it in driver than to add "fsl,ssi-asynchronous" to every AC'97 DT node.
> 
> Also the description of this property in fsl,ssi.txt looks like that it only makes sense in
> non-AC'97 mode.
> 
> > Just found the last version of this series. Please use v2 and describe
> > changes for a new iteration of a series.
> 
> This is just a resubmission, there are no functional differences since
> it was originally submitted a month ago. 

I see, 'RESEND' tag would be helpful then.

> 
> > There is also a different setup with AC97 which does not use DMA. See
> > the long comment at the top of the file about how ac97 is already used.
> 
> I understand that the problem with FIQ handler described in comment
> on top of fsl_ssi.c only pertains incoming data, that is capture.
> 
> This patch effectively does not touch capture rates as they are already
> limited to 48kHz only since this is the only capture rate defined in
> fsl_ssi AC'97 DAI driver capture capabilities.

Ok, great.

Thanks,

Markus

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