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Re: [PATCH 2/3] perf/x86/intel/pt: Add an option to not force PSB+ on every schedule-in

Started byPeter Zijlstra <peterz@infradead.org>
First post2015-07-30 12:50 +0200
Last post2015-07-30 12:50 +0200
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  Re: [PATCH 2/3] perf/x86/intel/pt: Add an option to not force PSB+  on every schedule-in Peter Zijlstra <peterz@infradead.org> - 2015-07-30 12:50 +0200

#1195906 — Re: [PATCH 2/3] perf/x86/intel/pt: Add an option to not force PSB+ on every schedule-in

FromPeter Zijlstra <peterz@infradead.org>
Date2015-07-30 12:50 +0200
SubjectRe: [PATCH 2/3] perf/x86/intel/pt: Add an option to not force PSB+ on every schedule-in
Message-ID<pRTzr-4iK-13@gated-at.bofh.it>
On Fri, Jul 17, 2015 at 04:34:09PM +0300, Alexander Shishkin wrote:
> Currently, the PT driver zeroes out the status register every time before
> starting the event. However, all the writable bits are already taken care
> of in pt_handle_status() function, except the new PacketByteCnt field,
> which in new versions of PT contains the number of packet bytes written
> since the last sync (PSB) packet. Zeroing it out before enabling PT forces
> a sync packet to be written. This means that, with the existing code, a
> sync packet (PSB and PSBEND, 18 bytes in total) will be generated every
> time a PT event is scheduled in.
> 
> To avoid these unnecessary syncs and save a WRMSR in the fast path, this
> patch adds a new attribute config bit "no_force_psb", which will disable
> this zeroing WRMSR.

Why is this exposed?

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