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Groups > linux.kernel > #1186831 > unrolled thread

[PATCH 0/3] perf/x86/intel/pt: Add new packet enables

Started byAlexander Shishkin <alexander.shishkin@linux.intel.com>
First post2015-07-17 15:40 +0200
Last post2015-07-17 15:50 +0200
Articles 2 — 1 participant

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  [PATCH 0/3] perf/x86/intel/pt: Add new packet enables Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-07-17 15:40 +0200
    [PATCH 3/3] perf/x86/intel/bts: Set itrace_started in pmu::start to match the new logic Alexander Shishkin <alexander.shishkin@linux.intel.com> - 2015-07-17 15:50 +0200

#1186831 — [PATCH 0/3] perf/x86/intel/pt: Add new packet enables

FromAlexander Shishkin <alexander.shishkin@linux.intel.com>
Date2015-07-17 15:40 +0200
Subject[PATCH 0/3] perf/x86/intel/pt: Add new packet enables
Message-ID<pNe1Q-6Sg-3@gated-at.bofh.it>
Hi Peter,

There are new PT packets and handles to enable and configure them in the
new version if Intel Architecture SDM. This series deals with timing
related packets: adds bit definitions, cpuid enumeration and relevant
userspace-visible parts.

The bulk of work, as usual, is in the tooling, which I don't include in
this patchset, since it depends on Adrian's earlier work which is still
bouncing between him and the maintainers, but for the sake of completeness
I pushed it to my github tree [1] and Adrian is also sending it out for
review. So anybody interested in trying the whole thing out can pull it
from my tree.

This time around, however, there is no compile time dependency between
mine and his series, since all the relevant bits are communicated through
sysfs.

[1] https://github.com/virtuoso/linux-perf/commits/intel_pt

Alexander Shishkin (3):
  perf/x86/intel/pt: Add new timing packet enables
  perf/x86/intel/pt: Add an option to not force PSB+ on every
    schedule-in
  perf/x86/intel/bts: Set itrace_started in pmu::start to match the new
    logic

 arch/x86/include/asm/msr-index.h           |  8 +++
 arch/x86/kernel/cpu/intel_pt.h             |  6 +++
 arch/x86/kernel/cpu/perf_event.h           |  1 +
 arch/x86/kernel/cpu/perf_event_intel_bts.c |  1 +
 arch/x86/kernel/cpu/perf_event_intel_pt.c  | 78 ++++++++++++++++++++++++++++--
 kernel/events/core.c                       |  2 -
 6 files changed, 91 insertions(+), 5 deletions(-)

-- 
2.1.4

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#1186846 — [PATCH 3/3] perf/x86/intel/bts: Set itrace_started in pmu::start to match the new logic

FromAlexander Shishkin <alexander.shishkin@linux.intel.com>
Date2015-07-17 15:50 +0200
Subject[PATCH 3/3] perf/x86/intel/bts: Set itrace_started in pmu::start to match the new logic
Message-ID<pNebx-73F-33@gated-at.bofh.it>
In reply to#1186831
Since hw::itrace_started is now set in pmu::start to signal the beginning of
the trace, do so also in the intel_bts driver.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
---
 arch/x86/kernel/cpu/perf_event_intel_bts.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_bts.c b/arch/x86/kernel/cpu/perf_event_intel_bts.c
index 54690e8857..d1c0f254af 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_bts.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_bts.c
@@ -222,6 +222,7 @@ static void __bts_event_start(struct perf_event *event)
 	if (!buf || bts_buffer_is_full(buf, bts))
 		return;
 
+	event->hw.itrace_started = 1;
 	event->hw.state = 0;
 
 	if (!buf->snapshot)
-- 
2.1.4

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