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[PATCH v5 7/7] dt-bindings: Document devicetree binding for ARM SPE

From Will Deacon <will.deacon@arm.com>
Newsgroups linux.kernel
Subject [PATCH v5 7/7] dt-bindings: Document devicetree binding for ARM SPE
Date 2017-09-28 16:20 +0200
Message-ID <uuHPs-1Bi-5@gated-at.bofh.it> (permalink)
References <uuHFM-1y2-21@gated-at.bofh.it>
Organization linux.* mail to news gateway

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This patch documents the devicetree binding in use for ARM SPE.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 Documentation/devicetree/bindings/arm/spe-pmu.txt | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt

diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt
new file mode 100644
index 000000000000..93372f2a7df9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/spe-pmu.txt
@@ -0,0 +1,20 @@
+* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
+
+ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
+performance sample data using an in-memory trace buffer.
+
+** SPE Required properties:
+
+- compatible : should be one of:
+	       "arm,statistical-profiling-extension-v1"
+
+- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where
+               SPE is only supported on a subset of the CPUs, please consult
+	       the arm,gic-v3 binding for details on describing a PPI partition.
+
+** Example:
+
+spe-pmu {
+        compatible = "arm,statistical-profiling-extension-v1";
+        interrupts = <GIC_PPI 05 IRQ_TYPE_LEVEL_HIGH &part1>;
+};
-- 
2.1.4

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Thread

[PATCH v5 0/7] Add support for the ARMv8.2 Statistical Profiling Extension Will Deacon <will.deacon@arm.com> - 2017-09-28 16:20 +0200
  [PATCH v5 4/7] arm64: sysreg: Move SPE registers and PSB into common header files Will Deacon <will.deacon@arm.com> - 2017-09-28 16:20 +0200
    Re: [PATCH v5 4/7] arm64: sysreg: Move SPE registers and PSB into  common header files Mark Rutland <mark.rutland@arm.com> - 2017-10-02 12:00 +0200
    Re: [PATCH v5 4/7] arm64: sysreg: Move SPE registers and PSB into  common header files Marc Zyngier <marc.zyngier@arm.com> - 2017-10-02 12:00 +0200
  [PATCH v5 7/7] dt-bindings: Document devicetree binding for ARM SPE Will Deacon <will.deacon@arm.com> - 2017-09-28 16:20 +0200
    Re: [PATCH v5 7/7] dt-bindings: Document devicetree binding for ARM  SPE Mark Rutland <mark.rutland@arm.com> - 2017-10-02 12:10 +0200
  [PATCH v5 6/7] drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension Will Deacon <will.deacon@arm.com> - 2017-09-28 16:20 +0200
    Re: [PATCH v5 6/7] drivers/perf: Add support for ARMv8.2  Statistical Profiling Extension Kim Phillips <kim.phillips@arm.com> - 2017-09-30 00:20 +0200
      Re: [PATCH v5 6/7] drivers/perf: Add support for ARMv8.2 Statistical  Profiling Extension Arnaldo Carvalho de Melo <acme@redhat.com> - 2017-10-02 22:50 +0200
  [PATCH v5 2/7] perf/core: Export AUX buffer helpers to modules Will Deacon <will.deacon@arm.com> - 2017-09-28 16:20 +0200
  [PATCH v5 5/7] arm64: head: Init PMSCR_EL2.{PA,PCT} when entered at EL2 without VHE Will Deacon <will.deacon@arm.com> - 2017-09-28 16:20 +0200
    Re: [PATCH v5 5/7] arm64: head: Init PMSCR_EL2.{PA,PCT} when entered  at EL2 without VHE Mark Rutland <mark.rutland@arm.com> - 2017-10-02 12:10 +0200

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