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Re: [PATCH v1 0/4] Enable LBR for the guest

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On 09/25/2017 10:59 PM, Andi Kleen wrote:
> On Mon, Sep 25, 2017 at 12:44:52PM +0800, Wei Wang wrote:
>> This patch series enables the Last Branch Recording feature for the
>> guest. Instead of trapping each LBR stack MSR access, the MSRs are
>> passthroughed to the guest. Those MSRs are switched (i.e. load and
>> saved) on VMExit and VMEntry.
>>
>> Test:
>> Try "perf record -b ./test_program" on guest.
> I don't see where you expose the PERF capabilities MSR?
>
> That's normally needed for LBR too to report the version
> number.
>

It was missed, thanks for pointing it out. I also found KVM/QEMU doesn't
expose CPUID.PDCM, will add that too.

Since for now we are enabling LBR, I plan to expose only "PERF_CAP & 0x3f"
to the guest, which reports the LBR format only.

On the other side, it seems that the (guest) kernel driver also works 
without
the above being supported, should we change it to report error and stop
using the PMU features when the check of the above two fails (at 
intel_pmu_init())?


Best,
Wei

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[PATCH v1 0/4] Enable LBR for the guest Wei Wang <wei.w.wang@intel.com> - 2017-09-25 07:00 +0200
  [PATCH v1 2/4] KVM/vmx: auto switch MSR_IA32_DEBUGCTLMSR Wei Wang <wei.w.wang@intel.com> - 2017-09-25 07:00 +0200
    Re: [PATCH v1 2/4] KVM/vmx: auto switch MSR_IA32_DEBUGCTLMSR Paolo Bonzini <pbonzini@redhat.com> - 2017-09-25 14:00 +0200
  Re: [PATCH v1 0/4] Enable LBR for the guest Andi Kleen <ak@linux.intel.com> - 2017-09-25 17:00 +0200
    Re: [PATCH v1 0/4] Enable LBR for the guest Wei Wang <wei.w.wang@intel.com> - 2017-09-26 10:50 +0200
      Re: [PATCH v1 0/4] Enable LBR for the guest Andi Kleen <ak@linux.intel.com> - 2017-09-26 19:00 +0200

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