[PATCH 1/2] irqchip: mips-gic: Fix shifts to extract register fields

From	Paul Burton <paul.burton@imgtec.com>
Newsgroups	linux.kernel
Subject	[PATCH 1/2] irqchip: mips-gic: Fix shifts to extract register fields
Date	2017-09-22 08:30 +0200
Message-ID	<uspDk-2JB-9@gated-at.bofh.it> (permalink)
References	<uspDj-2JB-1@gated-at.bofh.it>
Organization	linux.* mail to news gateway

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The MIPS GIC driver is incorrectly using __fls to shift registers,
intending to shift to the least significant bit of a value based upon
its mask but instead shifting off all but the value's top bit. It should
actually be using __ffs to shift to the first, not last, bit of the
value.

Apparently the system I used when testing commit 3680746abd87
("irqchip: mips-gic: Convert remaining shared reg access to new
accessors") and commit b2b2e584ceab ("irqchip: mips-gic: Clean up mti,
reserved-cpu-vectors handling") managed to work correctly despite this
issue, but not all systems do...

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 3680746abd87 ("irqchip: mips-gic: Convert remaining shared reg access to new accessors")
Fixes: b2b2e584ceab ("irqchip: mips-gic: Clean up mti, reserved-cpu-vectors handling")
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
---

 drivers/irqchip/irq-mips-gic.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 40159ac12ac8..0022b31ad2c5 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -645,7 +645,7 @@ static int __init gic_of_init(struct device_node *node,
 
 	/* Find the first available CPU vector. */
 	i = 0;
-	reserved = (C_SW0 | C_SW1) >> __fls(C_SW0);
+	reserved = (C_SW0 | C_SW1) >> __ffs(C_SW0);
 	while (!of_property_read_u32_index(node, "mti,reserved-cpu-vectors",
 					   i++, &cpu_vec))
 		reserved |= BIT(cpu_vec);
@@ -684,11 +684,11 @@ static int __init gic_of_init(struct device_node *node,
 
 	gicconfig = read_gic_config();
 	gic_shared_intrs = gicconfig & GIC_CONFIG_NUMINTERRUPTS;
-	gic_shared_intrs >>= __fls(GIC_CONFIG_NUMINTERRUPTS);
+	gic_shared_intrs >>= __ffs(GIC_CONFIG_NUMINTERRUPTS);
 	gic_shared_intrs = (gic_shared_intrs + 1) * 8;
 
 	gic_vpes = gicconfig & GIC_CONFIG_PVPS;
-	gic_vpes >>= __fls(GIC_CONFIG_PVPS);
+	gic_vpes >>= __ffs(GIC_CONFIG_PVPS);
 	gic_vpes = gic_vpes + 1;
 
 	if (cpu_has_veic) {
-- 
2.14.1

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[PATCH 0/2] irqchip: mips-gic: Couple of fixes for v4.14-rc1 breakage Paul Burton <paul.burton@imgtec.com> - 2017-09-22 08:30 +0200
  [PATCH 2/2] irqchip: mips-gic: Use effective affinity to unmask Paul Burton <paul.burton@imgtec.com> - 2017-09-22 08:30 +0200
  [PATCH 1/2] irqchip: mips-gic: Fix shifts to extract register fields Paul Burton <paul.burton@imgtec.com> - 2017-09-22 08:30 +0200

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