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Re: [PATCH v2 0/3] arm-smmu: performance optimization

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Hi Leizhen,

On 9/12/2017 9:00 AM, Zhen Lei wrote:
> v1 -> v2:
> base on (add02cfdc9bc2 "iommu: Introduce Interface for IOMMU TLB Flushing")
> 
> Zhen Lei (3):
>    iommu/arm-smmu-v3: put off the execution of TLBI* to reduce lock
>      confliction
>    iommu/arm-smmu-v3: add support for unmap an iova range with only one
>      tlb sync

I tested these (2) patches on QDF2400 hardware and saw performance
improvements in line with those I reported when testing the original
series. I don't have any hardware close at hand to test the 3rd patch
in the series so that will have to come from someone else.

Tested-by: Nate Watterson <nwatters@codeaurora.org>

Thanks,
Nate

>    iommu/arm-smmu: add support for unmap a memory range with only one tlb
>      sync
> 
>   drivers/iommu/arm-smmu-v3.c        | 52 ++++++++++++++++++++++++++++++++++----
>   drivers/iommu/arm-smmu.c           | 10 ++++++++
>   drivers/iommu/io-pgtable-arm-v7s.c | 32 +++++++++++++++--------
>   drivers/iommu/io-pgtable-arm.c     | 30 ++++++++++++++--------
>   drivers/iommu/io-pgtable.h         |  1 +
>   5 files changed, 99 insertions(+), 26 deletions(-)
> 

-- 
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.

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[PATCH v2 0/3] arm-smmu: performance optimization Zhen Lei <thunder.leizhen@huawei.com> - 2017-09-12 15:10 +0200
  Re: [PATCH v2 0/3] arm-smmu: performance optimization Nate Watterson <nwatters@codeaurora.org> - 2017-09-19 06:40 +0200
    Re: [PATCH v2 0/3] arm-smmu: performance optimization "Leizhen (ThunderTown)" <thunder.leizhen@huawei.com> - 2017-09-19 08:30 +0200

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