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Re: [PATCH v8 10/18] RISC-V: Init and Halt Code

From Dmitriy Cherkasov <dmitriy@oss-tech.org>
Newsgroups linux.kernel
Subject Re: [PATCH v8 10/18] RISC-V: Init and Halt Code
Date 2017-09-16 08:30 +0200
Message-ID <uqeM2-655-11@gated-at.bofh.it> (permalink)
References <up1nP-6OS-3@gated-at.bofh.it> <up1xv-77C-5@gated-at.bofh.it> <upkqt-2qd-3@gated-at.bofh.it>
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On 09/13/2017 11:15 AM, Daniel Lezcano wrote:
> 
> All this code must go in the timer side and use the TIMER_OF_DECLARE
> macro with the proper wrappers.

Hi, thanks for the feedback.

Agreed. I'll clean this up.

> 
> Where is the request_per_cpu_interrupt()?
> 
> What is this riscv_timer_interrupt() signature?

This arch defines a separate exception type for local timer interrupts. 
Currently the interrupt controller driver checks the trap cause register, 
determines that it's a timer, and calls the handler directly. To make this go 
through the interrupt subsystem, this driver would need to be reworked.

> 
> Where is get_cycles64() ?

This is in asm/timex.h. Should this be split into a separate asm header ala arm64?

> 
> The timer driver should be self-contained and not spread across
> different places, it is very difficult to review it.
> 
> [ ... ]
> 

Agreed, thanks again for reviewing it anyway :)

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Thread

RISC-V Linux Port v8 Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-13 00:00 +0200
  [PATCH v8 07/18] irqchip: RISC-V Local Interrupt Controller Driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-13 00:00 +0200
  [PATCH v8 01/18] MAINTAINERS: Add RISC-V Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-13 00:00 +0200
    Re: [PATCH v8 01/18] MAINTAINERS: Add RISC-V Joe Perches <joe@perches.com> - 2017-09-13 16:40 +0200
      Re: [PATCH v8 01/18] MAINTAINERS: Add RISC-V Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-13 18:00 +0200
  [PATCH v8 02/18] lib: Add shared copies of some GCC library routines Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-13 00:10 +0200
  [PATCH v8 04/18] dt-bindings: interrupt-controller: RISC-V PLIC documentation Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-13 00:10 +0200
    Re: [PATCH v8 04/18] dt-bindings: interrupt-controller: RISC-V PLIC documentation Rob Herring <robh@kernel.org> - 2017-09-15 16:40 +0200
      Re: [PATCH v8 04/18] dt-bindings: interrupt-controller: RISC-V PLIC documentation Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-15 18:30 +0200
  [PATCH v8 03/18] dt-bindings: interrupt-controller: RISC-V local interrupt controller docs Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-13 00:10 +0200
  [PATCH v8 08/18] irqchip: New RISC-V PLIC Driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-13 00:10 +0200
    Re: [patches] [PATCH v8 08/18] irqchip: New RISC-V PLIC Driver Jonathan Neuschäfer <j.neuschaefer@gmx.net> - 2017-09-14 13:10 +0200
  [PATCH v8 09/18] tty: New RISC-V SBI console driver Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-13 00:10 +0200
  [PATCH v8 13/18] RISC-V: ELF and module implementation Palmer Dabbelt <palmer@dabbelt.com> - 2017-09-13 00:10 +0200
  Re: [PATCH v8 10/18] RISC-V: Init and Halt Code Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-09-13 20:20 +0200
    Re: [PATCH v8 10/18] RISC-V: Init and Halt Code Dmitriy Cherkasov <dmitriy@oss-tech.org> - 2017-09-16 08:30 +0200
      Re: [PATCH v8 10/18] RISC-V: Init and Halt Code Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-09-16 15:30 +0200
        Re: [PATCH v8 10/18] RISC-V: Init and Halt Code Dmitriy Cherkasov <dmitriy@oss-tech.org> - 2017-09-16 23:40 +0200

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