Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1732610
| From | Nicolin Chen <nicoleotsuka@gmail.com> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH v2] dmaengine: imx-sdma: Correct src_addr_widths and directions |
| Date | 2017-09-14 23:50 +0200 |
| Message-ID | <upKbh-1XT-19@gated-at.bofh.it> (permalink) |
| References | <upHn4-e8-11@gated-at.bofh.it> <upIj8-Np-13@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
On Thu, Sep 14, 2017 at 04:43:08PM -0300, Fabio Estevam wrote: > Hi Nicolin, > > On Thu, Sep 14, 2017 at 3:46 PM, Nicolin Chen <nicoleotsuka@gmail.com> wrote: > > The driver already supports DMA_DEV_TO_DEV in sdma_config(), > > DMA_SLAVE_BUSWIDTH_2_BYTES and DMA_SLAVE_BUSWIDTH_1_BYTE in > > sdma_prep_slave_sg(). So this patch adds them to the lists. > > > > Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> > > Patch looks good. > > Just curious: what is the specific usecase that triggered this change? Any audio test case. The ASoC generic dmaengine gets the DMA cap (4_BYTES only) and apply it to hw->formats in ASoC core. SSI + WM8962 could have S8_LE, S16_LE and S24_LE formats but it turns out that it only has S24_LE now because of this. I haven't seen any side effect by DMA_DEV_TO_DEV yet but it could potentially break ASRC once a similar constrain based on the "directions" is applied.
Back to linux.kernel | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread
[PATCH v2] dmaengine: imx-sdma: Correct src_addr_widths and directions Nicolin Chen <nicoleotsuka@gmail.com> - 2017-09-14 20:50 +0200
Re: [PATCH v2] dmaengine: imx-sdma: Correct src_addr_widths and directions Fabio Estevam <festevam@gmail.com> - 2017-09-14 21:50 +0200
Re: [PATCH v2] dmaengine: imx-sdma: Correct src_addr_widths and directions Nicolin Chen <nicoleotsuka@gmail.com> - 2017-09-14 23:50 +0200
Re: [PATCH v2] dmaengine: imx-sdma: Correct src_addr_widths and directions Vinod Koul <vinod.koul@intel.com> - 2017-09-21 19:20 +0200
csiph-web